Lines Matching +full:0 +full:x83000000
29 #define SNDRV_PROTOCOL_MAJOR(version) (((version)>>16)&0xffff)
30 #define SNDRV_PROTOCOL_MINOR(version) (((version)>>8)&0xff)
31 #define SNDRV_PROTOCOL_MICRO(version) ((version)&0xff)
72 #define SNDRV_HWDEP_VERSION SNDRV_PROTOCOL_VERSION(1, 0, 1)
75 SNDRV_HWDEP_IFACE_OPL2 = 0,
134 #define SNDRV_HWDEP_IOCTL_PVERSION _IOR ('H', 0x00, int)
135 #define SNDRV_HWDEP_IOCTL_INFO _IOR ('H', 0x01, struct snd_hwdep_info)
136 #define SNDRV_HWDEP_IOCTL_DSP_STATUS _IOR('H', 0x02, struct snd_hwdep_dsp_status)
137 #define SNDRV_HWDEP_IOCTL_DSP_LOAD _IOW('H', 0x03, struct snd_hwdep_dsp_image)
145 #define SNDRV_PCM_VERSION SNDRV_PROTOCOL_VERSION(2, 0, 18)
151 SNDRV_PCM_CLASS_GENERIC = 0, /* standard mono or stereo device */
160 SNDRV_PCM_SUBCLASS_GENERIC_MIX = 0, /* mono or stereo subdevices are mixed together */
167 SNDRV_PCM_STREAM_PLAYBACK = 0,
173 #define SNDRV_PCM_ACCESS_MMAP_INTERLEAVED ((__force snd_pcm_access_t) 0) /* interleaved mmap */
181 #define SNDRV_PCM_FORMAT_S8 ((__force snd_pcm_format_t) 0)
269 #define SNDRV_PCM_SUBFORMAT_STD ((__force snd_pcm_subformat_t) 0)
275 #define SNDRV_PCM_INFO_MMAP 0x00000001 /* hardware supports mmap */
276 #define SNDRV_PCM_INFO_MMAP_VALID 0x00000002 /* period data are valid during transfer */
277 #define SNDRV_PCM_INFO_DOUBLE 0x00000004 /* Double buffering needed for PCM start/stop */
278 #define SNDRV_PCM_INFO_BATCH 0x00000010 /* double buffering */
279 #define SNDRV_PCM_INFO_SYNC_APPLPTR 0x00000020 /* need the explicit sync of appl_ptr update */
280 #define SNDRV_PCM_INFO_PERFECT_DRAIN 0x00000040 /* silencing at the end of stream is not required */
281 #define SNDRV_PCM_INFO_INTERLEAVED 0x00000100 /* channels are interleaved */
282 #define SNDRV_PCM_INFO_NONINTERLEAVED 0x00000200 /* channels are not interleaved */
283 #define SNDRV_PCM_INFO_COMPLEX 0x00000400 /* complex frame organization (mmap only) */
284 #define SNDRV_PCM_INFO_BLOCK_TRANSFER 0x00010000 /* hardware transfer block of samples */
285 #define SNDRV_PCM_INFO_OVERRANGE 0x00020000 /* hardware supports ADC (capture) overrange detection …
286 #define SNDRV_PCM_INFO_RESUME 0x00040000 /* hardware supports stream resume after suspend */
287 #define SNDRV_PCM_INFO_PAUSE 0x00080000 /* pause ioctl is supported */
288 #define SNDRV_PCM_INFO_HALF_DUPLEX 0x00100000 /* only half duplex */
289 #define SNDRV_PCM_INFO_JOINT_DUPLEX 0x00200000 /* playback and capture stream are somewhat correlat…
290 #define SNDRV_PCM_INFO_SYNC_START 0x00400000 /* pcm support some kind of sync go */
291 #define SNDRV_PCM_INFO_NO_PERIOD_WAKEUP 0x00800000 /* period wakeup can be disabled */
292 #define SNDRV_PCM_INFO_HAS_WALL_CLOCK 0x01000000 /* (Deprecated)has audio wall clock for aud…
293 #define SNDRV_PCM_INFO_HAS_LINK_ATIME 0x01000000 /* report hardware link audio time, …
294 #define SNDRV_PCM_INFO_HAS_LINK_ABSOLUTE_ATIME 0x02000000 /* report absolute hardware link aud…
295 #define SNDRV_PCM_INFO_HAS_LINK_ESTIMATED_ATIME 0x04000000 /* report estimated link audio time …
296 #define SNDRV_PCM_INFO_HAS_LINK_SYNCHRONIZED_ATIME 0x08000000 /* report synchronized audio/system …
297 #define SNDRV_PCM_INFO_EXPLICIT_SYNC 0x10000000 /* needs explicit sync of pointers and data */
298 #define SNDRV_PCM_INFO_NO_REWINDS 0x20000000 /* hardware can only support monotonic changes of appl…
299 #define SNDRV_PCM_INFO_DRAIN_TRIGGER 0x40000000 /* internal kernel flag - trigger in drain */
300 #define SNDRV_PCM_INFO_FIFO_IN_FRAMES 0x80000000 /* internal kernel flag - FIFO size is in frames */
307 #define SNDRV_PCM_STATE_OPEN ((__force snd_pcm_state_t) 0) /* stream is open */
319 SNDRV_PCM_MMAP_OFFSET_DATA = 0x00000000,
320 SNDRV_PCM_MMAP_OFFSET_STATUS_OLD = 0x80000000,
321 SNDRV_PCM_MMAP_OFFSET_CONTROL_OLD = 0x81000000,
322 SNDRV_PCM_MMAP_OFFSET_STATUS_NEW = 0x82000000,
323 SNDRV_PCM_MMAP_OFFSET_CONTROL_NEW = 0x83000000,
356 #define SNDRV_PCM_HW_PARAM_ACCESS 0 /* Access type */
387 #define SNDRV_PCM_HW_PARAMS_NORESAMPLE (1<<0) /* avoid rate resampling */
428 SNDRV_PCM_TSTAMP_NONE = 0,
466 SNDRV_PCM_AUDIO_TSTAMP_TYPE_COMPAT = 0,
534 snd_pcm_uframes_t hw_ptr; /* RO: hw ptr (0...boundary-1) */
541 snd_pcm_uframes_t appl_ptr; /* RW: appl ptr (0...boundary-1) */
545 #define SNDRV_PCM_SYNC_PTR_HWSYNC (1<<0) /* execute hwsync */
563 typedef char __pad_after_uframe[0];
567 typedef char __pad_before_uframe[0];
575 snd_pcm_uframes_t hw_ptr; /* RO: hw ptr (0...boundary-1) */
585 snd_pcm_uframes_t appl_ptr; /* RW: appl ptr (0...boundary-1) */
620 SNDRV_PCM_TSTAMP_TYPE_GETTIMEOFDAY = 0, /* gettimeofday equivalent */
628 SNDRV_CHMAP_UNKNOWN = 0,
671 #define SNDRV_CHMAP_POSITION_MASK 0xffff
672 #define SNDRV_CHMAP_PHASE_INVERSE (0x01 << 16)
673 #define SNDRV_CHMAP_DRIVER_SPEC (0x02 << 16)
675 #define SNDRV_PCM_IOCTL_PVERSION _IOR('A', 0x00, int)
676 #define SNDRV_PCM_IOCTL_INFO _IOR('A', 0x01, struct snd_pcm_info)
677 #define SNDRV_PCM_IOCTL_TSTAMP _IOW('A', 0x02, int)
678 #define SNDRV_PCM_IOCTL_TTSTAMP _IOW('A', 0x03, int)
679 #define SNDRV_PCM_IOCTL_USER_PVERSION _IOW('A', 0x04, int)
680 #define SNDRV_PCM_IOCTL_HW_REFINE _IOWR('A', 0x10, struct snd_pcm_hw_params)
681 #define SNDRV_PCM_IOCTL_HW_PARAMS _IOWR('A', 0x11, struct snd_pcm_hw_params)
682 #define SNDRV_PCM_IOCTL_HW_FREE _IO('A', 0x12)
683 #define SNDRV_PCM_IOCTL_SW_PARAMS _IOWR('A', 0x13, struct snd_pcm_sw_params)
684 #define SNDRV_PCM_IOCTL_STATUS _IOR('A', 0x20, struct snd_pcm_status)
685 #define SNDRV_PCM_IOCTL_DELAY _IOR('A', 0x21, snd_pcm_sframes_t)
686 #define SNDRV_PCM_IOCTL_HWSYNC _IO('A', 0x22)
687 #define __SNDRV_PCM_IOCTL_SYNC_PTR _IOWR('A', 0x23, struct __snd_pcm_sync_ptr)
688 #define __SNDRV_PCM_IOCTL_SYNC_PTR64 _IOWR('A', 0x23, struct __snd_pcm_sync_ptr64)
689 #define SNDRV_PCM_IOCTL_SYNC_PTR _IOWR('A', 0x23, struct snd_pcm_sync_ptr)
690 #define SNDRV_PCM_IOCTL_STATUS_EXT _IOWR('A', 0x24, struct snd_pcm_status)
691 #define SNDRV_PCM_IOCTL_CHANNEL_INFO _IOR('A', 0x32, struct snd_pcm_channel_info)
692 #define SNDRV_PCM_IOCTL_PREPARE _IO('A', 0x40)
693 #define SNDRV_PCM_IOCTL_RESET _IO('A', 0x41)
694 #define SNDRV_PCM_IOCTL_START _IO('A', 0x42)
695 #define SNDRV_PCM_IOCTL_DROP _IO('A', 0x43)
696 #define SNDRV_PCM_IOCTL_DRAIN _IO('A', 0x44)
697 #define SNDRV_PCM_IOCTL_PAUSE _IOW('A', 0x45, int)
698 #define SNDRV_PCM_IOCTL_REWIND _IOW('A', 0x46, snd_pcm_uframes_t)
699 #define SNDRV_PCM_IOCTL_RESUME _IO('A', 0x47)
700 #define SNDRV_PCM_IOCTL_XRUN _IO('A', 0x48)
701 #define SNDRV_PCM_IOCTL_FORWARD _IOW('A', 0x49, snd_pcm_uframes_t)
702 #define SNDRV_PCM_IOCTL_WRITEI_FRAMES _IOW('A', 0x50, struct snd_xferi)
703 #define SNDRV_PCM_IOCTL_READI_FRAMES _IOR('A', 0x51, struct snd_xferi)
704 #define SNDRV_PCM_IOCTL_WRITEN_FRAMES _IOW('A', 0x52, struct snd_xfern)
705 #define SNDRV_PCM_IOCTL_READN_FRAMES _IOR('A', 0x53, struct snd_xfern)
706 #define SNDRV_PCM_IOCTL_LINK _IOW('A', 0x60, int)
707 #define SNDRV_PCM_IOCTL_UNLINK _IO('A', 0x61)
711 * MIDI v1.0 interface *
719 #define SNDRV_RAWMIDI_VERSION SNDRV_PROTOCOL_VERSION(2, 0, 4)
722 SNDRV_RAWMIDI_STREAM_OUTPUT = 0,
727 #define SNDRV_RAWMIDI_INFO_OUTPUT 0x00000001
728 #define SNDRV_RAWMIDI_INFO_INPUT 0x00000002
729 #define SNDRV_RAWMIDI_INFO_DUPLEX 0x00000004
730 #define SNDRV_RAWMIDI_INFO_UMP 0x00000008
746 #define SNDRV_RAWMIDI_MODE_FRAMING_MASK (7<<0)
747 #define SNDRV_RAWMIDI_MODE_FRAMING_SHIFT 0
748 #define SNDRV_RAWMIDI_MODE_FRAMING_NONE (0<<0)
749 #define SNDRV_RAWMIDI_MODE_FRAMING_TSTAMP (1<<0)
752 #define SNDRV_RAWMIDI_MODE_CLOCK_NONE (0<<3)
760 /* For now, frame_type is always 0. Midi 2.0 is expected to add new
792 #define SNDRV_UMP_EP_INFO_STATIC_BLOCKS 0x01
795 #define SNDRV_UMP_EP_INFO_PROTO_MIDI_MASK 0x0300
796 #define SNDRV_UMP_EP_INFO_PROTO_MIDI1 0x0100 /* MIDI 1.0 */
797 #define SNDRV_UMP_EP_INFO_PROTO_MIDI2 0x0200 /* MIDI 2.0 */
798 #define SNDRV_UMP_EP_INFO_PROTO_JRTS_MASK 0x0003
799 #define SNDRV_UMP_EP_INFO_PROTO_JRTS_TX 0x0001 /* JRTS Transmit */
800 #define SNDRV_UMP_EP_INFO_PROTO_JRTS_RX 0x0002 /* JRTS Receive */
822 #define SNDRV_UMP_DIR_INPUT 0x01
823 #define SNDRV_UMP_DIR_OUTPUT 0x02
824 #define SNDRV_UMP_DIR_BIDIRECTION 0x03
827 #define SNDRV_UMP_BLOCK_IS_MIDI1 (1U << 0) /* MIDI 1.0 port w/o restrict */
831 #define SNDRV_UMP_BLOCK_UI_HINT_UNKNOWN 0x00
832 #define SNDRV_UMP_BLOCK_UI_HINT_RECEIVER 0x01
833 #define SNDRV_UMP_BLOCK_UI_HINT_SENDER 0x02
834 #define SNDRV_UMP_BLOCK_UI_HINT_BOTH 0x03
857 #define SNDRV_RAWMIDI_IOCTL_PVERSION _IOR('W', 0x00, int)
858 #define SNDRV_RAWMIDI_IOCTL_INFO _IOR('W', 0x01, struct snd_rawmidi_info)
859 #define SNDRV_RAWMIDI_IOCTL_USER_PVERSION _IOW('W', 0x02, int)
860 #define SNDRV_RAWMIDI_IOCTL_PARAMS _IOWR('W', 0x10, struct snd_rawmidi_params)
861 #define SNDRV_RAWMIDI_IOCTL_STATUS _IOWR('W', 0x20, struct snd_rawmidi_status)
862 #define SNDRV_RAWMIDI_IOCTL_DROP _IOW('W', 0x30, int)
863 #define SNDRV_RAWMIDI_IOCTL_DRAIN _IOW('W', 0x31, int)
865 #define SNDRV_UMP_IOCTL_ENDPOINT_INFO _IOR('W', 0x40, struct snd_ump_endpoint_info)
866 #define SNDRV_UMP_IOCTL_BLOCK_INFO _IOR('W', 0x41, struct snd_ump_block_info)
872 #define SNDRV_TIMER_VERSION SNDRV_PROTOCOL_VERSION(2, 0, 8)
876 SNDRV_TIMER_CLASS_SLAVE = 0,
885 SNDRV_TIMER_SCLASS_NONE = 0,
893 #define SNDRV_TIMER_GLOBAL_SYSTEM 0
900 #define SNDRV_TIMER_FLG_SLAVE (1<<0) /* cannot be controlled */
954 #define SNDRV_TIMER_PSFLG_AUTO (1<<0) /* auto start, otherwise one-shot */
990 #define SNDRV_TIMER_IOCTL_PVERSION _IOR('T', 0x00, int)
991 #define SNDRV_TIMER_IOCTL_NEXT_DEVICE _IOWR('T', 0x01, struct snd_timer_id)
992 #define SNDRV_TIMER_IOCTL_TREAD_OLD _IOW('T', 0x02, int)
993 #define SNDRV_TIMER_IOCTL_GINFO _IOWR('T', 0x03, struct snd_timer_ginfo)
994 #define SNDRV_TIMER_IOCTL_GPARAMS _IOW('T', 0x04, struct snd_timer_gparams)
995 #define SNDRV_TIMER_IOCTL_GSTATUS _IOWR('T', 0x05, struct snd_timer_gstatus)
996 #define SNDRV_TIMER_IOCTL_SELECT _IOW('T', 0x10, struct snd_timer_select)
997 #define SNDRV_TIMER_IOCTL_INFO _IOR('T', 0x11, struct snd_timer_info)
998 #define SNDRV_TIMER_IOCTL_PARAMS _IOW('T', 0x12, struct snd_timer_params)
999 #define SNDRV_TIMER_IOCTL_STATUS _IOR('T', 0x14, struct snd_timer_status)
1001 #define SNDRV_TIMER_IOCTL_START _IO('T', 0xa0)
1002 #define SNDRV_TIMER_IOCTL_STOP _IO('T', 0xa1)
1003 #define SNDRV_TIMER_IOCTL_CONTINUE _IO('T', 0xa2)
1004 #define SNDRV_TIMER_IOCTL_PAUSE _IO('T', 0xa3)
1005 #define SNDRV_TIMER_IOCTL_TREAD64 _IOW('T', 0xa4, int)
1006 #define SNDRV_TIMER_IOCTL_CREATE _IOWR('T', 0xa5, struct snd_timer_uinfo)
1007 #define SNDRV_TIMER_IOCTL_TRIGGER _IO('T', 0xa6)
1023 SNDRV_TIMER_EVENT_RESOLUTION = 0, /* val = resolution in ns */
1026 SNDRV_TIMER_EVENT_STOP, /* val = 0 */
1028 SNDRV_TIMER_EVENT_PAUSE, /* val = 0 */
1029 SNDRV_TIMER_EVENT_EARLY, /* val = 0, early event */
1030 SNDRV_TIMER_EVENT_SUSPEND, /* val = 0 */
1057 #define SNDRV_CTL_VERSION SNDRV_PROTOCOL_VERSION(2, 0, 9)
1072 #define SNDRV_CTL_ELEM_TYPE_NONE ((__force snd_ctl_elem_type_t) 0) /* invalid */
1082 #define SNDRV_CTL_ELEM_IFACE_CARD ((__force snd_ctl_elem_iface_t) 0) /* global control */
1091 #define SNDRV_CTL_ELEM_ACCESS_READ (1<<0)
1108 #define SNDRV_CTL_POWER_D0 0x0000 /* full On */
1109 #define SNDRV_CTL_POWER_D1 0x0100 /* partial On */
1110 #define SNDRV_CTL_POWER_D2 0x0200 /* partial On */
1111 #define SNDRV_CTL_POWER_D3 0x0300 /* Off */
1112 #define SNDRV_CTL_POWER_D3hot (SNDRV_CTL_POWER_D3|0x0000) /* Off, with power */
1113 #define SNDRV_CTL_POWER_D3cold (SNDRV_CTL_POWER_D3|0x0001) /* Off, without power */
1145 long step; /* R: step (0 variable) */
1150 long long step; /* R: step (0 variable) */
1195 #define SNDRV_CTL_IOCTL_PVERSION _IOR('U', 0x00, int)
1196 #define SNDRV_CTL_IOCTL_CARD_INFO _IOR('U', 0x01, struct snd_ctl_card_info)
1197 #define SNDRV_CTL_IOCTL_ELEM_LIST _IOWR('U', 0x10, struct snd_ctl_elem_list)
1198 #define SNDRV_CTL_IOCTL_ELEM_INFO _IOWR('U', 0x11, struct snd_ctl_elem_info)
1199 #define SNDRV_CTL_IOCTL_ELEM_READ _IOWR('U', 0x12, struct snd_ctl_elem_value)
1200 #define SNDRV_CTL_IOCTL_ELEM_WRITE _IOWR('U', 0x13, struct snd_ctl_elem_value)
1201 #define SNDRV_CTL_IOCTL_ELEM_LOCK _IOW('U', 0x14, struct snd_ctl_elem_id)
1202 #define SNDRV_CTL_IOCTL_ELEM_UNLOCK _IOW('U', 0x15, struct snd_ctl_elem_id)
1203 #define SNDRV_CTL_IOCTL_SUBSCRIBE_EVENTS _IOWR('U', 0x16, int)
1204 #define SNDRV_CTL_IOCTL_ELEM_ADD _IOWR('U', 0x17, struct snd_ctl_elem_info)
1205 #define SNDRV_CTL_IOCTL_ELEM_REPLACE _IOWR('U', 0x18, struct snd_ctl_elem_info)
1206 #define SNDRV_CTL_IOCTL_ELEM_REMOVE _IOWR('U', 0x19, struct snd_ctl_elem_id)
1207 #define SNDRV_CTL_IOCTL_TLV_READ _IOWR('U', 0x1a, struct snd_ctl_tlv)
1208 #define SNDRV_CTL_IOCTL_TLV_WRITE _IOWR('U', 0x1b, struct snd_ctl_tlv)
1209 #define SNDRV_CTL_IOCTL_TLV_COMMAND _IOWR('U', 0x1c, struct snd_ctl_tlv)
1210 #define SNDRV_CTL_IOCTL_HWDEP_NEXT_DEVICE _IOWR('U', 0x20, int)
1211 #define SNDRV_CTL_IOCTL_HWDEP_INFO _IOR('U', 0x21, struct snd_hwdep_info)
1212 #define SNDRV_CTL_IOCTL_PCM_NEXT_DEVICE _IOR('U', 0x30, int)
1213 #define SNDRV_CTL_IOCTL_PCM_INFO _IOWR('U', 0x31, struct snd_pcm_info)
1214 #define SNDRV_CTL_IOCTL_PCM_PREFER_SUBDEVICE _IOW('U', 0x32, int)
1215 #define SNDRV_CTL_IOCTL_RAWMIDI_NEXT_DEVICE _IOWR('U', 0x40, int)
1216 #define SNDRV_CTL_IOCTL_RAWMIDI_INFO _IOWR('U', 0x41, struct snd_rawmidi_info)
1217 #define SNDRV_CTL_IOCTL_RAWMIDI_PREFER_SUBDEVICE _IOW('U', 0x42, int)
1218 #define SNDRV_CTL_IOCTL_UMP_NEXT_DEVICE _IOWR('U', 0x43, int)
1219 #define SNDRV_CTL_IOCTL_UMP_ENDPOINT_INFO _IOWR('U', 0x44, struct snd_ump_endpoint_info)
1220 #define SNDRV_CTL_IOCTL_UMP_BLOCK_INFO _IOWR('U', 0x45, struct snd_ump_block_info)
1221 #define SNDRV_CTL_IOCTL_POWER _IOWR('U', 0xd0, int)
1222 #define SNDRV_CTL_IOCTL_POWER_STATE _IOR('U', 0xd1, int)
1229 SNDRV_CTL_EVENT_ELEM = 0,
1233 #define SNDRV_CTL_EVENT_MASK_VALUE (1<<0) /* element value was changed */
1237 #define SNDRV_CTL_EVENT_MASK_REMOVE (~0U) /* element was removed */