Lines Matching +full:architecturally +full:- +full:defined

107architecturally defined event. This event counts the number of retired branch instructions that we…
116 …he processor predicts that the branch would be taken, but it is not, or vice-versa. When the misp…
126 …he processor predicts that the branch would be taken, but it is not, or vice-versa. When the misp…
136 …he processor predicts that the branch would be taken, but it is not, or vice-versa. When the misp…
146 …he processor predicts that the branch would be taken, but it is not, or vice-versa. When the misp…
156 …he processor predicts that the branch would be taken, but it is not, or vice-versa. When the misp…
164 …by dividing the event count by the core frequency. This event is architecturally defined and is a …
189 …lapsed time while the core was not in halt state. This event is architecturally defined and is a …
206 … For instructions that consist of multiple micro-ops, this event counts exactly once, as the last …
215 … For instructions that consist of multiple micro-ops, this event counts the retirement of the last…
228 "BriefDescription": "Self-Modifying Code detected",
232 …ent counts the number of times that a program writes to a code section. Self-modifying code causes…
241 …": "The NO_ALLOC_CYCLES.ALL event counts the number of cycles when the front-end does not provide …
259-end inefficiencies, i.e. when front-end of the machine is not delivering micro-ops to the back-en…
289 …ropriately counted in case of the cracked ops e.g. In case of a cracked load-op, the load portion …
293 …ropriately counted in case of the cracked ops e.g. In case of a cracked load-op, the load portion …
298 "BriefDescription": "Micro-ops retired",
302-ops retired. The processor decodes complex macro instructions into a sequence of simpler micro-op…
307 "BriefDescription": "MSROM micro-ops retired",
311 …"PublicDescription": "This event counts the number of micro-ops retired that were supplied from MS…