x86/silvermont/pipeline.json

4         "Counter": "0,1",
7         "PEBS": "1",
8 …ction. This unit predicts the target address not only based on the EIP of the branch but also base…
13         "Counter": "0,1",
17 …ction. This unit predicts the target address not only based on the EIP of the branch but also base…
23         "Counter": "0,1",
26         "PEBS": "1",
27 …ction. This unit predicts the target address not only based on the EIP of the branch but also base…
33         "Counter": "0,1",
36         "PEBS": "1",
37 …ction. This unit predicts the target address not only based on the EIP of the branch but also base…
43         "Counter": "0,1",
46         "PEBS": "1",
47 …ction. This unit predicts the target address not only based on the EIP of the branch but also base…
53         "Counter": "0,1",
56         "PEBS": "1",
57 …ction. This unit predicts the target address not only based on the EIP of the branch but also base…
63         "Counter": "0,1",
66         "PEBS": "1",
67 …ction. This unit predicts the target address not only based on the EIP of the branch but also base…
73         "Counter": "0,1",
76         "PEBS": "1",
77 …ction. This unit predicts the target address not only based on the EIP of the branch but also base…
83         "Counter": "0,1",
86         "PEBS": "1",
87 …ction. This unit predicts the target address not only based on the EIP of the branch but also base…
93         "Counter": "0,1",
96         "PEBS": "1",
97 …ction. This unit predicts the target address not only based on the EIP of the branch but also base…
103         "Counter": "0,1",
106         "PEBS": "1",
107 …he processor predicts that the branch would be taken, but it is not, or vice-versa.  When the misp…
112         "Counter": "0,1",
115         "PEBS": "1",
116 …he processor predicts that the branch would be taken, but it is not, or vice-versa.  When the misp…
122         "Counter": "0,1",
125         "PEBS": "1",
126 …he processor predicts that the branch would be taken, but it is not, or vice-versa.  When the misp…
132         "Counter": "0,1",
135         "PEBS": "1",
136 …he processor predicts that the branch would be taken, but it is not, or vice-versa.  When the misp…
142         "Counter": "0,1",
145         "PEBS": "1",
146 …he processor predicts that the branch would be taken, but it is not, or vice-versa.  When the misp…
152         "Counter": "0,1",
155         "PEBS": "1",
156 …he processor predicts that the branch would be taken, but it is not, or vice-versa.  When the misp…
170         "Counter": "0,1",
178         "Counter": "0,1",
195         "Counter": "0,1",
204         "Counter": "Fixed counter 1",
206 … For instructions that consist of multiple micro-ops, this event counts exactly once, as the last …
212         "Counter": "0,1",
215 … For instructions that consist of multiple micro-ops, this event counts the retirement of the last…
220         "Counter": "0,1",
228         "BriefDescription": "Self-Modifying Code detected",
229         "Counter": "0,1",
232 …ent counts the number of times that a program writes to a code section. Self-modifying code causes…
238         "Counter": "0,1",
241 …": "The NO_ALLOC_CYCLES.ALL event counts the number of cycles when the front-end does not provide …
247         "Counter": "0,1",
256         "Counter": "0,1",
259 …-end inefficiencies, i.e. when front-end of the machine is not delivering micro-ops to the back-en…
265         "Counter": "0,1",
273         "Counter": "0,1",
282         "Counter": "0,1",
289 …ropriately counted in case of the cracked ops e.g. In case of a cracked load-op, the load portion …
290         "Counter": "0,1",
293 …ropriately counted in case of the cracked ops e.g. In case of a cracked load-op, the load portion …
298         "BriefDescription": "Micro-ops retired",
299         "Counter": "0,1",
302 …-ops retired. The processor decodes complex macro instructions into a sequence of simpler micro-op…
307         "BriefDescription": "MSROM micro-ops retired",
308         "Counter": "0,1",
311 …"PublicDescription": "This event counts the number of micro-ops retired that were supplied from MS…