x86/rocketlake/cache.json

4         "Counter": "0,1,2,3",
12 …"BriefDescription": "Number of cycles a demand request has waited due to L1D Fill Buffer (FB) unav…
13         "Counter": "0,1,2,3",
16 …"PublicDescription": "Counts number of cycles a demand request has waited due to L1D Fill Buffer (…
21 …"BriefDescription": "Number of phases a demand request has waited due to L1D Fill Buffer (FB) unav…
22         "Counter": "0,1,2,3",
27 …"PublicDescription": "Counts number of phases a demand request has waited due to L1D Fill Buffer (…
32 …"BriefDescription": "Number of cycles a demand request has waited due to L1D due to lack of L2 res…
33         "Counter": "0,1,2,3",
36 …"PublicDescription": "Counts number of cycles a demand request has waited due to L1D due to lack o…
42         "Counter": "0,1,2,3",
45 … FB, if it is allocated by hardware or software prefetch. Note: In the L1D, a Demand Read contains…
51         "Counter": "0,1,2,3",
61         "Counter": "0,1,2,3",
70         "Counter": "0,1,2,3",
79         "Counter": "0,1,2,3",
82 …y an L2 cache fill. These lines are typically in Shared or Exclusive state. A non-threaded event.",
88         "Counter": "0,1,2,3",
97         "Counter": "0,1,2,3",
106         "Counter": "0,1,2,3",
115         "Counter": "0,1,2,3",
124         "Counter": "0,1,2,3",
133         "Counter": "0,1,2,3",
142         "Counter": "0,1,2,3",
151         "Counter": "0,1,2,3",
160         "Counter": "0,1,2,3",
169         "Counter": "0,1,2,3",
178         "Counter": "0,1,2,3",
187         "Counter": "0,1,2,3",
196         "Counter": "0,1,2,3",
205         "Counter": "0,1,2,3",
214         "Counter": "0,1,2,3",
223         "Counter": "0,1,2,3",
232         "Counter": "0,1,2,3",
241         "Counter": "0,1,2,3,4,5,6,7",
250         "Counter": "0,1,2,3",
261         "Counter": "0,1,2,3",
272         "Counter": "0,1,2,3",
283         "Counter": "0,1,2,3",
293         "BriefDescription": "Retired load instructions that split across a cacheline boundary.",
294         "Counter": "0,1,2,3",
299 …   "PublicDescription": "Counts retired load instructions that split across a cacheline boundary.",
304         "BriefDescription": "Retired store instructions that split across a cacheline boundary.",
305         "Counter": "0,1,2,3",
310 …  "PublicDescription": "Counts retired store instructions that split across a cacheline boundary.",
316         "Counter": "0,1,2,3",
321 …"PublicDescription": "Number of retired load instructions that (start a) miss in the 2nd-level TLB…
327         "Counter": "0,1,2,3",
332 …"PublicDescription": "Number of retired store instructions that (start a) miss in the 2nd-level TL…
338         "Counter": "0,1,2,3",
349         "Counter": "0,1,2,3",
360         "Counter": "0,1,2,3",
371         "Counter": "0,1,2,3",
382         "Counter": "0,1,2,3",
392 …mand load requests that missed the L1, but hit the FB(fill buffer), because a preceding miss to th…
393         "Counter": "0,1,2,3",
404         "Counter": "0,1,2,3",
415         "Counter": "0,1,2,3",
426         "Counter": "0,1,2,3",
437         "Counter": "0,1,2,3",
448         "Counter": "0,1,2,3",
459         "Counter": "0,1,2,3",
469 …truction fetches and L1 instruction cache prefetches that hit a cacheline in the L3 where a snoop …
470         "Counter": "0,1,2,3",
479 …truction fetches and L1 instruction cache prefetches that hit a cacheline in the L3 where a snoop …
480         "Counter": "0,1,2,3",
489 …truction fetches and L1 instruction cache prefetches that hit a cacheline in the L3 where a snoop …
490         "Counter": "0,1,2,3",
499 …truction fetches and L1 instruction cache prefetches that hit a cacheline in the L3 where a snoop …
500         "Counter": "0,1,2,3",
509 …truction fetches and L1 instruction cache prefetches that hit a cacheline in the L3 where a snoop …
510         "Counter": "0,1,2,3",
519 …truction fetches and L1 instruction cache prefetches that hit a cacheline in the L3 where a snoop …
520         "Counter": "0,1,2,3",
529 …"BriefDescription": "Counts demand data reads that hit a cacheline in the L3 where a snoop was sen…
530         "Counter": "0,1,2,3",
539 …"BriefDescription": "Counts demand data reads that hit a cacheline in the L3 where a snoop hit in …
540         "Counter": "0,1,2,3",
549 …"BriefDescription": "Counts demand data reads that hit a cacheline in the L3 where a snoop hit in …
550         "Counter": "0,1,2,3",
559 …"BriefDescription": "Counts demand data reads that hit a cacheline in the L3 where a snoop was sen…
560         "Counter": "0,1,2,3",
569 …"BriefDescription": "Counts demand data reads that hit a cacheline in the L3 where a snoop was not…
570         "Counter": "0,1,2,3",
579 …"BriefDescription": "Counts demand data reads that hit a cacheline in the L3 where a snoop was sen…
580         "Counter": "0,1,2,3",
589 …tware prefetches for exclusive ownership (PREFETCHW) that hit a cacheline in the L3 where a snoop …
590         "Counter": "0,1,2,3",
599 …tware prefetches for exclusive ownership (PREFETCHW) that hit a cacheline in the L3 where a snoop …
600         "Counter": "0,1,2,3",
609 …tware prefetches for exclusive ownership (PREFETCHW) that hit a cacheline in the L3 where a snoop …
610         "Counter": "0,1,2,3",
619 …tware prefetches for exclusive ownership (PREFETCHW) that hit a cacheline in the L3 where a snoop …
620         "Counter": "0,1,2,3",
629 …tware prefetches for exclusive ownership (PREFETCHW) that hit a cacheline in the L3 where a snoop …
630         "Counter": "0,1,2,3",
639 …tware prefetches for exclusive ownership (PREFETCHW) that hit a cacheline in the L3 where a snoop …
640         "Counter": "0,1,2,3",
649 … requests and software prefetches (except PREFETCHW) that hit a cacheline in the L3 where a snoop …
650         "Counter": "0,1,2,3",
659 … requests and software prefetches (except PREFETCHW) that hit a cacheline in the L3 where a snoop …
660         "Counter": "0,1,2,3",
669 … requests and software prefetches (except PREFETCHW) that hit a cacheline in the L3 where a snoop …
670         "Counter": "0,1,2,3",
679 …rdware prefetch data reads (which bring data to L2)  that hit a cacheline in the L3 where a snoop …
680         "Counter": "0,1,2,3",
689 …rdware prefetch data reads (which bring data to L2)  that hit a cacheline in the L3 where a snoop …
690         "Counter": "0,1,2,3",
699 …rdware prefetch data reads (which bring data to L2)  that hit a cacheline in the L3 where a snoop …
700         "Counter": "0,1,2,3",
709 …rdware prefetch data reads (which bring data to L2)  that hit a cacheline in the L3 where a snoop …
710         "Counter": "0,1,2,3",
719 …rdware prefetch data reads (which bring data to L2)  that hit a cacheline in the L3 where a snoop …
720         "Counter": "0,1,2,3",
729 …rdware prefetch data reads (which bring data to L2)  that hit a cacheline in the L3 where a snoop …
730         "Counter": "0,1,2,3",
739 …unts hardware prefetch RFOs (which bring data to L2) that hit a cacheline in the L3 where a snoop …
740         "Counter": "0,1,2,3",
749 …unts hardware prefetch RFOs (which bring data to L2) that hit a cacheline in the L3 where a snoop …
750         "Counter": "0,1,2,3",
759 …unts hardware prefetch RFOs (which bring data to L2) that hit a cacheline in the L3 where a snoop …
760         "Counter": "0,1,2,3",
769 …unts hardware prefetch RFOs (which bring data to L2) that hit a cacheline in the L3 where a snoop …
770         "Counter": "0,1,2,3",
779 …unts hardware prefetch RFOs (which bring data to L2) that hit a cacheline in the L3 where a snoop …
780         "Counter": "0,1,2,3",
789 …unts hardware prefetch RFOs (which bring data to L2) that hit a cacheline in the L3 where a snoop …
790         "Counter": "0,1,2,3",
799 …ription": "Counts hardware prefetches to the L3 only that hit a cacheline in the L3 where a snoop …
800         "Counter": "0,1,2,3",
809 …eous requests, such as I/O and un-cacheable accesses that hit a cacheline in the L3 where a snoop …
810         "Counter": "0,1,2,3",
819 …eous requests, such as I/O and un-cacheable accesses that hit a cacheline in the L3 where a snoop …
820         "Counter": "0,1,2,3",
829 …eous requests, such as I/O and un-cacheable accesses that hit a cacheline in the L3 where a snoop …
830         "Counter": "0,1,2,3",
839 …eous requests, such as I/O and un-cacheable accesses that hit a cacheline in the L3 where a snoop …
840         "Counter": "0,1,2,3",
849 …"BriefDescription": "Counts streaming stores that hit a cacheline in the L3 where a snoop was sent…
850         "Counter": "0,1,2,3",
860         "Counter": "0,1,2,3",
869         "Counter": "0,1,2,3",
878         "Counter": "0,1,2,3",
887         "Counter": "0,1,2,3",
896         "Counter": "0,1,2,3",
905         "Counter": "0,1,2,3",
915         "Counter": "0,1,2,3",
919 …outstanding Demand RFO request is pending.   RFOs are initiated by a core as part of a data store …
925         "Counter": "0,1,2,3",
934         "Counter": "0,1,2,3",
943         "Counter": "0,1,2,3",
946 …created by issuing an atomic instruction (via the LOCK prefix) which causes a cache line split or …
952         "Counter": "0,1,2,3",
961         "Counter": "0,1,2,3",
969         "Counter": "0,1,2,3",
978         "Counter": "0,1,2,3",
987         "Counter": "0,1,2,3",
996         "Counter": "0,1,2,3",