x86/meteorlake/pipeline.json

18 …y executing divide or square root operations. Accounts for integer and floating-point operations.",
228 …-speculative execution path is known. The branch prediction unit (BPU) predicts the target address…
283         "BriefDescription": "Mispredicted non-taken conditional branch instructions retired.",
294 …"BriefDescription": "Mispredicted non-taken conditional branch instructions retired. This precise …
343 …"BriefDescription": "Miss-predicted near indirect branch instructions retired (excluding returns)",
348 …"PublicDescription": "Counts miss-predicted near indirect branch instructions retired excluding re…
429 …"PublicDescription": "This is a non-precise version (that is, does not use PEBS) of the event that…
454 …"BriefDescription": "Core clocks when the thread is in the C0.1 light-weight slower wakeup time bu…
458 …"PublicDescription": "Counts core clocks when the thread is in the C0.1 light-weight slower wakeup…
464 …"BriefDescription": "Core clocks when the thread is in the C0.2 light-weight faster wakeup time bu…
468 …"PublicDescription": "Counts core clocks when the thread is in the C0.2 light-weight faster wakeup…
544 …stal clock cycle counts between active hyperthreads, i.e., those in C0 sleep-state. A hyperthread …
561 …ot clocked immediately so the overflow status bit will flip 'high (1)' and generate another PMI (i…
581 …ot clocked immediately so the overflow status bit will flip 'high (1)' and generate another PMI (i…
780         "BriefDescription": "Number of instructions retired. Fixed Counter - architectural event",
784 …"PublicDescription": "Counts the number of X86 instructions retired - an Architectural PerfMon eve…
798         "BriefDescription": "Number of instructions retired. General Counter - architectural event",
803 …"PublicDescription": "Counts the number of X86 instructions retired - an Architectural PerfMon eve…
829         "BriefDescription": "Precise instruction retired with PEBS precise-distribution",
844 …imes as specified by the RCX register. Note the number of iterations is implementation-dependent.",
897 …icDescription": "Estimated number of Top-down Microarchitecture Analysis slots that got dropped du…
921         "BriefDescription": "integer ADD, SUB, SAD 128-bit vector instructions.",
925 …"PublicDescription": "Number of retired integer ADD/SUB (regular or horizontal), SAD 128-bit vecto…
931         "BriefDescription": "integer ADD, SUB, SAD 256-bit vector instructions.",
935 …"PublicDescription": "Number of retired integer ADD/SUB (regular or horizontal), SAD 256-bit vecto…
1038 …"PublicDescription": "Counts all not software-prefetch load dispatches that hit the fill buffer (F…
1049 …iption": "Counts the cycles when at least one uop is delivered by the LSD (Loop-stream detector).",
1060 …": "Counts the cycles when optimal number of uops is delivered by the LSD (Loop-stream detector).",
1070 …"PublicDescription": "Counts the number of uops delivered to the back-end by the LSD(Loop Stream D…
1114 …ounts the number of machine clears due to a page fault.  Counts both I-Side and D-Side (Loads/Stor…
1141         "BriefDescription": "Self-modifying code (SMC) detected.",
1145 …   "PublicDescription": "Counts self-modifying code (SMC) detected, which causes a machine clear.",
1189 … the Topdown Slots event that were not consumed by the back-end pipeline due to lack of back-end r…
1193 …-end pipeline due to lack of back-end resources, as a result of memory subsystem delays, execution…
1203 …ed due to incorrect speculation. It covers all types of control-flow or data-related mis-speculati…
1213 …speculative operations that were issued but not retired as well as the out-of-order engine recover…
1228 …"BriefDescription": "TMA slots available for an unhalted logical processor. Fixed counter - archit…
1231 …-width of the narrowest pipeline as employed by the Top-down Microarchitecture Analysis method (TM…
1237 …n": "TMA slots available for an unhalted logical processor. General counter - architectural event",
1241 …-width of the narrowest pipeline as employed by the Top-down Microarchitecture Analysis method. Th…
1335 …y cycle that were not consumed by the backend due to IEC and FPC RAT stalls - which can be due to …
1494         "BriefDescription": "Number of non dec-by-all uops decoded by decoder",
1498 …  "PublicDescription": "This event counts the number of not dec-by-all uops decoded by decoder 0.",
1584 …    "BriefDescription": "Cycles at least 1 micro-op is executed from any thread on physical core.",
1589 …"PublicDescription": "Counts cycles when at least 1 micro-op is executed from any thread on physic…
1595 …    "BriefDescription": "Cycles at least 2 micro-op is executed from any thread on physical core.",
1600 …"PublicDescription": "Counts cycles when at least 2 micro-ops are executed from any thread on phys…
1606 …    "BriefDescription": "Cycles at least 3 micro-op is executed from any thread on physical core.",
1611 …"PublicDescription": "Counts cycles when at least 3 micro-ops are executed from any thread on phys…
1617 …    "BriefDescription": "Cycles at least 4 micro-op is executed from any thread on physical core.",
1622 …"PublicDescription": "Counts cycles when at least 4 micro-ops are executed from any thread on phys…
1628         "BriefDescription": "Cycles where at least 1 uop was executed per-thread",
1633         "PublicDescription": "Cycles where at least 1 uop was executed per-thread.",
1639         "BriefDescription": "Cycles where at least 2 uops were executed per-thread",
1644         "PublicDescription": "Cycles where at least 2 uops were executed per-thread.",
1650         "BriefDescription": "Cycles where at least 3 uops were executed per-thread",
1655         "PublicDescription": "Cycles where at least 3 uops were executed per-thread.",
1661         "BriefDescription": "Cycles where at least 4 uops were executed per-thread",
1666         "PublicDescription": "Cycles where at least 4 uops were executed per-thread.",
1684         "BriefDescription": "Counts the number of uops to be executed per-thread each cycle.",
1707 …he number of uops issued by the front end every cycle. When 4-uops are requested and only 2-uops a…
1755 …"PublicDescription": "Counts the number of retired micro-operations (uops) except the last uop of …
1770 …ounts the number of uops that are from the complex flows issued by the micro-sequencer (MS).  This…
1790 …orrelates with higher performance  for example, as measured by the instructions-per-cycle metric.",
1794 …he instructions-per-cycle metric. Software can use this event as the numerator for the Retiring me…