Lines Matching full:back
85 …ecoded instruction-cache) miss. Critical means stalls were exposed to the back-end as a result of …
146 …delivered no uops for a period of at least 1 cycle which was not interrupted by a back-end stall.",
152 …t-end delivered no uops for a period of 128 cycles which was not interrupted by a back-end stall.",
159 …t-end delivered no uops for a period of 128 cycles which was not interrupted by a back-end stall.",
165 …nt-end delivered no uops for a period of 16 cycles which was not interrupted by a back-end stall.",
172 …"PublicDescription": "Counts retired instructions that are delivered to the back-end after a front…
185 …elivered no uops for a period of at least 2 cycles which was not interrupted by a back-end stall.",
191 …t-end delivered no uops for a period of 256 cycles which was not interrupted by a back-end stall.",
198 …t-end delivered no uops for a period of 256 cycles which was not interrupted by a back-end stall.",
204 …ad at least 1 bubble-slot for a period of 2 cycles which was not interrupted by a back-end stall.",
211 …"PublicDescription": "Counts retired instructions that are delivered to the back-end after the fro…
217 …nt-end delivered no uops for a period of 32 cycles which was not interrupted by a back-end stall.",
224 …"PublicDescription": "Counts retired instructions that are delivered to the back-end after a front…
230 …ont-end delivered no uops for a period of 4 cycles which was not interrupted by a back-end stall.",
237 …ont-end delivered no uops for a period of 4 cycles which was not interrupted by a back-end stall.",
243 …t-end delivered no uops for a period of 512 cycles which was not interrupted by a back-end stall.",
250 …t-end delivered no uops for a period of 512 cycles which was not interrupted by a back-end stall.",
256 …nt-end delivered no uops for a period of 64 cycles which was not interrupted by a back-end stall.",
263 …nt-end delivered no uops for a period of 64 cycles which was not interrupted by a back-end stall.",
269 …ont-end delivered no uops for a period of 8 cycles which was not interrupted by a back-end stall.",
276 …"PublicDescription": "Counts retired instructions that are delivered to the back-end after a front…
478 …at when no operation was delivered to the back-end pipeline due to instruction fetch limitations w…
482 …at when no operation was delivered to the back-end pipeline due to instruction fetch limitations w…
493 …livered by the Instruction Decode Queue (IDQ) to the back-end of the pipeline when there was no ba…
499 …ption": "Cycles when optimal number of uops was delivered to the back-end when the back-end is not…
505 …livered by the Instruction Decode Queue (IDQ) to the back-end of the pipeline when there was no ba…
515 …ered to by the Instruction Decode Queue (IDQ) to the back-end of the pipeline when there was no ba…
526 …livered by the Instruction Decode Queue (IDQ) to the back-end of the pipeline when there was no ba…
532 …ption": "Cycles when optimal number of uops was delivered to the back-end when the back-end is not…
538 …livered by the Instruction Decode Queue (IDQ) to the back-end of the pipeline when there was no ba…