x86/lunarlake/memory.json

3 …"BriefDescription": "Counts randomly selected loads when the latency from first dispatch to comple…
11 …s when the latency from first dispatch to completion is greater than 1024 cycles.  Reported latenc…
17 …"BriefDescription": "Counts randomly selected loads when the latency from first dispatch to comple…
25 …s when the latency from first dispatch to completion is greater than 128 cycles.  Reported latency…
31 …"BriefDescription": "Counts randomly selected loads when the latency from first dispatch to comple…
39 …ds when the latency from first dispatch to completion is greater than 16 cycles.  Reported latency…
45 …"BriefDescription": "Counts randomly selected loads when the latency from first dispatch to comple…
53 …s when the latency from first dispatch to completion is greater than 2048 cycles.  Reported latenc…
59 …"BriefDescription": "Counts randomly selected loads when the latency from first dispatch to comple…
67 …s when the latency from first dispatch to completion is greater than 256 cycles.  Reported latency…
73 …"BriefDescription": "Counts randomly selected loads when the latency from first dispatch to comple…
81 …ds when the latency from first dispatch to completion is greater than 32 cycles.  Reported latency…
87 …"BriefDescription": "Counts randomly selected loads when the latency from first dispatch to comple…
95 …ds when the latency from first dispatch to completion is greater than 4 cycles.  Reported latency …
101 …"BriefDescription": "Counts randomly selected loads when the latency from first dispatch to comple…
109 …s when the latency from first dispatch to completion is greater than 512 cycles.  Reported latency…
115 …"BriefDescription": "Counts randomly selected loads when the latency from first dispatch to comple…
123 …ds when the latency from first dispatch to completion is greater than 64 cycles.  Reported latency…
129 …"BriefDescription": "Counts randomly selected loads when the latency from first dispatch to comple…
137 …ds when the latency from first dispatch to completion is greater than 8 cycles.  Reported latency …
143 …ription": "Retired memory store access operations. A PDist event for PEBS Store Latency Facility.",
149 … (PDist) trigger covering all stores uops for sampling by the PEBS Store Latency Facility. The fac…