Lines Matching +full:3 +full:at
4 "Counter": "0,1,2,3",
15 "Counter": "0,1,2,3",
24 "Counter": "0,1,2,3",
33 "Counter": "0,1,2,3",
42 "Counter": "0,1,2,3",
51 "Counter": "0,1,2,3",
60 "Counter": "0,1,2,3",
69 "Counter": "0,1,2,3",
77 "Counter": "0,1,2,3",
86 "Counter": "0,1,2,3",
95 "Counter": "0,1,2,3",
104 "Counter": "0,1,2,3",
113 "Counter": "0,1,2,3",
122 "Counter": "0,1,2,3",
131 "Counter": "0,1,2,3",
140 "Counter": "0,1,2,3",
143 "PublicDescription": "Branch instructions at retirement.",
148 "Counter": "0,1,2,3",
157 "Counter": "0,1,2,3",
166 "Counter": "0,1,2,3",
175 "Counter": "0,1,2,3",
183 …riefDescription": "Direct and indirect macro near call instructions retired (captured in ring 3).",
184 "Counter": "0,1,2,3",
193 "Counter": "0,1,2,3",
202 "Counter": "0,1,2,3",
211 "Counter": "0,1,2,3",
220 "Counter": "0,1,2,3",
229 "Counter": "0,1,2,3",
238 "Counter": "0,1,2,3",
247 "Counter": "0,1,2,3",
250 …"PublicDescription": "Counts speculatively miss-predicted indirect branches at execution time. Cou…
256 "Counter": "0,1,2,3",
265 "Counter": "0,1,2,3",
274 "Counter": "0,1,2,3",
283 "Counter": "0,1,2,3",
292 "Counter": "0,1,2,3",
301 "Counter": "0,1,2,3",
304 "PublicDescription": "Mispredicted branch instructions at retirement.",
309 "Counter": "0,1,2,3",
318 "Counter": "0,1,2,3",
327 "Counter": "0,1,2,3",
336 "Counter": "0,1,2,3",
343 "BriefDescription": "Reference cycles when the thread is unhalted (counts at 100 MHz rate)",
344 "Counter": "0,1,2,3",
347 "PublicDescription": "Increments at the frequency of XCLK (100 MHz) when not halted.",
353 …iefDescription": "Reference cycles when the at least one thread on the physical core is unhalted. …
354 "Counter": "0,1,2,3",
362 "Counter": "0,1,2,3",
376 "BriefDescription": "Reference cycles when the thread is unhalted (counts at 100 MHz rate)",
377 "Counter": "0,1,2,3",
380 … "PublicDescription": "Reference cycles when the thread is unhalted. (counts at 100 MHz rate)",
386 …iefDescription": "Reference cycles when the at least one thread on the physical core is unhalted. …
387 "Counter": "0,1,2,3",
402 …"BriefDescription": "Core cycles when at least one thread on the physical core is not in halt stat…
405 …"PublicDescription": "Core cycles when at least one thread on the physical core is not in halt sta…
411 "Counter": "0,1,2,3",
419 …"BriefDescription": "Core cycles when at least one thread on the physical core is not in halt stat…
420 "Counter": "0,1,2,3",
423 …"PublicDescription": "Core cycles when at least one thread on the physical core is not in halt sta…
447 "Counter": "0,1,2,3",
456 "Counter": "0,1,2,3",
466 "Counter": "0,1,2,3",
476 "Counter": "0,1,2,3",
485 "Counter": "0,1,2,3",
514 "Counter": "0,1,2,3",
523 "Counter": "0,1,2,3",
533 "Counter": "0,1,2,3",
542 "Counter": "0,1,2,3",
551 "Counter": "0,1,2,3",
560 "Counter": "0,1,2,3",
569 "Counter": "0,1,2,3",
584 "Counter": "0,1,2,3",
587 "PublicDescription": "Number of instructions at retirement.",
602 "Counter": "0,1,2,3",
612 "Counter": "0,1,2,3",
621 "Counter": "0,1,2,3",
631 "Counter": "0,1,2,3",
640 "Counter": "0,1,2,3",
649 "Counter": "0,1,2,3",
658 "Counter": "0,1,2,3",
667 "Counter": "0,1,2,3",
676 "Counter": "0,1,2,3",
686 "Counter": "0,1,2,3",
696 "Counter": "0,1,2,3",
704 "Counter": "0,1,2,3",
714 "Counter": "0,1,2,3",
723 "Counter": "0,1,2,3",
732 "Counter": "0,1,2,3",
740 "Counter": "0,1,2,3",
748 "Counter": "0,1,2,3",
756 "Counter": "0,1,2,3",
765 "Counter": "0,1,2,3",
773 "Counter": "0,1,2,3",
781 "Counter": "0,1,2,3",
790 "Counter": "0,1,2,3",
799 "Counter": "0,1,2,3",
808 "Counter": "0,1,2,3",
819 "Counter": "0,1,2,3",
829 "Counter": "0,1,2,3",
838 "Counter": "0,1,2,3",
848 "Counter": "0,1,2,3",
857 "Counter": "0,1,2,3",
867 "Counter": "0,1,2,3",
874 "BriefDescription": "Cycles per thread when load or STA uops are dispatched to port 3",
875 "Counter": "0,1,2,3",
878 "PublicDescription": "Cycles which a Uop is dispatched on port 3.",
884 "BriefDescription": "Cycles per core when load or STA uops are dispatched to port 3",
885 "Counter": "0,1,2,3",
888 "PublicDescription": "Cycles per core when load or STA uops are dispatched to port 3.",
894 "Counter": "0,1,2,3",
904 "Counter": "0,1,2,3",
913 "Counter": "0,1,2,3",
923 "Counter": "0,1,2,3",
932 "Counter": "0,1,2,3",
940 … "BriefDescription": "Cycles at least 1 micro-op is executed from any thread on physical core",
941 "Counter": "0,1,2,3",
945 … "PublicDescription": "Cycles at least 1 micro-op is executed from any thread on physical core.",
950 … "BriefDescription": "Cycles at least 2 micro-op is executed from any thread on physical core",
951 "Counter": "0,1,2,3",
955 … "PublicDescription": "Cycles at least 2 micro-op is executed from any thread on physical core.",
960 … "BriefDescription": "Cycles at least 3 micro-op is executed from any thread on physical core",
961 "Counter": "0,1,2,3",
962 "CounterMask": "3",
965 … "PublicDescription": "Cycles at least 3 micro-op is executed from any thread on physical core.",
970 … "BriefDescription": "Cycles at least 4 micro-op is executed from any thread on physical core",
971 "Counter": "0,1,2,3",
975 … "PublicDescription": "Cycles at least 4 micro-op is executed from any thread on physical core.",
981 "Counter": "0,1,2,3",
990 "BriefDescription": "Cycles where at least 1 uop was executed per-thread",
991 "Counter": "0,1,2,3",
995 "PublicDescription": "Cycles where at least 1 uop was executed per-thread.",
1000 "BriefDescription": "Cycles where at least 2 uops were executed per-thread",
1001 "Counter": "0,1,2,3",
1005 "PublicDescription": "Cycles where at least 2 uops were executed per-thread.",
1010 "BriefDescription": "Cycles where at least 3 uops were executed per-thread",
1011 "Counter": "0,1,2,3",
1012 "CounterMask": "3",
1015 "PublicDescription": "Cycles where at least 3 uops were executed per-thread.",
1020 "BriefDescription": "Cycles where at least 4 uops were executed per-thread",
1021 "Counter": "0,1,2,3",
1025 "PublicDescription": "Cycles where at least 4 uops were executed per-thread.",
1031 "Counter": "0,1,2,3",
1041 "Counter": "0,1,2,3",
1050 "Counter": "0,1,2,3",
1060 "Counter": "0,1,2,3",
1071 "Counter": "0,1,2,3",
1080 "Counter": "0,1,2,3",
1088 …w LEA uops being allocated. A uop is generally considered SlowLea if it has 3 sources (e.g. 2 sour…
1089 "Counter": "0,1,2,3",
1092 …"PublicDescription": "Number of slow LEA or similar uops allocated. Such uop has 3 sources (e.g. 2…
1098 "Counter": "0,1,2,3",
1109 "Counter": "0,1,2,3",
1119 "Counter": "0,1,2,3",
1129 "Counter": "0,1,2,3",
1138 "Counter": "0,1,2,3",
1148 "Counter": "0,1,2,3",