x86/ivytown/cache.json

51         "BriefDescription": "Not rejected writebacks from L1D to L2 cache lines in any state.",
59         "BriefDescription": "Not rejected writebacks from L1D to L2 cache lines in E state",
63         "PublicDescription": "Not rejected writebacks from L1D to L2 cache lines in E state.",
68         "BriefDescription": "Not rejected writebacks from L1D to L2 cache lines in M state",
72         "PublicDescription": "Not rejected writebacks from L1D to L2 cache lines in M state.",
77 …"BriefDescription": "Count the number of modified Lines evicted from L1 and missed L2. (Non-reject…
86         "BriefDescription": "L2 cache lines filling L2",
90         "PublicDescription": "L2 cache lines filling L2.",
95         "BriefDescription": "L2 cache lines in E state filling L2",
99         "PublicDescription": "L2 cache lines in E state filling L2.",
104         "BriefDescription": "L2 cache lines in I state filling L2",
108         "PublicDescription": "L2 cache lines in I state filling L2.",
113         "BriefDescription": "L2 cache lines in S state filling L2",
117         "PublicDescription": "L2 cache lines in S state filling L2.",
122         "BriefDescription": "Clean L2 cache lines evicted by demand",
126         "PublicDescription": "Clean L2 cache lines evicted by demand.",
131         "BriefDescription": "Dirty L2 cache lines evicted by demand",
135         "PublicDescription": "Dirty L2 cache lines evicted by demand.",
140         "BriefDescription": "Dirty L2 cache lines filling the L2",
144         "PublicDescription": "Dirty L2 cache lines filling the L2.",
149         "BriefDescription": "Clean L2 cache lines evicted by L2 prefetch",
153         "PublicDescription": "Clean L2 cache lines evicted by the MLC prefetcher.",
158         "BriefDescription": "Dirty L2 cache lines evicted by L2 prefetch",
162         "PublicDescription": "Dirty L2 cache lines evicted by the MLC prefetcher.",
167         "BriefDescription": "L2 code requests",
171         "PublicDescription": "Counts all L2 code requests.",
180         "PublicDescription": "Counts any demand and L1 HW prefetch data load requests to L2.",
185         "BriefDescription": "Requests from L2 hardware prefetchers",
189         "PublicDescription": "Counts all L2 HW prefetcher requests.",
194         "BriefDescription": "RFO requests to L2 cache",
198         "PublicDescription": "Counts all L2 store RFO requests.",
203         "BriefDescription": "L2 cache hits when fetching instructions, code reads.",
207         "PublicDescription": "Number of instruction fetches that hit the L2 cache.",
212         "BriefDescription": "L2 cache misses when fetching instructions",
216         "PublicDescription": "Number of instruction fetches that missed the L2 cache.",
221         "BriefDescription": "Demand Data Read requests that hit L2 cache",
225         "PublicDescription": "Demand Data Read requests that hit L2 cache.",
230         "BriefDescription": "Requests from the L2 hardware prefetchers that hit L2 cache",
234         "PublicDescription": "Counts all L2 HW prefetcher requests that hit L2.",
239         "BriefDescription": "Requests from the L2 hardware prefetchers that miss L2 cache",
243         "PublicDescription": "Counts all L2 HW prefetcher requests that missed L2.",
248         "BriefDescription": "RFO requests that hit L2 cache",
252         "PublicDescription": "RFO requests that hit L2 cache.",
257         "BriefDescription": "RFO requests that miss L2 cache",
261         "PublicDescription": "Counts the number of store RFO requests that miss the L2 cache.",
293         "BriefDescription": "L2 or LLC HW prefetches that access L2 cache",
297         "PublicDescription": "Any MLC or LLC HW prefetch accessing L2, including rejects.",
302         "BriefDescription": "Transactions accessing L2 pipe",
306         "PublicDescription": "Transactions accessing L2 pipe.",
311         "BriefDescription": "L2 cache accesses when fetching instructions",
315         "PublicDescription": "L2 cache accesses when fetching instructions.",
320         "BriefDescription": "Demand Data Read requests that access L2 cache",
324         "PublicDescription": "Demand Data Read requests that access L2 cache.",
329         "BriefDescription": "L1D writebacks that access L2 cache",
333         "PublicDescription": "L1D writebacks that access L2 cache.",
338         "BriefDescription": "L2 fill requests that access L2 cache",
342         "PublicDescription": "L2 fill requests that access L2 cache.",
347         "BriefDescription": "L2 writebacks that access L2 cache",
351         "PublicDescription": "L2 writebacks that access L2 cache.",
356         "BriefDescription": "RFO requests that access L2 cache",
360         "PublicDescription": "RFO requests that access L2 cache.",
487         "BriefDescription": "Retired load uops with L2 cache hits as data sources.",
496         "BriefDescription": "Retired load uops with L2 cache misses as data sources.",
937 …"BriefDescription": "Counts L2 hints sent to LLC to keep a line from being evicted out of the core…
957 …  "BriefDescription": "Counts all prefetch (that bring data to L2) code reads that hit in the LLC",
967 …      "BriefDescription": "Counts prefetch (that bring data to L2) data reads that hit in the LLC",
977 …"BriefDescription": "Counts prefetch (that bring data to L2) data reads that hit in the LLC and th…
987 …"BriefDescription": "Counts prefetch (that bring data to L2) data reads that hit in the LLC and th…
997 …"BriefDescription": "Counts prefetch (that bring data to L2) data reads that hit in the LLC and si…
1007 …"BriefDescription": "Counts prefetch (that bring data to L2) data reads that hit in the LLC and th…