Lines Matching full:cycles

21         "BriefDescription": "Decode Stream Buffer (DSB)-to-MITE switch true penalty cycles",
25 "PublicDescription": "Cycles DSB to MITE switches caused delay.",
30 …"BriefDescription": "Cycles when Decode Stream Buffer (DSB) fill encounter more than 3 Decode Stre…
48 …"BriefDescription": "Cycles where a code-fetch stalled due to L1 instruction-cache miss or an iTLB…
52 …"PublicDescription": "Cycles where a code-fetch stalled due to L1 instruction-cache miss or an iTL…
66 "BriefDescription": "Cycles Decode Stream Buffer (DSB) is delivering 4 Uops",
71 "PublicDescription": "Counts cycles DSB is delivered four uops. Set Cmask = 4.",
76 "BriefDescription": "Cycles Decode Stream Buffer (DSB) is delivering any Uop",
81 "PublicDescription": "Counts cycles DSB is delivered at least one uops. Set Cmask = 1.",
86 "BriefDescription": "Cycles MITE is delivering 4 Uops",
91 "PublicDescription": "Counts cycles MITE is delivered four uops. Set Cmask = 4.",
96 "BriefDescription": "Cycles MITE is delivering any Uop",
101 "PublicDescription": "Counts cycles MITE is delivered at least one uops. Set Cmask = 1.",
106 …"BriefDescription": "Cycles when uops are being delivered to Instruction Decode Queue (IDQ) from D…
111 …"PublicDescription": "Cycles when uops are being delivered to Instruction Decode Queue (IDQ) from …
120 …: "Increment each cycle. # of uops delivered to IDQ from DSB path. Set Cmask = 1 to count cycles.",
125 "BriefDescription": "Instruction Decode Queue (IDQ) empty cycles",
129 "PublicDescription": "Counts cycles the IDQ is empty.",
143 …"BriefDescription": "Cycles when uops are being delivered to Instruction Decode Queue (IDQ) from M…
148 …"PublicDescription": "Cycles when uops are being delivered to Instruction Decode Queue (IDQ) from …
157 …: "Increment each cycle # of uops delivered to IDQ from MITE path. Set Cmask = 1 to count cycles.",
162 …"BriefDescription": "Cycles when uops are being delivered to Instruction Decode Queue (IDQ) while …
167 …"PublicDescription": "Cycles when uops are being delivered to Instruction Decode Queue (IDQ) while…
172 …"BriefDescription": "Cycles when uops initiated by Decode Stream Buffer (DSB) are being delivered …
177 …"PublicDescription": "Cycles when uops initiated by Decode Stream Buffer (DSB) are being delivered…
197 …e # of uops delivered to IDQ when MS_busy by DSB. Set Cmask = 1 to count cycles. Add Edge=1 to cou…
206 …rement each cycle # of uops delivered to IDQ when MS_busy by MITE. Set Cmask = 1 to count cycles.",
226 …ch cycle # of uops delivered to IDQ from MS by either DSB or MITE. Set Cmask = 1 to count cycles.",
240 …"BriefDescription": "Cycles per thread when 4 or more uops are not delivered to Resource Allocatio…
249 …"BriefDescription": "Counts cycles FE delivered 4 uops or Resource Allocation Table (RAT) was stal…
259 …"BriefDescription": "Cycles per thread when 3 or more uops are not delivered to Resource Allocatio…
268 "BriefDescription": "Cycles with less than 2 uops delivered by the front end.",
277 "BriefDescription": "Cycles with less than 3 uops delivered by the front end.",