x86/haswellx/pipeline.json

4         "Counter": "0,1,2,3",
12         "Counter": "0,1,2,3",
21         "Counter": "0,1,2,3",
29         "Counter": "0,1,2,3",
37         "Counter": "0,1,2,3",
45         "Counter": "0,1,2,3",
53         "Counter": "0,1,2,3",
61         "Counter": "0,1,2,3",
69         "Counter": "0,1,2,3",
77         "Counter": "0,1,2,3",
85         "Counter": "0,1,2,3",
93         "Counter": "0,1,2,3",
101         "Counter": "0,1,2,3",
109         "Counter": "0,1,2,3",
117         "Counter": "0,1,2,3",
120         "PublicDescription": "Branch instructions at retirement.",
125         "Counter": "0,1,2,3",
134         "Counter": "0,1,2,3",
144         "Counter": "0,1,2,3",
153         "Counter": "0,1,2,3",
161 …riefDescription": "Direct and indirect macro near call instructions retired (captured in ring 3).",
162         "Counter": "0,1,2,3",
171         "Counter": "0,1,2,3",
181         "Counter": "0,1,2,3",
191         "Counter": "0,1,2,3",
200         "Counter": "0,1,2,3",
209         "Counter": "0,1,2,3",
217         "Counter": "0,1,2,3",
225         "Counter": "0,1,2,3",
228 …"PublicDescription": "Counts speculatively miss-predicted indirect branches at execution time. Cou…
234         "Counter": "0,1,2,3",
242         "Counter": "0,1,2,3",
250         "Counter": "0,1,2,3",
258         "Counter": "0,1,2,3",
266         "Counter": "0,1,2,3",
274         "Counter": "0,1,2,3",
277         "PublicDescription": "Mispredicted branch instructions at retirement.",
282         "Counter": "0,1,2,3",
292         "Counter": "0,1,2,3",
301         "Counter": "0,1,2,3",
311         "Counter": "0,1,2,3",
318         "BriefDescription": "Reference cycles when the thread is unhalted (counts at 100 MHz rate)",
319         "Counter": "0,1,2,3",
322         "PublicDescription": "Increments at the frequency of XCLK (100 MHz) when not halted.",
328 …riefDescription": "Reference cycles when the at least one thread on the physical core is unhalted …
329         "Counter": "0,1,2,3",
332 …blicDescription": "Reference cycles when the at least one thread on the physical core is unhalted …
338         "Counter": "0,1,2,3",
353         "BriefDescription": "Reference cycles when the thread is unhalted (counts at 100 MHz rate)",
354         "Counter": "0,1,2,3",
357 …     "PublicDescription": "Reference cycles when the thread is unhalted. (counts at 100 MHz rate)",
363 …riefDescription": "Reference cycles when the at least one thread on the physical core is unhalted …
364         "Counter": "0,1,2,3",
367 …blicDescription": "Reference cycles when the at least one thread on the physical core is unhalted …
381 …"BriefDescription": "Core cycles when at least one thread on the physical core is not in halt stat…
389         "Counter": "0,1,2,3",
397 …"BriefDescription": "Core cycles when at least one thread on the physical core is not in halt stat…
398         "Counter": "0,1,2,3",
415         "Counter": "0,1,2,3",
426         "Counter": "0,1,2,3",
436         "Counter": "0,1,2,3",
456         "Counter": "0,1,2,3",
467         "Counter": "0,1,2,3",
477         "Counter": "0,1,2,3",
486         "Counter": "0,1,2,3",
504         "Counter": "0,1,2,3",
508         "PublicDescription": "Number of instructions at retirement.",
524         "Counter": "0,1,2,3",
533         "Counter": "0,1,2,3",
544         "Counter": "0,1,2,3",
554         "Counter": "0,1,2,3",
563         "Counter": "0,1,2,3",
572         "Counter": "0,1,2,3",
581         "Counter": "0,1,2,3",
590         "Counter": "0,1,2,3",
599         "Counter": "0,1,2,3",
608         "Counter": "0,1,2,3",
617         "Counter": "0,1,2,3",
626         "Counter": "0,1,2,3",
636         "Counter": "0,1,2,3",
644         "Counter": "0,1,2,3",
652         "Counter": "0,1,2,3",
661         "Counter": "0,1,2,3",
670         "Counter": "0,1,2,3",
679         "Counter": "0,1,2,3",
688         "Counter": "0,1,2,3",
698         "Counter": "0,1,2,3",
706         "Counter": "0,1,2,3",
714         "Counter": "0,1,2,3",
723         "Counter": "0,1,2,3",
732         "Counter": "0,1,2,3",
741         "Counter": "0,1,2,3",
752         "Counter": "0,1,2,3",
760         "Counter": "0,1,2,3",
768         "Counter": "0,1,2,3",
775         "BriefDescription": "Cycles per thread when uops are executed in port 3.",
776         "Counter": "0,1,2,3",
784         "Counter": "0,1,2,3",
792         "Counter": "0,1,2,3",
800         "Counter": "0,1,2,3",
808         "Counter": "0,1,2,3",
816         "Counter": "0,1,2,3",
825 …    "BriefDescription": "Cycles at least 1 micro-op is executed from any thread on physical core.",
826         "Counter": "0,1,2,3",
835 …    "BriefDescription": "Cycles at least 2 micro-op is executed from any thread on physical core.",
836         "Counter": "0,1,2,3",
845 …    "BriefDescription": "Cycles at least 3 micro-op is executed from any thread on physical core.",
846         "Counter": "0,1,2,3",
847         "CounterMask": "3",
855 …    "BriefDescription": "Cycles at least 4 micro-op is executed from any thread on physical core.",
856         "Counter": "0,1,2,3",
866         "Counter": "0,1,2,3",
875         "BriefDescription": "Cycles where at least 1 uop was executed per-thread",
876         "Counter": "0,1,2,3",
881 …"PublicDescription": "This events counts the cycles where at least one uop was executed. It is cou…
886         "BriefDescription": "Cycles where at least 2 uops were executed per-thread",
887         "Counter": "0,1,2,3",
892 …"PublicDescription": "This events counts the cycles where at least two uop were executed. It is co…
897         "BriefDescription": "Cycles where at least 3 uops were executed per-thread",
898         "Counter": "0,1,2,3",
899         "CounterMask": "3",
903 …"PublicDescription": "This events counts the cycles where at least three uop were executed. It is …
908         "BriefDescription": "Cycles where at least 4 uops were executed per-thread.",
909         "Counter": "0,1,2,3",
919         "Counter": "0,1,2,3",
930         "Counter": "0,1,2,3",
940         "Counter": "0,1,2,3",
948         "Counter": "0,1,2,3",
958         "Counter": "0,1,2,3",
966         "Counter": "0,1,2,3",
976         "Counter": "0,1,2,3",
983         "BriefDescription": "Cycles per thread when uops are executed in port 3",
984         "Counter": "0,1,2,3",
987         "PublicDescription": "Cycles which a uop is dispatched on port 3 in this thread.",
993         "BriefDescription": "Cycles per core when uops are dispatched to port 3.",
994         "Counter": "0,1,2,3",
1002         "Counter": "0,1,2,3",
1012         "Counter": "0,1,2,3",
1020         "Counter": "0,1,2,3",
1030         "Counter": "0,1,2,3",
1038         "Counter": "0,1,2,3",
1048         "Counter": "0,1,2,3",
1056         "Counter": "0,1,2,3",
1066         "Counter": "0,1,2,3",
1074         "Counter": "0,1,2,3",
1077 …ed by the Front-end of the pipeline to the Back-end. This event is counted at the allocation stage…
1084         "Counter": "0,1,2,3",
1094         "Counter": "0,1,2,3",
1103         "Counter": "0,1,2,3",
1111 …w LEA uops being allocated. A uop is generally considered SlowLea if it has 3 sources (e.g. 2 sour…
1112         "Counter": "0,1,2,3",
1115 …"PublicDescription": "Number of slow LEA or similar uops allocated. Such uop has 3 sources (for ex…
1121         "Counter": "0,1,2,3",
1131         "Counter": "0,1,2,3",
1142         "Counter": "0,1,2,3",
1152         "Counter": "0,1,2,3",
1162         "Counter": "0,1,2,3",
1172         "Counter": "0,1,2,3",