Lines Matching full:back

69 …ecoded instruction-cache) miss. Critical means stalls were exposed to the back-end as a result of …
117 …delivered no uops for a period of at least 1 cycle which was not interrupted by a back-end stall.",
122 …t-end delivered no uops for a period of 128 cycles which was not interrupted by a back-end stall.",
129 …t-end delivered no uops for a period of 128 cycles which was not interrupted by a back-end stall.",
134 …nt-end delivered no uops for a period of 16 cycles which was not interrupted by a back-end stall.",
141 …"PublicDescription": "Counts retired instructions that are delivered to the back-end after a front…
153 …elivered no uops for a period of at least 2 cycles which was not interrupted by a back-end stall.",
158 …t-end delivered no uops for a period of 256 cycles which was not interrupted by a back-end stall.",
165 …t-end delivered no uops for a period of 256 cycles which was not interrupted by a back-end stall.",
170 …ad at least 1 bubble-slot for a period of 2 cycles which was not interrupted by a back-end stall.",
177 …"PublicDescription": "Counts retired instructions that are delivered to the back-end after the fro…
182 …nt-end delivered no uops for a period of 32 cycles which was not interrupted by a back-end stall.",
189 …"PublicDescription": "Counts retired instructions that are delivered to the back-end after a front…
194 …ont-end delivered no uops for a period of 4 cycles which was not interrupted by a back-end stall.",
201 …ont-end delivered no uops for a period of 4 cycles which was not interrupted by a back-end stall.",
206 …t-end delivered no uops for a period of 512 cycles which was not interrupted by a back-end stall.",
213 …t-end delivered no uops for a period of 512 cycles which was not interrupted by a back-end stall.",
218 …nt-end delivered no uops for a period of 64 cycles which was not interrupted by a back-end stall.",
225 …nt-end delivered no uops for a period of 64 cycles which was not interrupted by a back-end stall.",
230 …ont-end delivered no uops for a period of 8 cycles which was not interrupted by a back-end stall.",
237 …"PublicDescription": "Counts retired instructions that are delivered to the back-end after a front…
416 …at when no operation was delivered to the back-end pipeline due to instruction fetch limitations w…
420 …at when no operation was delivered to the back-end pipeline due to instruction fetch limitations w…
430 …livered by the Instruction Decode Queue (IDQ) to the back-end of the pipeline when there was no ba…
435 …ption": "Cycles when optimal number of uops was delivered to the back-end when the back-end is not…
441 …livered by the Instruction Decode Queue (IDQ) to the back-end of the pipeline when there was no ba…
450 …ered to by the Instruction Decode Queue (IDQ) to the back-end of the pipeline when there was no ba…
460 …livered by the Instruction Decode Queue (IDQ) to the back-end of the pipeline when there was no ba…
465 …ption": "Cycles when optimal number of uops was delivered to the back-end when the back-end is not…
471 …livered by the Instruction Decode Queue (IDQ) to the back-end of the pipeline when there was no ba…