x86/grandridge/pipeline.json

3         "BriefDescription": "Counts the number of cycles when any of the dividers are active.",
4         "Counter": "0,1,2,3,4,5,6,7",
5         "CounterMask": "1",
12 …"BriefDescription": "Counts the total number of branch instructions retired for all branch types.",
13         "Counter": "0,1,2,3,4,5,6,7",
16 …"PublicDescription": "Counts the total number of instructions in which the instruction pointer (IP…
20 …"BriefDescription": "Counts the number of retired JCC (Jump on Conditional Code) branch instructio…
21         "Counter": "0,1,2,3,4,5,6,7",
28 …"BriefDescription": "Counts the number of taken JCC (Jump on Conditional Code) branch instructions…
29         "Counter": "0,1,2,3,4,5,6,7",
36 …"BriefDescription": "Counts the number of far branch instructions retired, includes far jump, far …
37         "Counter": "0,1,2,3,4,5,6,7",
44 …"BriefDescription": "Counts the number of near indirect JMP and near indirect CALL branch instruct…
45         "Counter": "0,1,2,3,4,5,6,7",
52         "BriefDescription": "Counts the number of near indirect CALL branch instructions retired.",
53         "Counter": "0,1,2,3,4,5,6,7",
61         "Counter": "0,1,2,3,4,5,6,7",
62         "Deprecated": "1",
69         "BriefDescription": "Counts the number of near CALL branch instructions retired.",
70         "Counter": "0,1,2,3,4,5,6,7",
77         "BriefDescription": "Counts the number of near RET branch instructions retired.",
78         "Counter": "0,1,2,3,4,5,6,7",
85 …"BriefDescription": "Counts the total number of mispredicted branch instructions retired for all b…
86         "Counter": "0,1,2,3,4,5,6,7",
89 …of mispredicted branch instructions retired.  All branch type instructions are accounted for.  Pre…
93 …"BriefDescription": "Counts the number of mispredicted JCC (Jump on Conditional Code) branch instr…
94         "Counter": "0,1,2,3,4,5,6,7",
101 …"BriefDescription": "Counts the number of mispredicted taken JCC (Jump on Conditional Code) branch…
102         "Counter": "0,1,2,3,4,5,6,7",
109 …"BriefDescription": "Counts the number of mispredicted near indirect JMP and near indirect CALL br…
110         "Counter": "0,1,2,3,4,5,6,7",
117 …"BriefDescription": "Counts the number of mispredicted near indirect CALL branch instructions reti…
118         "Counter": "0,1,2,3,4,5,6,7",
125 …   "BriefDescription": "Counts the number of mispredicted near taken branch instructions retired.",
126         "Counter": "0,1,2,3,4,5,6,7",
133 …     "BriefDescription": "Counts the number of mispredicted near RET branch instructions retired.",
134         "Counter": "0,1,2,3,4,5,6,7",
141         "BriefDescription": "Fixed Counter: Counts the number of unhalted core clock cycles",
142         "Counter": "Fixed counter 1",
148 …"BriefDescription": "Counts the number of unhalted core clock cycles [This event is alias to CPU_C…
149         "Counter": "0,1,2,3,4,5,6,7",
155         "BriefDescription": "Fixed Counter: Counts the number of unhalted reference clock cycles",
162 …      "BriefDescription": "Counts the number of unhalted reference clock cycles at TSC frequency.",
163         "Counter": "0,1,2,3,4,5,6,7",
166 …"PublicDescription": "Counts the number of reference cycles that the core is not in a halt state. …
171         "BriefDescription": "Fixed Counter: Counts the number of unhalted core clock cycles",
172         "Counter": "Fixed counter 1",
178 …"BriefDescription": "Counts the number of unhalted core clock cycles [This event is alias to CPU_C…
179         "Counter": "0,1,2,3,4,5,6,7",
185         "BriefDescription": "Fixed Counter: Counts the number of instructions retired",
188         "PEBS": "1",
193         "BriefDescription": "Counts the number of instructions retired",
194         "Counter": "0,1,2,3,4,5,6,7",
200 …er of retired loads that are blocked because it initially appears to be store forward blocked, but…
201         "Counter": "0,1,2,3,4,5,6,7",
208 …"BriefDescription": "Counts the number of retired loads that are blocked because its address exact…
209         "Counter": "0,1,2,3,4,5,6,7",
216 …"BriefDescription": "Counts the number of retired loads that are blocked because its address parti…
217         "Counter": "0,1,2,3,4,5,6,7",
224 …"BriefDescription": "Counts the number of machine clears due to memory ordering in which an intern…
225         "Counter": "0,1,2,3,4,5,6,7",
232 …"BriefDescription": "Counts the number of machine clears due to a page fault.  Counts both I-Side …
233         "Counter": "0,1,2,3,4,5,6,7",
240 …iefDescription": "Counts the number of machine clears that flush the pipeline and restart the mach…
241         "Counter": "0,1,2,3,4,5,6,7",
248 …efDescription": "Counts the number of machine clears due to program modifying data (self modifying…
249         "Counter": "0,1,2,3,4,5,6,7",
256 …"BriefDescription": "Counts the number of Last Branch Record (LBR) entries. Requires LBRs to be en…
257         "Counter": "0,1,2,3,4,5,6,7",
264 …"BriefDescription": "Counts the number of issue slots that were not consumed by the backend becaus…
265         "Counter": "0,1,2,3,4,5,6,7",
268 …"PublicDescription": "Counts the total number of issue slots that were not consumed by the backend…
272 …"BriefDescription": "Counts the number of issue slots that were not consumed by the backend becaus…
273         "Counter": "0,1,2,3,4,5,6,7",
276 …"PublicDescription": "Counts the total number of issue slots that were not consumed by the backend…
280 …"BriefDescription": "Counts the number of issue slots every cycle that were not consumed by the ba…
281         "Counter": "0,1,2,3,4,5,6,7",
288 …s the total number of issue slots that were not consumed by the backend because allocation is stal…
289         "Counter": "0,1,2,3,4,5,6,7",
296 …"BriefDescription": "Counts the number of issue slots every cycle that were not consumed by the ba…
297         "Counter": "0,1,2,3,4,5,6,7",
304 …"BriefDescription": "Counts the number of issue slots every cycle that were not consumed by the ba…
305         "Counter": "0,1,2,3,4,5,6,7",
312 …"BriefDescription": "Counts the number of retirement slots not consumed due to backend stalls [Thi…
313         "Counter": "0,1,2,3,4,5,6,7",
319 …"BriefDescription": "Counts the number of issue slots every cycle that were not consumed by the ba…
320         "Counter": "0,1,2,3,4,5,6,7",
327 …"BriefDescription": "Counts the number of retirement slots not consumed due to backend stalls [Thi…
328         "Counter": "0,1,2,3,4,5,6,7",
334 …"BriefDescription": "Counts the number of issue slots every cycle that were not consumed by the ba…
335         "Counter": "0,1,2,3,4,5,6,7",
342 …iption": "Counts the number of issue slots every cycle that were not consumed by the backend due t…
343         "Counter": "0,1,2,3,4,5,6,7",
350 …"BriefDescription": "Counts the number of issue slots every cycle that were not consumed by the ba…
351         "Counter": "0,1,2,3,4,5,6,7",
358 …"BriefDescription": "Counts the number of issue slots every cycle that were not consumed by the ba…
359         "Counter": "0,1,2,3,4,5,6,7",
366 …"BriefDescription": "Counts the number of issue slots every cycle that were not consumed by the ba…
367         "Counter": "0,1,2,3,4,5,6,7",
374 …"BriefDescription": "Counts the number of retirement slots not consumed due to front end stalls [T…
375         "Counter": "0,1,2,3,4,5,6,7",
381 …"BriefDescription": "Counts the number of retirement slots not consumed due to front end stalls [T…
382         "Counter": "0,1,2,3,4,5,6,7",
388 …"BriefDescription": "Counts the number of issue slots every cycle that were not delivered by the f…
389         "Counter": "0,1,2,3,4,5,6,7",
396 …"BriefDescription": "Counts the number of issue slots every cycle that were not delivered by the f…
397         "Counter": "0,1,2,3,4,5,6,7",
404 …"BriefDescription": "Counts the number of issue slots every cycle that were not delivered by the f…
405         "Counter": "0,1,2,3,4,5,6,7",
412 …"BriefDescription": "Counts the number of issue slots every cycle that were not delivered by the f…
413         "Counter": "0,1,2,3,4,5,6,7",
420 …"BriefDescription": "Counts the number of issue slots every cycle that were not delivered by the f…
421         "Counter": "0,1,2,3,4,5,6,7",
428 …"BriefDescription": "Counts the number of issue slots every cycle that were not delivered by the f…
429         "Counter": "0,1,2,3,4,5,6,7",
437         "Counter": "0,1,2,3,4,5,6,7",
438         "Deprecated": "1",
445 …"BriefDescription": "Counts the number of issue slots every cycle that were not delivered by the f…
446         "Counter": "0,1,2,3,4,5,6,7",
453 …"BriefDescription": "Counts the number of issue slots every cycle that were not delivered by the f…
454         "Counter": "0,1,2,3,4,5,6,7",
461 …"BriefDescription": "Counts the number of issue slots every cycle that were not delivered by the f…
462         "Counter": "0,1,2,3,4,5,6,7",
469 …"BriefDescription": "Counts the number of consumed retirement slots. [This event is alias to TOPDO…
470         "Counter": "0,1,2,3,4,5,6,7",
476 …"BriefDescription": "Counts the number of consumed retirement slots. [This event is alias to TOPDO…
477         "Counter": "0,1,2,3,4,5,6,7",
483         "BriefDescription": "Counts the number of uops issued by the front end every cycle.",
484         "Counter": "0,1,2,3,4,5,6,7",
487 …of uops issued by the front end every cycle. When 4-uops are requested and only 2-uops are deliver…
491         "BriefDescription": "Counts the total number of uops retired.",
492         "Counter": "0,1,2,3,4,5,6,7",
498         "BriefDescription": "Counts the number of integer divide uops retired.",
499         "Counter": "0,1,2,3,4,5,6,7",
506 …"BriefDescription": "Counts the number of uops that are from the complex flows issued by the micro…
507         "Counter": "0,1,2,3,4,5,6,7",
514         "BriefDescription": "Counts the number of x87 uops retired, includes those in ms flows",
515         "Counter": "0,1,2,3,4,5,6,7",