Lines Matching +full:point +full:- +full:to +full:- +full:point

3 …riefDescription": "Counts once for most SIMD 128-bit packed computational double precision floatin…
7-bit packed computational double precision floating-point instructions retired; some instructions …
12 …riefDescription": "Counts once for most SIMD 128-bit packed computational single precision floatin…
16-bit packed computational single precision floating-point instructions retired; some instructions …
21 …riefDescription": "Counts once for most SIMD 256-bit packed double computational precision floatin…
25-bit packed double computational precision floating-point instructions retired; some instructions …
30 …riefDescription": "Counts once for most SIMD 256-bit packed single computational precision floatin…
34-bit packed single computational precision floating-point instructions retired; some instructions …
39-bit packed single and 256-bit packed double precision FP instructions retired; some instructions …
43-bit packed single precision and 256-bit packed double precision floating-point instructions reti…
48-bit packed double precision floating-point instructions retired; some instructions will count twi…
52-bit packed double precision floating-point instructions retired; some instructions will count twi…
57-bit packed single precision floating-point instructions retired; some instructions will count twi…
61-bit packed single precision floating-point instructions retired; some instructions will count twi…
66-bit packed single precision and 512-bit packed double precision FP instructions retired; some in…
70-bit packed single precision and 512-bit packed double precision floating-point instructions reti…
75 …"BriefDescription": "Counts once for most SIMD scalar computational floating-point instructions re…
79-point instructions retired; some instructions will count twice as noted below. Each count repres…
84 …"Counts once for most SIMD scalar computational double precision floating-point instructions retir…
88-point instructions retired; some instructions will count twice as noted below. Each count repres…
93 …"Counts once for most SIMD scalar computational single precision floating-point instructions retir…
97-point instructions retired; some instructions will count twice as noted below. Each count repres…
110 … "BriefDescription": "Intel AVX-512 computational 512-bit packed BFloat16 instructions retired.",
114 … "Counts once for each Intel AVX-512 computational 512-bit packed BFloat16 floating-point instruct…
119 … "BriefDescription": "Intel AVX-512 computational 128-bit packed BFloat16 instructions retired.",
123 … "Counts once for each Intel AVX-512 computational 128-bit packed BFloat16 floating-point instruct…
128 … "BriefDescription": "Intel AVX-512 computational 256-bit packed BFloat16 instructions retired.",
132 … "Counts once for each Intel AVX-512 computational 256-bit packed BFloat16 floating-point instruct…