Lines Matching full:back

72 …ecoded instruction-cache) miss. Critical means stalls were exposed to the back-end as a result of …
124 …delivered no uops for a period of at least 1 cycle which was not interrupted by a back-end stall.",
130 …t-end delivered no uops for a period of 128 cycles which was not interrupted by a back-end stall.",
137 …t-end delivered no uops for a period of 128 cycles which was not interrupted by a back-end stall.",
143 …nt-end delivered no uops for a period of 16 cycles which was not interrupted by a back-end stall.",
150 …"PublicDescription": "Counts retired instructions that are delivered to the back-end after a front…
163 …elivered no uops for a period of at least 2 cycles which was not interrupted by a back-end stall.",
169 …t-end delivered no uops for a period of 256 cycles which was not interrupted by a back-end stall.",
176 …t-end delivered no uops for a period of 256 cycles which was not interrupted by a back-end stall.",
182 …ad at least 1 bubble-slot for a period of 2 cycles which was not interrupted by a back-end stall.",
189 …"PublicDescription": "Counts retired instructions that are delivered to the back-end after the fro…
195 …nt-end delivered no uops for a period of 32 cycles which was not interrupted by a back-end stall.",
202 …"PublicDescription": "Counts retired instructions that are delivered to the back-end after a front…
208 …ont-end delivered no uops for a period of 4 cycles which was not interrupted by a back-end stall.",
215 …ont-end delivered no uops for a period of 4 cycles which was not interrupted by a back-end stall.",
221 …t-end delivered no uops for a period of 512 cycles which was not interrupted by a back-end stall.",
228 …t-end delivered no uops for a period of 512 cycles which was not interrupted by a back-end stall.",
234 …nt-end delivered no uops for a period of 64 cycles which was not interrupted by a back-end stall.",
241 …nt-end delivered no uops for a period of 64 cycles which was not interrupted by a back-end stall.",
247 …ont-end delivered no uops for a period of 8 cycles which was not interrupted by a back-end stall.",
254 …"PublicDescription": "Counts retired instructions that are delivered to the back-end after a front…
301 …che.  The event only counts new cache line accesses, so that multiple back to back fetches to the …
311 …che.  The event only counts new cache line accesses, so that multiple back to back fetches to the …
449 …ered to by the Instruction Decode Queue (IDQ) to the back-end of the pipeline when there was no ba…
460 …livered by the Instruction Decode Queue (IDQ) to the back-end of the pipeline when there was no ba…
466 …ption": "Cycles when optimal number of uops was delivered to the back-end when the back-end is not…
472 …livered by the Instruction Decode Queue (IDQ) to the back-end of the pipeline when there was no ba…
482 …ered to by the Instruction Decode Queue (IDQ) to the back-end of the pipeline when there was no ba…
493 …livered by the Instruction Decode Queue (IDQ) to the back-end of the pipeline when there was no ba…
499 …ption": "Cycles when optimal number of uops was delivered to the back-end when the back-end is not…
505 …livered by the Instruction Decode Queue (IDQ) to the back-end of the pipeline when there was no ba…