powerpc/power8/other.json

23 …p pump (prediction=correct) for all data types (demand load,data prefetch,inst prefetch,inst fetch…
24 …ip pump (prediction=correct) for all data types ( demand load,data,inst prefetch,inst fetch,xlate …
29 …s this scope was group pump for all data types (demand load,data prefetch,inst prefetch,inst fetch…
30 …his scope was group pump for all data types excluding data prefetch (demand load,inst prefetch,ins…
35 …ler than Initial Pump Scope for all data types (demand load,data prefetch,inst prefetch,inst fetch…
41 …n Initial Pump Scope (Chip) for all data types (demand load,data prefetch,inst prefetch,inst fetch…
42 …nitial pump was chip pumpfor all data types excluding data prefetch (demand load,inst prefetch,ins…
47 …s across all types of pumps for all data types (demand load,data prefetch,inst prefetch,inst fetch…
48 …across all types of pumpsfor all data types excluding data prefetch (demand load,inst prefetch,ins…
53 …s across all types of pumps for all data types (demand load,data prefetch,inst prefetch,inst fetch…
54 …across all types of pumpsfor all data types excluding data prefetch (demand load,inst prefetch,ins…
59 … Pump Scope was system pump for all data types (demand load,data prefetch,inst prefetch,inst fetch…
60 …is scope was system pump for all data types excluding data prefetch (demand load,inst prefetch,ins…
65 …d have been smaller. Counts for all data types (demand load,data prefetch,inst prefetch,inst fetch…
71 …ial Pump Scope (Chip/Group) for all data types (demand load,data prefetch,inst prefetch,inst fetch…
72 …mp Scope (Chip or Group) for all data types excluding data prefetch (demand load,inst prefetch,ins…
365 … and Final Pump Scope was chip pump (prediction=correct) for either demand loads or data prefetch",
371 … on a different Node or Group (Distant), as this chip due to either demand loads or data prefetch",
377 … on a different Node or Group (Distant), as this chip due to either demand loads or data prefetch",
383 …ther chip's L4 on a different Node or Group (Distant) due to either demand loads or data prefetch",
389 …her chip's memory on the same Node or Group (Distant) due to either demand loads or data prefetch",
395 …cessor's data cache was reloaded from local core's L2 due to either demand loads or data prefetch",
401 …fied (M) data from another core's L2 on the same chip due to either demand loads or data prefetch",
407 …ared (S) data from another core's L2 on the same chip due to either demand loads or data prefetch",
413 …loaded from a location other than the local core's L2 due to either demand loads or data prefetch",
419 …ded from local core's L2 with load hit store conflict due to either demand loads or data prefetch",
425 … reloaded from local core's L2 with dispatch conflict due to either demand loads or data prefetch",
431 …ore's L2 hit without dispatch conflicts on Mepf state due to either demand loads or data prefetch",
437 …he was reloaded from local core's L2 without conflict due to either demand loads or data prefetch",
443 …cessor's data cache was reloaded from local core's L3 due to either demand loads or data prefetch",
449 … (M) data from another core's ECO L3 on the same chip due to either demand loads or data prefetch",
455 … (S) data from another core's ECO L3 on the same chip due to either demand loads or data prefetch",
461 …fied (M) data from another core's L3 on the same chip due to either demand loads or data prefetch",
467 …ared (S) data from another core's L3 on the same chip due to either demand loads or data prefetch",
473 …loaded from a location other than the local core's L3 due to either demand loads or data prefetch",
479 … reloaded from local core's L3 with dispatch conflict due to either demand loads or data prefetch",
485 …ore's L3 without dispatch conflicts hit on Mepf state due to either demand loads or data prefetch",
491 …he was reloaded from local core's L3 without conflict due to either demand loads or data prefetch",
497 …ata cache was reloaded from the local chip's L4 cache due to either demand loads or data prefetch",
503 … data cache was reloaded from the local chip's Memory due to either demand loads or data prefetch",
509 …ry location including L4 from local remote or distant due to either demand loads or data prefetch",
515 … core's L2/L3 on a different chip (remote or distant) due to either demand loads or data prefetch",
521 …ified data from another core's L2/L3 on the same chip due to either demand loads or data prefetch",
527 …r L3 on the same Node or Group (Remote), as this chip due to either demand loads or data prefetch",
533 …r L3 on the same Node or Group (Remote), as this chip due to either demand loads or data prefetch",
539 …another chip's L4 on the same Node or Group ( Remote) due to either demand loads or data prefetch",
545 …her chip's memory on the same Node or Group ( Remote) due to either demand loads or data prefetch",
551 …and Final Pump Scope was group pump (prediction=correct) for either demand loads or data prefetch",
557 …nded up either larger or smaller than Initial Pump Scope for either demand loads or data prefetch",
563 …e (Group) ended up larger than Initial Pump Scope (Chip) for either demand loads or data prefetch",
569 …ump prediction correct. Counts across all types of pumps for either demand loads or data prefetch",
575 …": "Pump misprediction. Counts across all types of pumps for either demand loads or data prefetch",
581 …nd Final Pump Scope was system pump (prediction=correct) for either demand loads or data prefetch",
587 …scope was System and it should have been smaller. Counts for either demand loads or data prefetch",
593 …em) ended up larger than Initial Pump Scope (Chip/Group) for either demand loads or data prefetch",
647 …marked valid. The stream could have been allocated through the hardware prefetch mechanism or thro…
653 …oad referenced a line in an active prefetch stream. The stream could have been allocated through t…
659 …ferenced a line in an active fuzzy prefetch stream. The stream could have been allocated through t…
665 …renced a line in an active strided prefetch stream. The stream could have been allocated through t…
1193     "BriefDescription": "Prefetch Canceled due to icache hit",
1205     "BriefDescription": "Prefetch Canceled due to page boundary",
1211     "BriefDescription": "Instruction prefetch requests",
1217     "BriefDescription": "Instruction prefetch written into IL1",
1242 … this chip due to either an instruction fetch or instruction fetch plus prefetch if MMCR1[17] is 1"
1248 … this chip due to either an instruction fetch or instruction fetch plus prefetch if MMCR1[17] is 1"
1254 … (Distant) due to either an instruction fetch or instruction fetch plus prefetch if MMCR1[17] is 1"
1260 … (Distant) due to either an instruction fetch or instruction fetch plus prefetch if MMCR1[17] is 1"
1266 … core's L2 due to either an instruction fetch or instruction fetch plus prefetch if MMCR1[17] is 1"
1272 … same chip due to either an instruction fetch or instruction fetch plus prefetch if MMCR1[17] is 1"
1278 … same chip due to either an instruction fetch or instruction fetch plus prefetch if MMCR1[17] is 1"
1284 … core's L2 due to either an instruction fetch or instruction fetch plus prefetch if MMCR1[17] is 1"
1290 …e conflict due to either an instruction fetch or instruction fetch plus prefetch if MMCR1[17] is 1"
1296 …h conflict due to either an instruction fetch or instruction fetch plus prefetch if MMCR1[17] is 1"
1302 …epf state. due to either an instruction fetch or instruction fetch plus prefetch if MMCR1[17] is 1"
1308 …t conflict due to either an instruction fetch or instruction fetch plus prefetch if MMCR1[17] is 1"
1314 … core's L3 due to either an instruction fetch or instruction fetch plus prefetch if MMCR1[17] is 1"
1320 … same chip due to either an instruction fetch or instruction fetch plus prefetch if MMCR1[17] is 1"
1326 … same chip due to either an instruction fetch or instruction fetch plus prefetch if MMCR1[17] is 1"
1332 … same chip due to either an instruction fetch or instruction fetch plus prefetch if MMCR1[17] is 1"
1338 … same chip due to either an instruction fetch or instruction fetch plus prefetch if MMCR1[17] is 1"
1344 … core's L3 due to either an instruction fetch or instruction fetch plus prefetch if MMCR1[17] is 1"
1350 …h conflict due to either an instruction fetch or instruction fetch plus prefetch if MMCR1[17] is 1"
1356 …epf state. due to either an instruction fetch or instruction fetch plus prefetch if MMCR1[17] is 1"
1362 …t conflict due to either an instruction fetch or instruction fetch plus prefetch if MMCR1[17] is 1"
1368 …s L4 cache due to either an instruction fetch or instruction fetch plus prefetch if MMCR1[17] is 1"
1374 …p's Memory due to either an instruction fetch or instruction fetch plus prefetch if MMCR1[17] is 1"
1380 …or distant due to either an instruction fetch or instruction fetch plus prefetch if MMCR1[17] is 1"
1386 …r distant) due to either an instruction fetch or instruction fetch plus prefetch if MMCR1[17] is 1"
1392 … same chip due to either an instruction fetch or instruction fetch plus prefetch if MMCR1[17] is 1"
1398 … this chip due to either an instruction fetch or instruction fetch plus prefetch if MMCR1[17] is 1"
1404 … this chip due to either an instruction fetch or instruction fetch plus prefetch if MMCR1[17] is 1"
1410 … ( Remote) due to either an instruction fetch or instruction fetch plus prefetch if MMCR1[17] is 1"
1416 … ( Remote) due to either an instruction fetch or instruction fetch plus prefetch if MMCR1[17] is 1"
1475 …ified (M) data from another core's L2 on the same chip due to an instruction fetch (not prefetch)",
1476 … same chip due to either an instruction fetch or instruction fetch plus prefetch if MMCR1[17] is 1"
1481 …hared (S) data from another core's L2 on the same chip due to an instruction fetch (not prefetch)",
1482 … same chip due to either an instruction fetch or instruction fetch plus prefetch if MMCR1[17] is 1"
1487 …d (M) data from another core's ECO L3 on the same chip due to an instruction fetch (not prefetch)",
1488 … same chip due to either an instruction fetch or instruction fetch plus prefetch if MMCR1[17] is 1"
1493 …d (S) data from another core's ECO L3 on the same chip due to an instruction fetch (not prefetch)",
1494 … same chip due to either an instruction fetch or instruction fetch plus prefetch if MMCR1[17] is 1"
1499 …ified (M) data from another core's L3 on the same chip due to an instruction fetch (not prefetch)",
1500 … same chip due to either an instruction fetch or instruction fetch plus prefetch if MMCR1[17] is 1"
1505 …hared (S) data from another core's L3 on the same chip due to an instruction fetch (not prefetch)",
1506 … same chip due to either an instruction fetch or instruction fetch plus prefetch if MMCR1[17] is 1"
1793     "BriefDescription": "L3 Prefetch missed in L3",
1799     "BriefDescription": "L3 Prefetch from Off chip cache",
1805     "BriefDescription": "L3 Prefetch from Off chip memory",
1811     "BriefDescription": "L3 Prefetch from On chip cache",
1817     "BriefDescription": "L3 Prefetch from On chip memory",
1925     "BriefDescription": "LS0 Erat miss due to prefetch",
1943     "BriefDescription": "LS1 Erat miss due to prefetch",
2309     "BriefDescription": "Erat miss due to prefetch, on either pipe",
2729     "BriefDescription": "Prefetch tracked was ineffective for marked src",
2735     "BriefDescription": "Prefetch tracked was moderate for marked src",
2741     "BriefDescription": "Marked src Prefetch Tracked was moderate (source L2)",
2747     "BriefDescription": "Prefetch tracked was moderate (L3 hit) for marked src",
2759     "BriefDescription": "Prefetch tracked was ineffective for marked target",
2765     "BriefDescription": "Prefetch tracked was moderate for marked target",
2771     "BriefDescription": "Marked target Prefetch Tracked was moderate (source L2)",
2777     "BriefDescription": "Prefetch tracked was moderate (L3 hit) for marked target",
2813     "BriefDescription": "Total number of Prefetch Operations that were tracked",
2819     "BriefDescription": "Prefetch Tracked was effective",
2825     "BriefDescription": "Prefetch tracked was ineffective",
2831     "BriefDescription": "Prefetch tracked was moderate",
2837     "BriefDescription": "Prefetch Tracked was moderate (source L2)",
2843     "BriefDescription": "Prefetch tracked was moderate (L3)",
3137     "BriefDescription": "Micropartition prefetch",