powerpc/power8/marked.json

35 …another chip's L2 or L3 on a different Node or Group (Distant), as this chip due to a marked load",
41 …another chip's L2 or L3 on a different Node or Group (Distant), as this chip due to a marked load",
47 …another chip's L2 or L3 on a different Node or Group (Distant), as this chip due to a marked load",
53 …another chip's L2 or L3 on a different Node or Group (Distant), as this chip due to a marked load",
59 …e was reloaded from another chip's L4 on a different Node or Group (Distant) due to a marked load",
65 …cles to reload from another chip's L4 on a different Node or Group (Distant) due to a marked load",
71 … was reloaded from another chip's memory on the same Node or Group (Distant) due to a marked load",
77 …les to reload from another chip's memory on the same Node or Group (Distant) due to a marked load",
83 …fDescription": "The processor's data cache was reloaded from local core's L2 due to a marked load",
95 …"Duration in cycles to reload from a location other than the local core's L2 due to a marked load",
101     "BriefDescription": "Duration in cycles to reload from local core's L2 due to a marked load",
107 …r's data cache was reloaded from local core's L2 with load hit store conflict due to a marked load…
113 …uration in cycles to reload from local core's L2 with load hit store conflict due to a marked load…
119 …cessor's data cache was reloaded from local core's L2 with dispatch conflict due to a marked load",
125 …": "Duration in cycles to reload from local core's L2 with dispatch conflict due to a marked load",
131 … reloaded from local core's L2 hit without dispatch conflicts on Mepf state. due to a marked load",
137 …to reload from local core's L2 hit without dispatch conflicts on Mepf state. due to a marked load",
143 …he processor's data cache was reloaded from local core's L2 without conflict due to a marked load",
149 …iption": "Duration in cycles to reload from local core's L2 without conflict due to a marked load",
155 …fDescription": "The processor's data cache was reloaded from local core's L3 due to a marked load",
161 …sor's data cache was reloaded from a location other than the local core's L3 due to a marked load",
167 …"Duration in cycles to reload from a location other than the local core's L3 due to a marked load",
173     "BriefDescription": "Duration in cycles to reload from local core's L3 due to a marked load",
179 …cessor's data cache was reloaded from local core's L3 with dispatch conflict due to a marked load",
185 …": "Duration in cycles to reload from local core's L3 with dispatch conflict due to a marked load",
191 … reloaded from local core's L3 without dispatch conflicts hit on Mepf state. due to a marked load",
197 …to reload from local core's L3 without dispatch conflicts hit on Mepf state. due to a marked load",
203 …he processor's data cache was reloaded from local core's L3 without conflict due to a marked load",
209 …iption": "Duration in cycles to reload from local core's L3 without conflict due to a marked load",
215 …on": "The processor's data cache was reloaded from the local chip's L4 cache due to a marked load",
221 …efDescription": "Duration in cycles to reload from the local chip's L4 cache due to a marked load",
227 …tion": "The processor's data cache was reloaded from the local chip's Memory due to a marked load",
233 …riefDescription": "Duration in cycles to reload from the local chip's Memory due to a marked load",
239 …as reloaded from a memory location including L4 from local remote or distant due to a marked load",
245 …s to reload from a memory location including L4 from local remote or distant due to a marked load",
251 …ified data from another core's L2/L3 on a different chip (remote or distant) due to a marked load",
257 …ified data from another core's L2/L3 on a different chip (remote or distant) due to a marked load",
263 …ed either shared or modified data from another core's L2/L3 on the same chip due to a marked load",
269 …ad either shared or modified data from another core's L2/L3 on the same chip due to a marked load",
275 …rom another chip's L2 or L3 on the same Node or Group (Remote), as this chip due to a marked load",
281 …rom another chip's L2 or L3 on the same Node or Group (Remote), as this chip due to a marked load",
287 …rom another chip's L2 or L3 on the same Node or Group (Remote), as this chip due to a marked load",
293 …rom another chip's L2 or L3 on the same Node or Group (Remote), as this chip due to a marked load",
299 …ache was reloaded from another chip's L4 on the same Node or Group ( Remote) due to a marked load",
305 … cycles to reload from another chip's L4 on the same Node or Group ( Remote) due to a marked load",
311 … was reloaded from another chip's memory on the same Node or Group ( Remote) due to a marked load",
317 …les to reload from another chip's memory on the same Node or Group ( Remote) due to a marked load",
659     "BriefDescription": "Marked Load exposed Miss cycles",
660     "PublicDescription": "Marked Load exposed Miss (use edge detect to count #)"