Lines Matching full:instruction

10 …"BriefDescription": "Instruction TLB hit (IERAT reload) page size 64K. When MMCR1[17]=0 this event…
15 …"BriefDescription": "The PTE required by the instruction was resident in the TLB (data TLB access)…
20     "BriefDescription": "Cycles in which at least one instruction is completed by this thread."
25 … miss. All page sizes are counted by this event. This event only counts instruction demand access."
30 …S_DISP / PM_INST_DISP will show the average number of internal operations per PowerPC instruction."
35 …"BriefDescription": "An instruction issued and the issue was later cancelled. Only one cancel per …
40     "BriefDescription": "Branch Taken instruction completed."
45 …"BriefDescription": "Cycles when dispatch was stalled while waiting to resolve an instruction TLB …
50 …"BriefDescription": "The instruction that was next to complete (oldest in the pipeline) did not co…
55 …"BriefDescription": "Instruction TLB hit (IERAT reload) page size 1G, which implies Radix Page Tab…
65 …finish time. LMQ merges are not included in this count. i.e. if a load instruction misses on an ad…
70 …"BriefDescription": "The processor's instruction cache was reloaded from beyond the local core's L…
75 …"BriefDescription": "Cycles in which an instruction or group of instructions were cancelled after …
80     "BriefDescription": "Vector load instruction completed."
85     "BriefDescription": "Vector store instruction completed."
105 …"BriefDescription": "Instruction TLB reload (after a miss), all page sizes. Includes only demand m…