arch/arm64/common-and-microarch.json

9         "PublicDescription": "Level 1 instruction cache refill",
12         "BriefDescription": "Level 1 instruction cache refill"
15         "PublicDescription": "Attributable Level 1 instruction TLB refill",
18         "BriefDescription": "Attributable Level 1 instruction TLB refill"
21         "PublicDescription": "Level 1 data cache refill",
24         "BriefDescription": "Level 1 data cache refill"
27         "PublicDescription": "Level 1 data cache access",
30         "BriefDescription": "Level 1 data cache access"
33         "PublicDescription": "Attributable Level 1 data TLB refill",
36         "BriefDescription": "Attributable Level 1 data TLB refill"
123         "PublicDescription": "Attributable Level 1 instruction cache access",
126         "BriefDescription": "Attributable Level 1 instruction cache access"
129         "PublicDescription": "Attributable Level 1 data cache write-back",
132         "BriefDescription": "Attributable Level 1 data cache write-back"
135         "PublicDescription": "Level 2 data cache access",
138         "BriefDescription": "Level 2 data cache access"
141         "PublicDescription": "Level 2 data refill",
144         "BriefDescription": "Level 2 data refill"
147         "PublicDescription": "Attributable Level 2 data cache write-back",
150         "BriefDescription": "Attributable Level 2 data cache write-back"
183         "PublicDescription": "Level 1 data cache allocation without refill",
186         "BriefDescription": "Level 1 data cache allocation without refill"
189         "PublicDescription": "Attributable Level 2 data cache allocation without refill",
192         "BriefDescription": "Attributable Level 2 data cache allocation without refill"
219         "PublicDescription": "Attributable Level 1 data or unified TLB access",
222         "BriefDescription": "Attributable Level 1 data or unified TLB access"
225         "PublicDescription": "Attributable Level 1 instruction TLB access",
228         "BriefDescription": "Attributable Level 1 instruction TLB access"
231         "PublicDescription": "Attributable Level 3 data cache allocation without refill",
234         "BriefDescription": "Attributable Level 3 data cache allocation without refill"
237         "PublicDescription": "Attributable Level 3 data cache refill",
240         "BriefDescription": "Attributable Level 3 data cache refill"
243         "PublicDescription": "Attributable Level 3 data cache access",
246         "BriefDescription": "Attributable Level 3 data cache access"
249         "PublicDescription": "Attributable Level 2 data TLB refill",
252         "BriefDescription": "Attributable Level 2 data TLB refill"
255         "PublicDescription": "Attributable Level 2 instruction TLB refill.",
258         "BriefDescription": "Attributable Level 2 instruction TLB refill."
261         "PublicDescription": "Attributable Level 2 data or unified TLB access",
264         "BriefDescription": "Attributable Level 2 data or unified TLB access"
267         "PublicDescription": "Attributable Level 2 instruction TLB access.",
270         "BriefDescription": "Attributable Level 2 instruction TLB access."
273         "PublicDescription": "Access to another socket in a multi-socket system",
276         "BriefDescription": "Access to another socket in a multi-socket system"
291         "PublicDescription": "Attributable Last level cache memory read",
294         "BriefDescription": "Attributable Last level cache memory read"
297         "PublicDescription": "Last level cache miss, read",
300         "BriefDescription": "Last level cache miss, read"
303 … "PublicDescription": "Attributable memory read access to another socket in a multi-socket system",
306 …   "BriefDescription": "Attributable memory read access to another socket in a multi-socket system"
309 …Level 1 data cache long-latency read miss.  The counter counts each memory read access counted by …
312         "BriefDescription": "Level 1 data cache long-latency read miss"
315 …"PublicDescription": "Micro-operation architecturally executed.  The counter counts each operation…
318         "BriefDescription": "Micro-operation architecturally executed"
321 …"PublicDescription": "Micro-operation speculatively executed.  The counter counts the number of op…
324         "BriefDescription": "Micro-operation speculatively executed"
381 …each cycle counted by STALL_BACKEND where there is a cache miss in the last level of cache within …
387 …Level 1 instruction cache long-latency read miss.  If the L1I_CACHE_RD event is implemented, the c…
390         "BriefDescription": "Level 1 instruction cache long-latency read miss"
393 …Level 2 data cache long-latency read miss.  The counter counts each memory read access counted by …
396         "BriefDescription": "Level 2 data cache long-latency read miss"
399 …Level 3 data cache long-latency read miss.  The counter counts each memory read access counted by …
402         "BriefDescription": "Level 3 data cache long-latency read miss"
453         "PublicDescription": "Cross-trigger Interface output trigger 4",
456         "BriefDescription": "Cross-trigger Interface output trigger 4"
459         "PublicDescription": "Cross-trigger Interface output trigger 5 ",
462         "BriefDescription": "Cross-trigger Interface output trigger 5 "
465         "PublicDescription": "Cross-trigger Interface output trigger 6",
468         "BriefDescription": "Cross-trigger Interface output trigger 6"
471         "PublicDescription": "Cross-trigger Interface output trigger 7",
474         "BriefDescription": "Cross-trigger Interface output trigger 7"
549         "PublicDescription": "Floating-point Operations speculatively executed.",
552         "BriefDescription": "Floating-point Operations speculatively executed."
555         "PublicDescription": "Floating-point half-precision operations speculatively executed",
558         "BriefDescription": "Floating-point half-precision operations speculatively executed"
561         "PublicDescription": "Floating-point single-precision operations speculatively executed",
564         "BriefDescription": "Floating-point single-precision operations speculatively executed"
567         "PublicDescription": "Floating-point double-precision operations speculatively executed",
570         "BriefDescription": "Floating-point double-precision operations speculatively executed"
573         "PublicDescription": "Floating-point FMA Operations speculatively executed.",
576         "BriefDescription": "Floating-point FMA Operations speculatively executed."
579 …      "PublicDescription": "Floating-point reciprocal estimate Operations speculatively executed.",
582         "BriefDescription": "Floating-point reciprocal estimate Operations speculatively executed."
585         "PublicDescription": "floating-point convert Operations speculatively executed.",
588         "BriefDescription": "floating-point convert Operations speculatively executed."
657         "PublicDescription": "General-purpose register load Operations speculatively executed.",
660         "BriefDescription": "General-purpose register load Operations speculatively executed."
663         "PublicDescription": "General-purpose register store Operations speculatively executed.",
666         "BriefDescription": "General-purpose register store Operations speculatively executed."
711         "PublicDescription": "SVE gather-load Operations speculatively executed.",
714         "BriefDescription": "SVE gather-load Operations speculatively executed."
717         "PublicDescription": "SVE scatter-store Operations speculatively executed.",
720         "BriefDescription": "SVE scatter-store Operations speculatively executed."
723         "PublicDescription": "SVE gather-prefetch Operations speculatively executed.",
726         "BriefDescription": "SVE gather-prefetch Operations speculatively executed."
729         "PublicDescription": "SVE First-fault load Operations speculatively executed.",
732         "BriefDescription": "SVE First-fault load Operations speculatively executed."
735 …"PublicDescription": "SVE first-fault load operations speculatively executed which set FFR bit to …
738 …"BriefDescription": "SVE first-fault load operations speculatively executed which set FFR bit to 0"
741         "PublicDescription": "Scalable floating-point element Operations speculatively executed.",
744         "BriefDescription": "Scalable floating-point element Operations speculatively executed."
747 …     "PublicDescription": "Non-scalable floating-point element Operations speculatively executed.",
750         "BriefDescription": "Non-scalable floating-point element Operations speculatively executed."
753 …"PublicDescription": "Scalable half-precision floating-point element Operations speculatively exec…
756 …"BriefDescription": "Scalable half-precision floating-point element Operations speculatively execu…
759 …"PublicDescription": "Non-scalable half-precision floating-point element Operations speculatively …
762 …"BriefDescription": "Non-scalable half-precision floating-point element Operations speculatively e…
765 …"PublicDescription": "Scalable single-precision floating-point element Operations speculatively ex…
768 …"BriefDescription": "Scalable single-precision floating-point element Operations speculatively exe…
771 …"PublicDescription": "Non-scalable single-precision floating-point element Operations speculativel…
774 …"BriefDescription": "Non-scalable single-precision floating-point element Operations speculatively…
777 …"PublicDescription": "Scalable double-precision floating-point element Operations speculatively ex…
780 …"BriefDescription": "Scalable double-precision floating-point element Operations speculatively exe…
783 …"PublicDescription": "Non-scalable double-precision floating-point element Operations speculativel…
786 …"BriefDescription": "Non-scalable double-precision floating-point element Operations speculatively…
789 …      "PublicDescription": "Advanced SIMD and SVE 8-bit integer operations speculatively executed",
792         "BriefDescription": "Advanced SIMD and SVE 8-bit integer operations speculatively executed"
795 …     "PublicDescription": "Advanced SIMD and SVE 16-bit integer operations speculatively executed",
798         "BriefDescription": "Advanced SIMD and SVE 16-bit integer operations speculatively executed"
801 …     "PublicDescription": "Advanced SIMD and SVE 32-bit integer operations speculatively executed",
804         "BriefDescription": "Advanced SIMD and SVE 32-bit integer operations speculatively executed"
807 …     "PublicDescription": "Advanced SIMD and SVE 64-bit integer operations speculatively executed",
810         "BriefDescription": "Advanced SIMD and SVE 64-bit integer operations speculatively executed"