arm/neoverse-n2-v2/metrics.json

4 …"MetricExpr": "(100 * ((STALL_SLOT_BACKEND / (CPU_CYCLES * #slots)) - ((BR_MIS_PRED * 3) / CPU_CYC…
15 …0 * (((1 - (OP_RETIRED / OP_SPEC)) * (1 - (((STALL_SLOT) if (strcmp_cpuid_str(0x410fd493) | strcmp…
61 …mp_cpuid_str(0x410fd490) ^ 1) else (STALL_SLOT_FRONTEND - CPU_CYCLES)) / (CPU_CYCLES * #slots)) - …
101 … of level 1 data cache accesses missed to the total number of level 1 data cache accesses. This gi…
108 …"BriefDescription": "This metric measures the number of level 1 data cache accesses missed per tho…
115 …io of level 1 data TLB accesses missed to the total number of level 1 data TLB accesses. This give…
122 …"BriefDescription": "This metric measures the number of level 1 instruction TLB accesses missed pe…
129 …level 1 instruction cache accesses missed to the total number of level 1 instruction cache accesse…
136 …"BriefDescription": "This metric measures the number of level 1 instruction cache accesses missed …
143 …level 1 instruction TLB accesses missed to the total number of level 1 instruction TLB accesses. T…
150 …"BriefDescription": "This metric measures the number of level 1 instruction TLB accesses missed pe…
157 …ratio of level 2 cache accesses missed to the total number of level 2 cache accesses. This gives a…
164 …"BriefDescription": "This metric measures the number of level 2 unified cache accesses missed per …
171 …of level 2 unified TLB accesses missed to the total number of level 2 unified TLB accesses. This g…
178 …"BriefDescription": "This metric measures the number of level 2 unified TLB accesses missed per th…
184         "MetricExpr": "((LL_CACHE_RD - LL_CACHE_MISS_RD) / LL_CACHE_RD)",
185 …last level cache read accesses hit in the cache to the total number of last level cache accesses. …
192 …last level cache read accesses missed to the total number of last level cache accesses. This gives…
199 …"BriefDescription": "This metric measures the number of last level cache read accesses missed per …
212 …RETIRED / OP_SPEC) * (1 - (((STALL_SLOT) if (strcmp_cpuid_str(0x410fd493) | strcmp_cpuid_str(0x410…
237         "BriefDescription": "The rate of L3 D-Cache misses per kilo instructions",
244         "BriefDescription": "The rate of L3 D-Cache misses to the overall L3 D-Cache",
271 …  "BriefDescription": "Of all the micro-operations issued, what percentage are retired(committed)",
277         "MetricExpr": "1 - OP_RETIRED / OP_SPEC",
278 …"BriefDescription": "Of all the micro-operations issued, what percentage are not retired(committed…