Lines Matching +full:last +full:- +full:level
89 … of level 1 data cache accesses missed to the total number of level 1 data cache accesses. This gi…
96 …"BriefDescription": "This metric measures the number of level 1 data cache accesses missed per tho…
103 …io of level 1 data TLB accesses missed to the total number of level 1 data TLB accesses. This give…
110 …"BriefDescription": "This metric measures the number of level 1 instruction TLB accesses missed pe…
117 …level 1 instruction cache accesses missed to the total number of level 1 instruction cache accesse…
124 …"BriefDescription": "This metric measures the number of level 1 instruction cache accesses missed …
131 …level 1 instruction TLB accesses missed to the total number of level 1 instruction TLB accesses. T…
138 …"BriefDescription": "This metric measures the number of level 1 instruction TLB accesses missed pe…
145 …ratio of level 2 cache accesses missed to the total number of level 2 cache accesses. This gives a…
152 …"BriefDescription": "This metric measures the number of level 2 unified cache accesses missed per …
159 …of level 2 unified TLB accesses missed to the total number of level 2 unified TLB accesses. This g…
166 …"BriefDescription": "This metric measures the number of level 2 unified TLB accesses missed per th…
172 "MetricExpr": "((LL_CACHE_RD - LL_CACHE_MISS_RD) / LL_CACHE_RD)",
173 …last level cache read accesses hit in the cache to the total number of last level cache accesses. …
180 …last level cache read accesses missed to the total number of last level cache accesses. This gives…
187 …"BriefDescription": "This metric measures the number of last level cache read accesses missed per …