Lines Matching full:asrc
3 // tegra186_asrc.c - Tegra186 ASRC driver
70 static void tegra186_asrc_lock_stream(struct tegra186_asrc *asrc, in tegra186_asrc_lock_stream() argument
73 regmap_write(asrc->regmap, in tegra186_asrc_lock_stream()
81 struct tegra186_asrc *asrc = dev_get_drvdata(dev); in tegra186_asrc_runtime_suspend() local
83 regcache_cache_only(asrc->regmap, true); in tegra186_asrc_runtime_suspend()
84 regcache_mark_dirty(asrc->regmap); in tegra186_asrc_runtime_suspend()
91 struct tegra186_asrc *asrc = dev_get_drvdata(dev); in tegra186_asrc_runtime_resume() local
94 regcache_cache_only(asrc->regmap, false); in tegra186_asrc_runtime_resume()
101 regmap_write(asrc->regmap, TEGRA186_ASRC_GLOBAL_SCRATCH_ADDR, in tegra186_asrc_runtime_resume()
103 regmap_write(asrc->regmap, TEGRA186_ASRC_GLOBAL_ENB, in tegra186_asrc_runtime_resume()
106 regcache_sync(asrc->regmap); in tegra186_asrc_runtime_resume()
109 if (asrc->lane[id].ratio_source != in tegra186_asrc_runtime_resume()
113 regmap_write(asrc->regmap, in tegra186_asrc_runtime_resume()
116 asrc->lane[id].int_part); in tegra186_asrc_runtime_resume()
118 regmap_write(asrc->regmap, in tegra186_asrc_runtime_resume()
121 asrc->lane[id].frac_part); in tegra186_asrc_runtime_resume()
123 tegra186_asrc_lock_stream(asrc, id); in tegra186_asrc_runtime_resume()
129 static int tegra186_asrc_set_audio_cif(struct tegra186_asrc *asrc, in tegra186_asrc_set_audio_cif() argument
157 tegra_set_cif(asrc->regmap, reg, &cif_conf); in tegra186_asrc_set_audio_cif()
167 struct tegra186_asrc *asrc = snd_soc_dai_get_drvdata(dai); in tegra186_asrc_in_hw_params() local
171 regmap_write(asrc->regmap, in tegra186_asrc_in_hw_params()
173 asrc->lane[id].input_thresh); in tegra186_asrc_in_hw_params()
175 ret = tegra186_asrc_set_audio_cif(asrc, params, in tegra186_asrc_in_hw_params()
178 dev_err(dev, "Can't set ASRC RX%d CIF: %d\n", dai->id, ret); in tegra186_asrc_in_hw_params()
190 struct tegra186_asrc *asrc = snd_soc_dai_get_drvdata(dai); in tegra186_asrc_out_hw_params() local
194 regmap_write(asrc->regmap, in tegra186_asrc_out_hw_params()
196 asrc->lane[id].output_thresh); in tegra186_asrc_out_hw_params()
198 ret = tegra186_asrc_set_audio_cif(asrc, params, in tegra186_asrc_out_hw_params()
201 dev_err(dev, "Can't set ASRC TX%d CIF: %d\n", id, ret); in tegra186_asrc_out_hw_params()
206 if (asrc->lane[id].hwcomp_disable) { in tegra186_asrc_out_hw_params()
207 regmap_update_bits(asrc->regmap, in tegra186_asrc_out_hw_params()
212 regmap_update_bits(asrc->regmap, in tegra186_asrc_out_hw_params()
217 regmap_write(asrc->regmap, in tegra186_asrc_out_hw_params()
223 regmap_update_bits(asrc->regmap, in tegra186_asrc_out_hw_params()
225 1, asrc->lane[id].ratio_source); in tegra186_asrc_out_hw_params()
227 if (asrc->lane[id].ratio_source == TEGRA186_ASRC_RATIO_SOURCE_SW) { in tegra186_asrc_out_hw_params()
228 regmap_write(asrc->regmap, in tegra186_asrc_out_hw_params()
230 asrc->lane[id].int_part); in tegra186_asrc_out_hw_params()
231 regmap_write(asrc->regmap, in tegra186_asrc_out_hw_params()
233 asrc->lane[id].frac_part); in tegra186_asrc_out_hw_params()
234 tegra186_asrc_lock_stream(asrc, id); in tegra186_asrc_out_hw_params()
246 struct tegra186_asrc *asrc = snd_soc_component_get_drvdata(cmpnt); in tegra186_asrc_get_ratio_source() local
249 ucontrol->value.enumerated.item[0] = asrc->lane[id].ratio_source; in tegra186_asrc_get_ratio_source()
260 struct tegra186_asrc *asrc = snd_soc_component_get_drvdata(cmpnt); in tegra186_asrc_put_ratio_source() local
264 asrc->lane[id].ratio_source = ucontrol->value.enumerated.item[0]; in tegra186_asrc_put_ratio_source()
266 regmap_update_bits_check(asrc->regmap, asrc_private->reg, in tegra186_asrc_put_ratio_source()
268 asrc->lane[id].ratio_source, in tegra186_asrc_put_ratio_source()
280 struct tegra186_asrc *asrc = snd_soc_component_get_drvdata(cmpnt); in tegra186_asrc_get_ratio_int() local
283 regmap_read(asrc->regmap, in tegra186_asrc_get_ratio_int()
285 &asrc->lane[id].int_part); in tegra186_asrc_get_ratio_int()
287 ucontrol->value.integer.value[0] = asrc->lane[id].int_part; in tegra186_asrc_get_ratio_int()
298 struct tegra186_asrc *asrc = snd_soc_component_get_drvdata(cmpnt); in tegra186_asrc_put_ratio_int() local
302 if (asrc->lane[id].ratio_source == TEGRA186_ASRC_RATIO_SOURCE_ARAD) { in tegra186_asrc_put_ratio_int()
309 asrc->lane[id].int_part = ucontrol->value.integer.value[0]; in tegra186_asrc_put_ratio_int()
311 regmap_update_bits_check(asrc->regmap, in tegra186_asrc_put_ratio_int()
315 asrc->lane[id].int_part, &change); in tegra186_asrc_put_ratio_int()
317 tegra186_asrc_lock_stream(asrc, id); in tegra186_asrc_put_ratio_int()
328 struct tegra186_asrc *asrc = snd_soc_component_get_drvdata(cmpnt); in tegra186_asrc_get_ratio_frac() local
331 regmap_read(asrc->regmap, in tegra186_asrc_get_ratio_frac()
333 &asrc->lane[id].frac_part); in tegra186_asrc_get_ratio_frac()
335 ucontrol->value.integer.value[0] = asrc->lane[id].frac_part; in tegra186_asrc_get_ratio_frac()
346 struct tegra186_asrc *asrc = snd_soc_component_get_drvdata(cmpnt); in tegra186_asrc_put_ratio_frac() local
350 if (asrc->lane[id].ratio_source == TEGRA186_ASRC_RATIO_SOURCE_ARAD) { in tegra186_asrc_put_ratio_frac()
357 asrc->lane[id].frac_part = ucontrol->value.integer.value[0]; in tegra186_asrc_put_ratio_frac()
359 regmap_update_bits_check(asrc->regmap, in tegra186_asrc_put_ratio_frac()
363 asrc->lane[id].frac_part, &change); in tegra186_asrc_put_ratio_frac()
365 tegra186_asrc_lock_stream(asrc, id); in tegra186_asrc_put_ratio_frac()
376 struct tegra186_asrc *asrc = snd_soc_component_get_drvdata(cmpnt); in tegra186_asrc_get_hwcomp_disable() local
379 ucontrol->value.integer.value[0] = asrc->lane[id].hwcomp_disable; in tegra186_asrc_get_hwcomp_disable()
390 struct tegra186_asrc *asrc = snd_soc_component_get_drvdata(cmpnt); in tegra186_asrc_put_hwcomp_disable() local
394 if (value == asrc->lane[id].hwcomp_disable) in tegra186_asrc_put_hwcomp_disable()
397 asrc->lane[id].hwcomp_disable = value; in tegra186_asrc_put_hwcomp_disable()
408 struct tegra186_asrc *asrc = snd_soc_component_get_drvdata(cmpnt); in tegra186_asrc_get_input_threshold() local
411 ucontrol->value.integer.value[0] = (asrc->lane[id].input_thresh & 0x3); in tegra186_asrc_get_input_threshold()
422 struct tegra186_asrc *asrc = snd_soc_component_get_drvdata(cmpnt); in tegra186_asrc_put_input_threshold() local
424 int value = (asrc->lane[id].input_thresh & ~(0x3)) | in tegra186_asrc_put_input_threshold()
427 if (value == asrc->lane[id].input_thresh) in tegra186_asrc_put_input_threshold()
430 asrc->lane[id].input_thresh = value; in tegra186_asrc_put_input_threshold()
441 struct tegra186_asrc *asrc = snd_soc_component_get_drvdata(cmpnt); in tegra186_asrc_get_output_threshold() local
444 ucontrol->value.integer.value[0] = (asrc->lane[id].output_thresh & 0x3); in tegra186_asrc_get_output_threshold()
455 struct tegra186_asrc *asrc = snd_soc_component_get_drvdata(cmpnt); in tegra186_asrc_put_output_threshold() local
457 int value = (asrc->lane[id].output_thresh & ~(0x3)) | in tegra186_asrc_put_output_threshold()
460 if (value == asrc->lane[id].output_thresh) in tegra186_asrc_put_output_threshold()
463 asrc->lane[id].output_thresh = value; in tegra186_asrc_put_output_threshold()
472 struct tegra186_asrc *asrc = dev_get_drvdata(cmpnt->dev); in tegra186_asrc_widget_event() local
476 regmap_write(asrc->regmap, in tegra186_asrc_widget_event()
493 .name = "ASRC-RX-CIF"#id, \
519 .name = "ASRC-TX-CIF"#id, \
544 /* ASRC Input */
552 /* ASRC Output */
958 { .compatible = "nvidia,tegra186-asrc" },
966 struct tegra186_asrc *asrc; in tegra186_asrc_platform_probe() local
971 asrc = devm_kzalloc(dev, sizeof(*asrc), GFP_KERNEL); in tegra186_asrc_platform_probe()
972 if (!asrc) in tegra186_asrc_platform_probe()
975 dev_set_drvdata(dev, asrc); in tegra186_asrc_platform_probe()
981 asrc->regmap = devm_regmap_init_mmio(dev, regs, in tegra186_asrc_platform_probe()
983 if (IS_ERR(asrc->regmap)) { in tegra186_asrc_platform_probe()
985 return PTR_ERR(asrc->regmap); in tegra186_asrc_platform_probe()
988 regcache_cache_only(asrc->regmap, true); in tegra186_asrc_platform_probe()
990 regmap_write(asrc->regmap, TEGRA186_ASRC_GLOBAL_CFG, in tegra186_asrc_platform_probe()
995 asrc->lane[i].ratio_source = TEGRA186_ASRC_RATIO_SOURCE_SW; in tegra186_asrc_platform_probe()
996 asrc->lane[i].int_part = 1; in tegra186_asrc_platform_probe()
997 asrc->lane[i].frac_part = 0; in tegra186_asrc_platform_probe()
998 asrc->lane[i].hwcomp_disable = 0; in tegra186_asrc_platform_probe()
999 asrc->lane[i].input_thresh = in tegra186_asrc_platform_probe()
1001 asrc->lane[i].output_thresh = in tegra186_asrc_platform_probe()
1009 dev_err(dev, "can't register ASRC component, err: %d\n", err); in tegra186_asrc_platform_probe()
1032 .name = "tegra186-asrc",
1042 MODULE_DESCRIPTION("Tegra186 ASRC ASoC driver");