Lines Matching refs:sdev
29 static void hda_ssp_set_cbp_cfp(struct snd_sof_dev *sdev) in hda_ssp_set_cbp_cfp() argument
31 struct sof_intel_hda_dev *hda = sdev->pdata->hw_pdata; in hda_ssp_set_cbp_cfp()
37 snd_sof_dsp_update_bits_unlocked(sdev, HDA_DSP_BAR, in hda_ssp_set_cbp_cfp()
50 struct snd_sof_dev *sdev = dev_get_drvdata(dev); in hda_cl_prepare() local
55 hext_stream = hda_dsp_stream_get(sdev, direction, 0); in hda_cl_prepare()
58 dev_err(sdev->dev, "error: no stream available\n"); in hda_cl_prepare()
67 dev_err(sdev->dev, "error: memory alloc failed: %d\n", ret); in hda_cl_prepare()
76 ret = hda_dsp_iccmax_stream_hw_params(sdev, hext_stream, dmab, NULL); in hda_cl_prepare()
78 dev_err(sdev->dev, "error: iccmax stream prepare failed: %d\n", ret); in hda_cl_prepare()
82 ret = hda_dsp_stream_hw_params(sdev, hext_stream, dmab, NULL); in hda_cl_prepare()
84 dev_err(sdev->dev, "error: hdac prepare failed: %d\n", ret); in hda_cl_prepare()
87 hda_dsp_stream_spib_config(sdev, hext_stream, HDA_DSP_SPIB_ENABLE, size); in hda_cl_prepare()
95 hda_dsp_stream_put(sdev, direction, hstream->stream_tag); in hda_cl_prepare()
105 int cl_dsp_init(struct snd_sof_dev *sdev, int stream_tag, bool imr_boot) in cl_dsp_init() argument
107 struct sof_intel_hda_dev *hda = sdev->pdata->hw_pdata; in cl_dsp_init()
116 ret = hda_dsp_core_power_up(sdev, chip->host_managed_cores_mask); in cl_dsp_init()
119 dev_err(sdev->dev, "error: dsp core 0/1 power up failed\n"); in cl_dsp_init()
123 hda_ssp_set_cbp_cfp(sdev); in cl_dsp_init()
130 snd_sof_dsp_write(sdev, HDA_DSP_BAR, chip->ipc_req, ipc_hdr); in cl_dsp_init()
133 ret = hda_dsp_core_run(sdev, chip->init_core_mask); in cl_dsp_init()
136 dev_err(sdev->dev, in cl_dsp_init()
143 ret = snd_sof_dsp_read_poll_timeout(sdev, HDA_DSP_BAR, in cl_dsp_init()
152 dev_err(sdev->dev, in cl_dsp_init()
159 snd_sof_dsp_update_bits_forced(sdev, HDA_DSP_BAR, in cl_dsp_init()
165 ret = hda_dsp_core_reset_power_down(sdev, chip->host_managed_cores_mask & in cl_dsp_init()
169 dev_err(sdev->dev, in cl_dsp_init()
175 hda_dsp_ipc_int_enable(sdev); in cl_dsp_init()
187 ret = snd_sof_dsp_read_poll_timeout(sdev, HDA_DSP_BAR, in cl_dsp_init()
195 sdev->enabled_cores_mask |= chip->init_core_mask; in cl_dsp_init()
196 mask = sdev->enabled_cores_mask; in cl_dsp_init()
198 sdev->dsp_core_ref_count[j]++; in cl_dsp_init()
203 dev_err(sdev->dev, in cl_dsp_init()
216 snd_sof_dsp_dbg_dump(sdev, dump_msg, flags); in cl_dsp_init()
217 hda_dsp_core_reset_power_down(sdev, chip->host_managed_cores_mask); in cl_dsp_init()
226 struct snd_sof_dev *sdev = dev_get_drvdata(dev); in hda_cl_trigger() local
238 snd_sof_dsp_update_bits(sdev, HDA_DSP_HDA_BAR, SOF_HDA_INTCTL, in hda_cl_trigger()
242 snd_sof_dsp_update_bits(sdev, HDA_DSP_HDA_BAR, in hda_cl_trigger()
252 return hda_dsp_stream_trigger(sdev, hext_stream, cmd); in hda_cl_trigger()
260 struct snd_sof_dev *sdev = dev_get_drvdata(dev); in hda_cl_cleanup() local
266 ret = hda_dsp_stream_spib_config(sdev, hext_stream, HDA_DSP_SPIB_DISABLE, 0); in hda_cl_cleanup()
268 snd_sof_dsp_update_bits(sdev, HDA_DSP_HDA_BAR, sd_offset, in hda_cl_cleanup()
271 hda_dsp_stream_put(sdev, hstream->direction, hstream->stream_tag); in hda_cl_cleanup()
276 snd_sof_dsp_write(sdev, HDA_DSP_HDA_BAR, in hda_cl_cleanup()
278 snd_sof_dsp_write(sdev, HDA_DSP_HDA_BAR, in hda_cl_cleanup()
281 snd_sof_dsp_write(sdev, HDA_DSP_HDA_BAR, sd_offset, 0); in hda_cl_cleanup()
293 int hda_cl_copy_fw(struct snd_sof_dev *sdev, struct hdac_ext_stream *hext_stream) in hda_cl_copy_fw() argument
295 struct sof_intel_hda_dev *hda = sdev->pdata->hw_pdata; in hda_cl_copy_fw()
300 dev_dbg(sdev->dev, "Code loader DMA starting\n"); in hda_cl_copy_fw()
302 ret = hda_cl_trigger(sdev->dev, hext_stream, SNDRV_PCM_TRIGGER_START); in hda_cl_copy_fw()
304 dev_err(sdev->dev, "error: DMA trigger start failed\n"); in hda_cl_copy_fw()
308 dev_dbg(sdev->dev, "waiting for FW_ENTERED status\n"); in hda_cl_copy_fw()
310 status = snd_sof_dsp_read_poll_timeout(sdev, HDA_DSP_BAR, in hda_cl_copy_fw()
322 dev_err(sdev->dev, in hda_cl_copy_fw()
326 dev_dbg(sdev->dev, "Code loader FW_ENTERED status\n"); in hda_cl_copy_fw()
329 ret = hda_cl_trigger(sdev->dev, hext_stream, SNDRV_PCM_TRIGGER_STOP); in hda_cl_copy_fw()
331 dev_err(sdev->dev, "error: DMA trigger stop failed\n"); in hda_cl_copy_fw()
335 dev_dbg(sdev->dev, "Code loader DMA stopped\n"); in hda_cl_copy_fw()
341 int hda_dsp_cl_boot_firmware_iccmax(struct snd_sof_dev *sdev) in hda_dsp_cl_boot_firmware_iccmax() argument
349 original_gb = snd_sof_dsp_read8(sdev, HDA_DSP_HDA_BAR, HDA_VS_INTEL_LTRP) & in hda_dsp_cl_boot_firmware_iccmax()
356 iccmax_stream = hda_cl_prepare(sdev->dev, HDA_CL_STREAM_FORMAT, PAGE_SIZE, in hda_dsp_cl_boot_firmware_iccmax()
359 dev_err(sdev->dev, "error: dma prepare for ICCMAX stream failed\n"); in hda_dsp_cl_boot_firmware_iccmax()
363 ret = hda_dsp_cl_boot_firmware(sdev); in hda_dsp_cl_boot_firmware_iccmax()
369 ret1 = hda_cl_cleanup(sdev->dev, &dmab_bdl, iccmax_stream); in hda_dsp_cl_boot_firmware_iccmax()
371 dev_err(sdev->dev, "error: ICCMAX stream cleanup failed\n"); in hda_dsp_cl_boot_firmware_iccmax()
379 snd_sof_dsp_update8(sdev, HDA_DSP_HDA_BAR, HDA_VS_INTEL_LTRP, in hda_dsp_cl_boot_firmware_iccmax()
386 static int hda_dsp_boot_imr(struct snd_sof_dev *sdev) in hda_dsp_boot_imr() argument
391 chip_info = get_chip_info(sdev->pdata); in hda_dsp_boot_imr()
393 ret = chip_info->cl_init(sdev, 0, true); in hda_dsp_boot_imr()
398 hda_sdw_process_wakeen(sdev); in hda_dsp_boot_imr()
403 int hda_dsp_cl_boot_firmware(struct snd_sof_dev *sdev) in hda_dsp_cl_boot_firmware() argument
405 struct sof_intel_hda_dev *hda = sdev->pdata->hw_pdata; in hda_dsp_cl_boot_firmware()
406 struct snd_sof_pdata *plat_data = sdev->pdata; in hda_dsp_cl_boot_firmware()
414 if (hda->imrboot_supported && !sdev->first_boot && !hda->skip_imr_boot) { in hda_dsp_cl_boot_firmware()
415 dev_dbg(sdev->dev, "IMR restore supported, booting from IMR directly\n"); in hda_dsp_cl_boot_firmware()
417 ret = hda_dsp_boot_imr(sdev); in hda_dsp_cl_boot_firmware()
423 dev_warn(sdev->dev, "IMR restore failed, trying to cold boot\n"); in hda_dsp_cl_boot_firmware()
430 if (sdev->basefw.fw->size <= sdev->basefw.payload_offset) { in hda_dsp_cl_boot_firmware()
431 dev_err(sdev->dev, "error: firmware size must be greater than firmware offset\n"); in hda_dsp_cl_boot_firmware()
435 stripped_firmware.data = sdev->basefw.fw->data + sdev->basefw.payload_offset; in hda_dsp_cl_boot_firmware()
436 stripped_firmware.size = sdev->basefw.fw->size - sdev->basefw.payload_offset; in hda_dsp_cl_boot_firmware()
439 init_waitqueue_head(&sdev->boot_wait); in hda_dsp_cl_boot_firmware()
442 hext_stream = hda_cl_prepare(sdev->dev, HDA_CL_STREAM_FORMAT, in hda_dsp_cl_boot_firmware()
446 dev_err(sdev->dev, "error: dma prepare for fw loading failed\n"); in hda_dsp_cl_boot_firmware()
455 dev_dbg(sdev->dev, in hda_dsp_cl_boot_firmware()
460 ret = chip_info->cl_init(sdev, hext_stream->hstream.stream_tag, false); in hda_dsp_cl_boot_firmware()
470 dev_err(sdev->dev, "error: dsp init failed after %d attempts with err: %d\n", in hda_dsp_cl_boot_firmware()
490 if (!sdev->first_boot) in hda_dsp_cl_boot_firmware()
491 hda_sdw_process_wakeen(sdev); in hda_dsp_cl_boot_firmware()
501 ret = hda_cl_copy_fw(sdev, hext_stream); in hda_dsp_cl_boot_firmware()
503 dev_dbg(sdev->dev, "Firmware download successful, booting...\n"); in hda_dsp_cl_boot_firmware()
506 snd_sof_dsp_dbg_dump(sdev, "Firmware download failed", in hda_dsp_cl_boot_firmware()
517 ret1 = hda_cl_cleanup(sdev->dev, &dmab, hext_stream); in hda_dsp_cl_boot_firmware()
519 dev_err(sdev->dev, "error: Code loader DSP cleanup failed\n"); in hda_dsp_cl_boot_firmware()
534 hda_dsp_ctrl_ppcap_enable(sdev, false); in hda_dsp_cl_boot_firmware()
540 int hda_dsp_ipc4_load_library(struct snd_sof_dev *sdev, in hda_dsp_ipc4_load_library() argument
543 struct sof_intel_hda_dev *hda = sdev->pdata->hw_pdata; in hda_dsp_ipc4_load_library()
544 struct sof_ipc4_fw_data *ipc4_data = sdev->private; in hda_dsp_ipc4_load_library()
560 hext_stream = hda_cl_prepare(sdev->dev, HDA_CL_STREAM_FORMAT, in hda_dsp_ipc4_load_library()
564 dev_err(sdev->dev, "%s: DMA prepare failed\n", __func__); in hda_dsp_ipc4_load_library()
581 ret = sof_ipc_tx_message_no_reply(sdev->ipc, &msg, 0); in hda_dsp_ipc4_load_library()
591 ret = snd_sof_dsp_read_poll_timeout(sdev, HDA_DSP_HDA_BAR, in hda_dsp_ipc4_load_library()
599 dev_warn(sdev->dev, in hda_dsp_ipc4_load_library()
605 ret = hda_cl_trigger(sdev->dev, hext_stream, SNDRV_PCM_TRIGGER_START); in hda_dsp_ipc4_load_library()
607 dev_err(sdev->dev, "%s: DMA trigger start failed\n", __func__); in hda_dsp_ipc4_load_library()
619 ret = sof_ipc_tx_message_no_reply(sdev->ipc, &msg, 0); in hda_dsp_ipc4_load_library()
622 ret1 = hda_cl_trigger(sdev->dev, hext_stream, SNDRV_PCM_TRIGGER_STOP); in hda_dsp_ipc4_load_library()
624 dev_err(sdev->dev, "%s: DMA trigger stop failed\n", __func__); in hda_dsp_ipc4_load_library()
631 ret1 = hda_cl_cleanup(sdev->dev, &dmab, hext_stream); in hda_dsp_ipc4_load_library()
633 dev_err(sdev->dev, "%s: Code loader DSP cleanup failed\n", __func__); in hda_dsp_ipc4_load_library()
644 int hda_dsp_ext_man_get_cavs_config_data(struct snd_sof_dev *sdev, in hda_dsp_ext_man_get_cavs_config_data() argument
649 struct sof_intel_hda_dev *hda = sdev->pdata->hw_pdata; in hda_dsp_ext_man_get_cavs_config_data()
656 dev_err(sdev->dev, "cavs config data is inconsistent: %d\n", elem_num); in hda_dsp_ext_man_get_cavs_config_data()
667 dev_dbg(sdev->dev, "FW clock config: %s\n", in hda_dsp_ext_man_get_cavs_config_data()
675 dev_info(sdev->dev, "unsupported token type: %d\n", in hda_dsp_ext_man_get_cavs_config_data()