Lines Matching refs:MT8188_SOC_ENUM_EXT

1691 	MT8188_SOC_ENUM_EXT("dl2_1x_en_sel",
1696 	MT8188_SOC_ENUM_EXT("dl3_1x_en_sel",
1701 	MT8188_SOC_ENUM_EXT("dl6_1x_en_sel",
1706 	MT8188_SOC_ENUM_EXT("dl7_1x_en_sel",
1711 	MT8188_SOC_ENUM_EXT("dl8_1x_en_sel",
1716 	MT8188_SOC_ENUM_EXT("dl10_1x_en_sel",
1721 	MT8188_SOC_ENUM_EXT("dl11_1x_en_sel",
1726 	MT8188_SOC_ENUM_EXT("ul1_1x_en_sel",
1731 	MT8188_SOC_ENUM_EXT("ul2_1x_en_sel",
1736 	MT8188_SOC_ENUM_EXT("ul3_1x_en_sel",
1741 	MT8188_SOC_ENUM_EXT("ul4_1x_en_sel",
1746 	MT8188_SOC_ENUM_EXT("ul5_1x_en_sel",
1751 	MT8188_SOC_ENUM_EXT("ul6_1x_en_sel",
1756 	MT8188_SOC_ENUM_EXT("ul8_1x_en_sel",
1761 	MT8188_SOC_ENUM_EXT("ul9_1x_en_sel",
1766 	MT8188_SOC_ENUM_EXT("ul10_1x_en_sel",
1771 	MT8188_SOC_ENUM_EXT("asys_irq1_1x_en_sel",
1776 	MT8188_SOC_ENUM_EXT("asys_irq2_1x_en_sel",
1781 	MT8188_SOC_ENUM_EXT("asys_irq3_1x_en_sel",
1786 	MT8188_SOC_ENUM_EXT("asys_irq4_1x_en_sel",
1791 	MT8188_SOC_ENUM_EXT("asys_irq5_1x_en_sel",
1796 	MT8188_SOC_ENUM_EXT("asys_irq6_1x_en_sel",
1801 	MT8188_SOC_ENUM_EXT("asys_irq7_1x_en_sel",
1806 	MT8188_SOC_ENUM_EXT("asys_irq8_1x_en_sel",
1811 	MT8188_SOC_ENUM_EXT("asys_irq9_1x_en_sel",
1816 	MT8188_SOC_ENUM_EXT("asys_irq10_1x_en_sel",
1821 	MT8188_SOC_ENUM_EXT("asys_irq11_1x_en_sel",
1826 	MT8188_SOC_ENUM_EXT("asys_irq12_1x_en_sel",
1831 	MT8188_SOC_ENUM_EXT("asys_irq13_1x_en_sel",
1836 	MT8188_SOC_ENUM_EXT("asys_irq14_1x_en_sel",
1841 	MT8188_SOC_ENUM_EXT("asys_irq15_1x_en_sel",
1846 	MT8188_SOC_ENUM_EXT("asys_irq16_1x_en_sel",
1851 	MT8188_SOC_ENUM_EXT("dl2_fs_timing_sel",
1856 	MT8188_SOC_ENUM_EXT("dl3_fs_timing_sel",
1861 	MT8188_SOC_ENUM_EXT("dl6_fs_timing_sel",
1866 	MT8188_SOC_ENUM_EXT("dl8_fs_timing_sel",
1871 	MT8188_SOC_ENUM_EXT("dl11_fs_timing_sel",
1876 	MT8188_SOC_ENUM_EXT("ul2_fs_timing_sel",
1881 	MT8188_SOC_ENUM_EXT("ul4_fs_timing_sel",
1886 	MT8188_SOC_ENUM_EXT("ul5_fs_timing_sel",
1891 	MT8188_SOC_ENUM_EXT("ul9_fs_timing_sel",
1896 	MT8188_SOC_ENUM_EXT("ul10_fs_timing_sel",