Lines Matching +full:switch +full:- +full:freq +full:- +full:select
1 // SPDX-License-Identifier: GPL-2.0
11 #include "mt8186-afe-clk.h"
12 #include "mt8186-afe-common.h"
13 #include "mt8186-afe-gpio.h"
14 #include "mt8186-interconnection.h"
88 return -EINVAL; in get_i2s_id_by_name()
94 struct mt8186_afe_private *afe_priv = afe->platform_priv; in get_i2s_priv_by_name()
100 return afe_priv->dai_priv[dai_id]; in get_i2s_priv_by_name()
120 i2s_priv = get_i2s_priv_by_name(afe, kcontrol->id.name); in mt8186_i2s_hd_get()
121 ucontrol->value.integer.value[0] = i2s_priv->low_jitter_en; in mt8186_i2s_hd_get()
132 struct soc_enum *e = (struct soc_enum *)kcontrol->private_value; in mt8186_i2s_hd_set()
135 if (ucontrol->value.enumerated.item[0] >= e->items) in mt8186_i2s_hd_set()
136 return -EINVAL; in mt8186_i2s_hd_set()
138 hd_en = ucontrol->value.integer.value[0]; in mt8186_i2s_hd_set()
140 dev_dbg(afe->dev, "%s(), kcontrol name %s, hd_en %d\n", in mt8186_i2s_hd_set()
141 __func__, kcontrol->id.name, hd_en); in mt8186_i2s_hd_set()
143 i2s_priv = get_i2s_priv_by_name(afe, kcontrol->id.name); in mt8186_i2s_hd_set()
144 if (i2s_priv->low_jitter_en == hd_en) in mt8186_i2s_hd_set()
147 i2s_priv->low_jitter_en = hd_en; in mt8186_i2s_hd_set()
181 SOC_DAPM_ENUM("I2S0 In Select", i2s_mux_map_enum);
184 SOC_DAPM_ENUM("I2S1 Out Select", i2s_mux_map_enum);
187 SOC_DAPM_ENUM("I2S2 In Select", i2s_mux_map_enum);
190 SOC_DAPM_ENUM("I2S3 Out Select", i2s_mux_map_enum);
209 SOC_DAPM_ENUM("I2S Lpbk Select", i2s0_lpbk_mux_map_enum);
219 SOC_DAPM_ENUM("I2S Lpbk Select", i2s2_lpbk_mux_map_enum);
223 SOC_DAPM_SINGLE_AUTODISABLE("DL1_CH1 Switch", AFE_CONN0,
225 SOC_DAPM_SINGLE_AUTODISABLE("DL2_CH1 Switch", AFE_CONN0,
227 SOC_DAPM_SINGLE_AUTODISABLE("DL3_CH1 Switch", AFE_CONN0,
229 SOC_DAPM_SINGLE_AUTODISABLE("DL12_CH1 Switch", AFE_CONN0,
231 SOC_DAPM_SINGLE_AUTODISABLE("DL12_CH3 Switch", AFE_CONN0,
233 SOC_DAPM_SINGLE_AUTODISABLE("DL6_CH1 Switch", AFE_CONN0_1,
235 SOC_DAPM_SINGLE_AUTODISABLE("DL4_CH1 Switch", AFE_CONN0_1,
237 SOC_DAPM_SINGLE_AUTODISABLE("DL5_CH1 Switch", AFE_CONN0_1,
239 SOC_DAPM_SINGLE_AUTODISABLE("DL8_CH1 Switch", AFE_CONN0_1,
241 SOC_DAPM_SINGLE_AUTODISABLE("GAIN1_OUT_CH1 Switch", AFE_CONN0,
243 SOC_DAPM_SINGLE_AUTODISABLE("ADDA_UL_CH1 Switch", AFE_CONN0,
245 SOC_DAPM_SINGLE_AUTODISABLE("ADDA_UL_CH2 Switch", AFE_CONN0,
247 SOC_DAPM_SINGLE_AUTODISABLE("ADDA_UL_CH3 Switch", AFE_CONN0,
249 SOC_DAPM_SINGLE_AUTODISABLE("PCM_1_CAP_CH1 Switch", AFE_CONN0,
251 SOC_DAPM_SINGLE_AUTODISABLE("SRC_1_OUT_CH1 Switch", AFE_CONN0_1,
256 SOC_DAPM_SINGLE_AUTODISABLE("DL1_CH2 Switch", AFE_CONN1,
258 SOC_DAPM_SINGLE_AUTODISABLE("DL2_CH2 Switch", AFE_CONN1,
260 SOC_DAPM_SINGLE_AUTODISABLE("DL3_CH2 Switch", AFE_CONN1,
262 SOC_DAPM_SINGLE_AUTODISABLE("DL12_CH2 Switch", AFE_CONN1,
264 SOC_DAPM_SINGLE_AUTODISABLE("DL12_CH4 Switch", AFE_CONN1,
266 SOC_DAPM_SINGLE_AUTODISABLE("DL6_CH2 Switch", AFE_CONN1_1,
268 SOC_DAPM_SINGLE_AUTODISABLE("DL4_CH2 Switch", AFE_CONN1_1,
270 SOC_DAPM_SINGLE_AUTODISABLE("DL5_CH2 Switch", AFE_CONN1_1,
272 SOC_DAPM_SINGLE_AUTODISABLE("DL8_CH2 Switch", AFE_CONN1_1,
274 SOC_DAPM_SINGLE_AUTODISABLE("GAIN1_OUT_CH2 Switch", AFE_CONN1,
276 SOC_DAPM_SINGLE_AUTODISABLE("ADDA_UL_CH1 Switch", AFE_CONN1,
278 SOC_DAPM_SINGLE_AUTODISABLE("ADDA_UL_CH2 Switch", AFE_CONN1,
280 SOC_DAPM_SINGLE_AUTODISABLE("ADDA_UL_CH3 Switch", AFE_CONN1,
282 SOC_DAPM_SINGLE_AUTODISABLE("PCM_1_CAP_CH2 Switch", AFE_CONN1,
284 SOC_DAPM_SINGLE_AUTODISABLE("PCM_2_CAP_CH2 Switch", AFE_CONN1,
286 SOC_DAPM_SINGLE_AUTODISABLE("SRC_1_OUT_CH2 Switch", AFE_CONN1_1,
291 SOC_DAPM_SINGLE_AUTODISABLE("DL1_CH1 Switch", AFE_CONN28,
293 SOC_DAPM_SINGLE_AUTODISABLE("DL2_CH1 Switch", AFE_CONN28,
295 SOC_DAPM_SINGLE_AUTODISABLE("DL3_CH1 Switch", AFE_CONN28,
297 SOC_DAPM_SINGLE_AUTODISABLE("DL12_CH1 Switch", AFE_CONN28,
299 SOC_DAPM_SINGLE_AUTODISABLE("DL12_CH3 Switch", AFE_CONN28,
301 SOC_DAPM_SINGLE_AUTODISABLE("DL6_CH1 Switch", AFE_CONN28_1,
303 SOC_DAPM_SINGLE_AUTODISABLE("DL4_CH1 Switch", AFE_CONN28_1,
305 SOC_DAPM_SINGLE_AUTODISABLE("DL5_CH1 Switch", AFE_CONN28_1,
307 SOC_DAPM_SINGLE_AUTODISABLE("DL8_CH1 Switch", AFE_CONN28_1,
309 SOC_DAPM_SINGLE_AUTODISABLE("GAIN1_OUT_CH1 Switch", AFE_CONN28,
311 SOC_DAPM_SINGLE_AUTODISABLE("ADDA_UL_CH1 Switch", AFE_CONN28,
313 SOC_DAPM_SINGLE_AUTODISABLE("PCM_1_CAP_CH1 Switch", AFE_CONN28,
315 SOC_DAPM_SINGLE_AUTODISABLE("SRC_1_OUT_CH1 Switch", AFE_CONN28_1,
320 SOC_DAPM_SINGLE_AUTODISABLE("DL1_CH2 Switch", AFE_CONN29,
322 SOC_DAPM_SINGLE_AUTODISABLE("DL2_CH2 Switch", AFE_CONN29,
324 SOC_DAPM_SINGLE_AUTODISABLE("DL3_CH2 Switch", AFE_CONN29,
326 SOC_DAPM_SINGLE_AUTODISABLE("DL12_CH2 Switch", AFE_CONN29,
328 SOC_DAPM_SINGLE_AUTODISABLE("DL12_CH4 Switch", AFE_CONN29,
330 SOC_DAPM_SINGLE_AUTODISABLE("DL6_CH2 Switch", AFE_CONN29_1,
332 SOC_DAPM_SINGLE_AUTODISABLE("DL4_CH2 Switch", AFE_CONN29_1,
334 SOC_DAPM_SINGLE_AUTODISABLE("DL5_CH2 Switch", AFE_CONN29_1,
336 SOC_DAPM_SINGLE_AUTODISABLE("DL8_CH2 Switch", AFE_CONN29_1,
338 SOC_DAPM_SINGLE_AUTODISABLE("GAIN1_OUT_CH2 Switch", AFE_CONN29,
340 SOC_DAPM_SINGLE_AUTODISABLE("ADDA_UL_CH2 Switch", AFE_CONN29,
342 SOC_DAPM_SINGLE_AUTODISABLE("PCM_1_CAP_CH2 Switch", AFE_CONN29,
344 SOC_DAPM_SINGLE_AUTODISABLE("PCM_2_CAP_CH2 Switch", AFE_CONN29,
346 SOC_DAPM_SINGLE_AUTODISABLE("SRC_1_OUT_CH2 Switch", AFE_CONN29_1,
361 struct snd_soc_component *cmpnt = snd_soc_dapm_to_component(w->dapm); in mtk_i2s_en_event()
365 i2s_priv = get_i2s_priv_by_name(afe, w->name); in mtk_i2s_en_event()
367 dev_dbg(cmpnt->dev, "%s(), name %s, event 0x%x\n", in mtk_i2s_en_event()
368 __func__, w->name, event); in mtk_i2s_en_event()
370 switch (event) { in mtk_i2s_en_event()
372 mt8186_afe_gpio_request(afe->dev, true, i2s_priv->id, 0); in mtk_i2s_en_event()
375 mt8186_afe_gpio_request(afe->dev, false, i2s_priv->id, 0); in mtk_i2s_en_event()
388 struct snd_soc_component *cmpnt = snd_soc_dapm_to_component(w->dapm); in mtk_apll_event()
391 dev_dbg(cmpnt->dev, "%s(), name %s, event 0x%x\n", in mtk_apll_event()
392 __func__, w->name, event); in mtk_apll_event()
394 switch (event) { in mtk_apll_event()
418 struct snd_soc_component *cmpnt = snd_soc_dapm_to_component(w->dapm); in mtk_mclk_en_event()
422 dev_dbg(cmpnt->dev, "%s(), name %s, event 0x%x\n", in mtk_mclk_en_event()
423 __func__, w->name, event); in mtk_mclk_en_event()
425 i2s_priv = get_i2s_priv_by_name(afe, w->name); in mtk_mclk_en_event()
427 switch (event) { in mtk_mclk_en_event()
429 mt8186_mck_enable(afe, i2s_priv->mclk_id, i2s_priv->mclk_rate); in mtk_mclk_en_event()
432 i2s_priv->mclk_rate = 0; in mtk_mclk_en_event()
433 mt8186_mck_disable(afe, i2s_priv->mclk_id); in mtk_mclk_en_event()
541 struct snd_soc_component *cmpnt = snd_soc_dapm_to_component(w->dapm); in mtk_afe_i2s_share_connect()
545 i2s_priv = get_i2s_priv_by_name(afe, sink->name); in mtk_afe_i2s_share_connect()
546 if (i2s_priv->share_i2s_id < 0) in mtk_afe_i2s_share_connect()
549 return i2s_priv->share_i2s_id == get_i2s_id_by_name(afe, source->name); in mtk_afe_i2s_share_connect()
556 struct snd_soc_component *cmpnt = snd_soc_dapm_to_component(w->dapm); in mtk_afe_i2s_hd_connect()
560 i2s_priv = get_i2s_priv_by_name(afe, sink->name); in mtk_afe_i2s_hd_connect()
561 if (get_i2s_id_by_name(afe, sink->name) == in mtk_afe_i2s_hd_connect()
562 get_i2s_id_by_name(afe, source->name)) in mtk_afe_i2s_hd_connect()
563 return i2s_priv->low_jitter_en; in mtk_afe_i2s_hd_connect()
566 if (i2s_priv->share_i2s_id < 0) in mtk_afe_i2s_hd_connect()
569 if (i2s_priv->share_i2s_id == get_i2s_id_by_name(afe, source->name)) in mtk_afe_i2s_hd_connect()
570 return i2s_priv->low_jitter_en; in mtk_afe_i2s_hd_connect()
579 struct snd_soc_component *cmpnt = snd_soc_dapm_to_component(w->dapm); in mtk_afe_i2s_apll_connect()
585 i2s_priv = get_i2s_priv_by_name(afe, w->name); in mtk_afe_i2s_apll_connect()
587 cur_apll = mt8186_get_apll_by_name(afe, source->name); in mtk_afe_i2s_apll_connect()
589 i2s_need_apll = mt8186_get_apll_by_rate(afe, i2s_priv->rate); in mtk_afe_i2s_apll_connect()
598 struct snd_soc_component *cmpnt = snd_soc_dapm_to_component(w->dapm); in mtk_afe_i2s_mclk_connect()
602 i2s_priv = get_i2s_priv_by_name(afe, sink->name); in mtk_afe_i2s_mclk_connect()
603 if (get_i2s_id_by_name(afe, sink->name) == in mtk_afe_i2s_mclk_connect()
604 get_i2s_id_by_name(afe, source->name)) in mtk_afe_i2s_mclk_connect()
605 return (i2s_priv->mclk_rate > 0) ? 1 : 0; in mtk_afe_i2s_mclk_connect()
608 if (i2s_priv->share_i2s_id < 0) in mtk_afe_i2s_mclk_connect()
611 if (i2s_priv->share_i2s_id == get_i2s_id_by_name(afe, source->name)) in mtk_afe_i2s_mclk_connect()
612 return (i2s_priv->mclk_rate > 0) ? 1 : 0; in mtk_afe_i2s_mclk_connect()
621 struct snd_soc_component *cmpnt = snd_soc_dapm_to_component(w->dapm); in mtk_afe_mclk_apll_connect()
626 i2s_priv = get_i2s_priv_by_name(afe, w->name); in mtk_afe_mclk_apll_connect()
628 cur_apll = mt8186_get_apll_by_name(afe, source->name); in mtk_afe_mclk_apll_connect()
630 return (i2s_priv->mclk_apll == cur_apll) ? 1 : 0; in mtk_afe_mclk_apll_connect()
657 {"I2S1_CH1", "DL1_CH1 Switch", "DL1"},
658 {"I2S1_CH2", "DL1_CH2 Switch", "DL1"},
660 {"I2S1_CH1", "DL1_CH1 Switch", "DSP_DL1_VIRT"},
661 {"I2S1_CH2", "DL1_CH2 Switch", "DSP_DL1_VIRT"},
663 {"I2S1_CH1", "DL2_CH1 Switch", "DL2"},
664 {"I2S1_CH2", "DL2_CH2 Switch", "DL2"},
666 {"I2S1_CH1", "DL2_CH1 Switch", "DSP_DL2_VIRT"},
667 {"I2S1_CH2", "DL2_CH2 Switch", "DSP_DL2_VIRT"},
669 {"I2S1_CH1", "DL3_CH1 Switch", "DL3"},
670 {"I2S1_CH2", "DL3_CH2 Switch", "DL3"},
672 {"I2S1_CH1", "DL12_CH1 Switch", "DL12"},
673 {"I2S1_CH2", "DL12_CH2 Switch", "DL12"},
675 {"I2S1_CH1", "DL12_CH3 Switch", "DL12"},
676 {"I2S1_CH2", "DL12_CH4 Switch", "DL12"},
678 {"I2S1_CH1", "DL6_CH1 Switch", "DL6"},
679 {"I2S1_CH2", "DL6_CH2 Switch", "DL6"},
681 {"I2S1_CH1", "DL4_CH1 Switch", "DL4"},
682 {"I2S1_CH2", "DL4_CH2 Switch", "DL4"},
684 {"I2S1_CH1", "DL5_CH1 Switch", "DL5"},
685 {"I2S1_CH2", "DL5_CH2 Switch", "DL5"},
687 {"I2S1_CH1", "DL8_CH1 Switch", "DL8"},
688 {"I2S1_CH2", "DL8_CH2 Switch", "DL8"},
733 {"I2S3_CH1", "DL1_CH1 Switch", "DL1"},
734 {"I2S3_CH2", "DL1_CH2 Switch", "DL1"},
736 {"I2S3_CH1", "DL1_CH1 Switch", "DSP_DL1_VIRT"},
737 {"I2S3_CH2", "DL1_CH2 Switch", "DSP_DL1_VIRT"},
739 {"I2S3_CH1", "DL2_CH1 Switch", "DL2"},
740 {"I2S3_CH2", "DL2_CH2 Switch", "DL2"},
742 {"I2S3_CH1", "DL2_CH1 Switch", "DSP_DL2_VIRT"},
743 {"I2S3_CH2", "DL2_CH2 Switch", "DSP_DL2_VIRT"},
745 {"I2S3_CH1", "DL3_CH1 Switch", "DL3"},
746 {"I2S3_CH2", "DL3_CH2 Switch", "DL3"},
748 {"I2S3_CH1", "DL12_CH1 Switch", "DL12"},
749 {"I2S3_CH2", "DL12_CH2 Switch", "DL12"},
751 {"I2S3_CH1", "DL12_CH3 Switch", "DL12"},
752 {"I2S3_CH2", "DL12_CH4 Switch", "DL12"},
754 {"I2S3_CH1", "DL6_CH1 Switch", "DL6"},
755 {"I2S3_CH2", "DL6_CH2 Switch", "DL6"},
757 {"I2S3_CH1", "DL4_CH1 Switch", "DL4"},
758 {"I2S3_CH2", "DL4_CH2 Switch", "DL4"},
760 {"I2S3_CH1", "DL5_CH1 Switch", "DL5"},
761 {"I2S3_CH2", "DL5_CH2 Switch", "DL5"},
763 {"I2S3_CH1", "DL8_CH1 Switch", "DL8"},
764 {"I2S3_CH2", "DL8_CH2 Switch", "DL8"},
815 unsigned int rate_reg = mt8186_rate_transform(afe->dev, in mtk_dai_connsys_i2s_hw_params()
816 rate, dai->id); in mtk_dai_connsys_i2s_hw_params()
819 dev_dbg(afe->dev, "%s(), id %d, stream %d, rate %d\n", in mtk_dai_connsys_i2s_hw_params()
820 __func__, dai->id, substream->stream, rate); in mtk_dai_connsys_i2s_hw_params()
822 /* non-inverse, i2s mode, slave, 16bits, from connsys */ in mtk_dai_connsys_i2s_hw_params()
828 regmap_write(afe->regmap, AFE_CONNSYS_I2S_CON, i2s_con); in mtk_dai_connsys_i2s_hw_params()
831 regmap_update_bits(afe->regmap, AFE_CONNSYS_I2S_CON, in mtk_dai_connsys_i2s_hw_params()
835 regmap_update_bits(afe->regmap, AFE_CONNSYS_I2S_CON, in mtk_dai_connsys_i2s_hw_params()
839 regmap_write(afe->regmap, AFE_ASRC_2CH_CON3, 0x1b9000); in mtk_dai_connsys_i2s_hw_params()
841 regmap_write(afe->regmap, AFE_ASRC_2CH_CON3, 0x140000); in mtk_dai_connsys_i2s_hw_params()
843 regmap_write(afe->regmap, AFE_ASRC_2CH_CON3, 0x1e0000); in mtk_dai_connsys_i2s_hw_params()
846 regmap_write(afe->regmap, AFE_ASRC_2CH_CON4, 0x140000); in mtk_dai_connsys_i2s_hw_params()
847 regmap_write(afe->regmap, AFE_ASRC_2CH_CON9, 0x36000); in mtk_dai_connsys_i2s_hw_params()
848 regmap_write(afe->regmap, AFE_ASRC_2CH_CON10, 0x2fc00); in mtk_dai_connsys_i2s_hw_params()
849 regmap_write(afe->regmap, AFE_ASRC_2CH_CON6, 0x7ef4); in mtk_dai_connsys_i2s_hw_params()
850 regmap_write(afe->regmap, AFE_ASRC_2CH_CON5, 0xff5986); in mtk_dai_connsys_i2s_hw_params()
853 regmap_update_bits(afe->regmap, AFE_ASRC_2CH_CON2, in mtk_dai_connsys_i2s_hw_params()
863 struct mt8186_afe_private *afe_priv = afe->platform_priv; in mtk_dai_connsys_i2s_trigger()
865 dev_dbg(afe->dev, "%s(), cmd %d, stream %d\n", in mtk_dai_connsys_i2s_trigger()
866 __func__, cmd, substream->stream); in mtk_dai_connsys_i2s_trigger()
868 switch (cmd) { in mtk_dai_connsys_i2s_trigger()
872 regmap_update_bits(afe->regmap, in mtk_dai_connsys_i2s_trigger()
878 regmap_update_bits(afe->regmap, in mtk_dai_connsys_i2s_trigger()
884 regmap_update_bits(afe->regmap, in mtk_dai_connsys_i2s_trigger()
888 regmap_update_bits(afe->regmap, in mtk_dai_connsys_i2s_trigger()
893 afe_priv->dai_on[dai->id] = true; in mtk_dai_connsys_i2s_trigger()
897 regmap_update_bits(afe->regmap, AFE_ASRC_2CH_CON0, in mtk_dai_connsys_i2s_trigger()
899 regmap_update_bits(afe->regmap, AFE_ASRC_2CH_CON5, in mtk_dai_connsys_i2s_trigger()
903 regmap_update_bits(afe->regmap, AFE_CONNSYS_I2S_CON, in mtk_dai_connsys_i2s_trigger()
907 regmap_update_bits(afe->regmap, AFE_CONNSYS_I2S_CON, in mtk_dai_connsys_i2s_trigger()
910 afe_priv->dai_on[dai->id] = false; in mtk_dai_connsys_i2s_trigger()
913 return -EINVAL; in mtk_dai_connsys_i2s_trigger()
928 struct mt8186_afe_private *afe_priv = afe->platform_priv; in mtk_dai_i2s_config()
929 struct mtk_afe_i2s_priv *i2s_priv = afe_priv->dai_priv[i2s_id]; in mtk_dai_i2s_config()
932 unsigned int rate_reg = mt8186_rate_transform(afe->dev, in mtk_dai_i2s_config()
938 dev_dbg(afe->dev, "%s(), id %d, rate %d, format %d\n", in mtk_dai_i2s_config()
941 i2s_priv->rate = rate; in mtk_dai_i2s_config()
943 switch (i2s_id) { in mtk_dai_i2s_config()
949 regmap_update_bits(afe->regmap, AFE_I2S_CON, in mtk_dai_i2s_config()
957 regmap_update_bits(afe->regmap, AFE_I2S_CON1, in mtk_dai_i2s_config()
965 regmap_update_bits(afe->regmap, AFE_I2S_CON2, in mtk_dai_i2s_config()
972 regmap_update_bits(afe->regmap, AFE_I2S_CON3, in mtk_dai_i2s_config()
976 dev_err(afe->dev, "%s(), id %d not support\n", in mtk_dai_i2s_config()
978 return -EINVAL; in mtk_dai_i2s_config()
982 if (i2s_priv->share_i2s_id >= 0) { in mtk_dai_i2s_config()
983 ret = mtk_dai_i2s_config(afe, params, i2s_priv->share_i2s_id); in mtk_dai_i2s_config()
997 return mtk_dai_i2s_config(afe, params, dai->id); in mtk_dai_i2s_hw_params()
1001 int clk_id, unsigned int freq, int dir) in mtk_dai_i2s_set_sysclk() argument
1003 struct mtk_base_afe *afe = dev_get_drvdata(dai->dev); in mtk_dai_i2s_set_sysclk()
1004 struct mt8186_afe_private *afe_priv = afe->platform_priv; in mtk_dai_i2s_set_sysclk()
1005 struct mtk_afe_i2s_priv *i2s_priv = afe_priv->dai_priv[dai->id]; in mtk_dai_i2s_set_sysclk()
1010 dev_err(afe->dev, "%s(), dir != SND_SOC_CLOCK_OUT", __func__); in mtk_dai_i2s_set_sysclk()
1011 return -EINVAL; in mtk_dai_i2s_set_sysclk()
1014 dev_dbg(afe->dev, "%s(), freq %d\n", __func__, freq); in mtk_dai_i2s_set_sysclk()
1016 apll = mt8186_get_apll_by_rate(afe, freq); in mtk_dai_i2s_set_sysclk()
1019 if (freq > apll_rate) { in mtk_dai_i2s_set_sysclk()
1020 dev_err(afe->dev, "%s(), freq > apll rate", __func__); in mtk_dai_i2s_set_sysclk()
1021 return -EINVAL; in mtk_dai_i2s_set_sysclk()
1024 if (apll_rate % freq != 0) { in mtk_dai_i2s_set_sysclk()
1025 dev_err(afe->dev, "%s(), APLL cannot generate freq Hz", __func__); in mtk_dai_i2s_set_sysclk()
1026 return -EINVAL; in mtk_dai_i2s_set_sysclk()
1029 i2s_priv->mclk_rate = freq; in mtk_dai_i2s_set_sysclk()
1030 i2s_priv->mclk_apll = apll; in mtk_dai_i2s_set_sysclk()
1032 if (i2s_priv->share_i2s_id > 0) { in mtk_dai_i2s_set_sysclk()
1035 share_i2s_priv = afe_priv->dai_priv[i2s_priv->share_i2s_id]; in mtk_dai_i2s_set_sysclk()
1037 dev_err(afe->dev, "%s(), share_i2s_priv == NULL", __func__); in mtk_dai_i2s_set_sysclk()
1038 return -EINVAL; in mtk_dai_i2s_set_sysclk()
1041 share_i2s_priv->mclk_rate = i2s_priv->mclk_rate; in mtk_dai_i2s_set_sysclk()
1042 share_i2s_priv->mclk_apll = i2s_priv->mclk_apll; in mtk_dai_i2s_set_sysclk()
1142 .share_i2s_id = -1,
1147 .share_i2s_id = -1,
1152 .share_i2s_id = -1,
1158 .share_i2s_id = -1,
1163 * mt8186_dai_i2s_set_share() - Set up I2S ports to share a single clock.
1176 return -EINVAL; in mt8186_dai_i2s_set_share()
1182 secondary_i2s_priv->share_i2s_id = main_i2s_id; in mt8186_dai_i2s_set_share()
1209 dai = devm_kzalloc(afe->dev, sizeof(*dai), GFP_KERNEL); in mt8186_dai_i2s_register()
1211 return -ENOMEM; in mt8186_dai_i2s_register()
1213 list_add(&dai->list, &afe->sub_dais); in mt8186_dai_i2s_register()
1215 dai->dai_drivers = mtk_dai_i2s_driver; in mt8186_dai_i2s_register()
1216 dai->num_dai_drivers = ARRAY_SIZE(mtk_dai_i2s_driver); in mt8186_dai_i2s_register()
1218 dai->controls = mtk_dai_i2s_controls; in mt8186_dai_i2s_register()
1219 dai->num_controls = ARRAY_SIZE(mtk_dai_i2s_controls); in mt8186_dai_i2s_register()
1220 dai->dapm_widgets = mtk_dai_i2s_widgets; in mt8186_dai_i2s_register()
1221 dai->num_dapm_widgets = ARRAY_SIZE(mtk_dai_i2s_widgets); in mt8186_dai_i2s_register()
1222 dai->dapm_routes = mtk_dai_i2s_routes; in mt8186_dai_i2s_register()
1223 dai->num_dapm_routes = ARRAY_SIZE(mtk_dai_i2s_routes); in mt8186_dai_i2s_register()