24 	MTK_AFE_RATE_8K = 0,
43 	MTK_AFE_DAI_MEMIF_RATE_8K = 0,
50 	MTK_AFE_PCM_RATE_8K = 0,
139 	.fifo_size = 0,
149 	int id = snd_soc_rtd_to_cpu(rtd, 0)->id;  in mt8183_memif_fs()
294 				    I_ADDA_UL_CH1, 1, 0),
296 				    I_I2S0_CH1, 1, 0),
301 				    I_ADDA_UL_CH2, 1, 0),
303 				    I_I2S0_CH2, 1, 0),
308 				    I_ADDA_UL_CH1, 1, 0),
310 				    I_DL1_CH1, 1, 0),
312 				    I_DL2_CH1, 1, 0),
314 				    I_DL3_CH1, 1, 0),
316 				    I_I2S2_CH1, 1, 0),
321 				    I_ADDA_UL_CH2, 1, 0),
323 				    I_DL1_CH2, 1, 0),
325 				    I_DL2_CH2, 1, 0),
327 				    I_DL3_CH2, 1, 0),
329 				    I_I2S2_CH2, 1, 0),
334 				    I_ADDA_UL_CH1, 1, 0),
336 				    I_I2S2_CH1, 1, 0),
341 				    I_ADDA_UL_CH2, 1, 0),
343 				    I_I2S2_CH2, 1, 0),
348 				    I_ADDA_UL_CH1, 1, 0),
353 				    I_ADDA_UL_CH2, 1, 0),
358 				    I_ADDA_UL_CH1, 1, 0),
360 				    I_ADDA_UL_CH2, 1, 0),
365 	SND_SOC_DAPM_MIXER("UL1_CH1", SND_SOC_NOPM, 0, 0,
367 	SND_SOC_DAPM_MIXER("UL1_CH2", SND_SOC_NOPM, 0, 0,
370 	SND_SOC_DAPM_MIXER("UL2_CH1", SND_SOC_NOPM, 0, 0,
372 	SND_SOC_DAPM_MIXER("UL2_CH2", SND_SOC_NOPM, 0, 0,
375 	SND_SOC_DAPM_MIXER("UL3_CH1", SND_SOC_NOPM, 0, 0,
377 	SND_SOC_DAPM_MIXER("UL3_CH2", SND_SOC_NOPM, 0, 0,
380 	SND_SOC_DAPM_MIXER("UL4_CH1", SND_SOC_NOPM, 0, 0,
382 	SND_SOC_DAPM_MIXER("UL4_CH2", SND_SOC_NOPM, 0, 0,
385 	SND_SOC_DAPM_MIXER("UL_MONO_1_CH1", SND_SOC_NOPM, 0, 0,
584 		.mono_shift = 0,
623 		.irq_cnt_shift = 0,
624 		.irq_cnt_maskbit = 0x3ffff,
636 		.irq_cnt_shift = 0,
637 		.irq_cnt_maskbit = 0x3ffff,
649 		.irq_cnt_shift = 0,
650 		.irq_cnt_maskbit = 0x3ffff,
662 		.irq_cnt_shift = 0,
663 		.irq_cnt_maskbit = 0x3ffff,
675 		.irq_cnt_shift = 0,
676 		.irq_cnt_maskbit = 0x3ffff,
688 		.irq_cnt_shift = 0,
689 		.irq_cnt_maskbit = 0x3ffff,
701 		.irq_cnt_shift = 0,
702 		.irq_cnt_maskbit = 0x3ffff,
714 		.irq_cnt_shift = 0,
715 		.irq_cnt_maskbit = 0x3ffff,
727 		.irq_cnt_shift = 0,
728 		.irq_cnt_maskbit = 0x3ffff,
740 		.irq_cnt_shift = 0,
741 		.irq_cnt_maskbit = 0x3ffff,
753 		.irq_cnt_shift = 0,
754 		.irq_cnt_maskbit = 0x3ffff,
945 	if (ret || status_mcu == 0) {  in mt8183_afe_irq_handler()
946 		dev_err(afe->dev, "%s(), irq status err, ret %d, status 0x%x, mcu_en 0x%x\n",  in mt8183_afe_irq_handler()
953 	for (i = 0; i < MT8183_MEMIF_NUM; i++) {  in mt8183_afe_irq_handler()
959 		if (memif->irq_usage < 0)  in mt8183_afe_irq_handler()
988 	regmap_update_bits(afe->regmap, AFE_DAC_CON0, AFE_ON_MASK_SFT, 0x0);  in mt8183_afe_runtime_suspend()
993 				       (value & AFE_ON_RETM_MASK_SFT) == 0,  in mt8183_afe_runtime_suspend()
1000 	regmap_update_bits(afe->regmap, AFE_IRQ_MCU_CLR, 0xffff, 0xffff);  in mt8183_afe_runtime_suspend()
1001 	regmap_update_bits(afe->regmap, AFE_IRQ_MCU_CLR, 0xffff, 0xffff);  in mt8183_afe_runtime_suspend()
1028 	regmap_update_bits(afe->regmap, AUDIO_TOP_CON0, 0x1 << 29, 0x1 << 29);  in mt8183_afe_runtime_resume()
1032 			   CPU_HD_ALIGN_MASK_SFT, 0 << CPU_HD_ALIGN_SFT);  in mt8183_afe_runtime_resume()
1035 	regmap_write(afe->regmap, AFE_CONN_24BIT, 0xffffffff);  in mt8183_afe_runtime_resume()
1036 	regmap_write(afe->regmap, AFE_CONN_24BIT_1, 0xffffffff);  in mt8183_afe_runtime_resume()
1039 	regmap_update_bits(afe->regmap, AFE_DAC_CON0, 0x1, 0x1);  in mt8183_afe_runtime_resume()
1042 	return 0;  in mt8183_afe_runtime_resume()
1062 	return 0;  in mt8183_dai_memif_register()
1157 	for (i = 0; i < afe->memif_size; i++) {  in mt8183_afe_pcm_dev_probe()
1177 	for (i = 0; i < afe->irqs_size; i++)  in mt8183_afe_pcm_dev_probe()
1181 	irq_id = platform_get_irq(pdev, 0);  in mt8183_afe_pcm_dev_probe()
1182 	if (irq_id < 0) {  in mt8183_afe_pcm_dev_probe()
1197 	for (i = 0; i < ARRAY_SIZE(dai_register_cbs); i++) {  in mt8183_afe_pcm_dev_probe()
1224 					      NULL, 0);  in mt8183_afe_pcm_dev_probe()