3 // mt8183-afe-clk.c  --  Mediatek 8183 afe clock ctrl
10 #include "mt8183-afe-common.h"
11 #include "mt8183-afe-clk.h"
92 int mt8183_init_clock(struct mtk_base_afe *afe)  in mt8183_init_clock()  argument
94 	struct mt8183_afe_private *afe_priv = afe->platform_priv;  in mt8183_init_clock()
97 	afe_priv->clk = devm_kcalloc(afe->dev, CLK_NUM, sizeof(*afe_priv->clk),  in mt8183_init_clock()
103 		afe_priv->clk[i] = devm_clk_get(afe->dev, aud_clks[i]);  in mt8183_init_clock()
105 			dev_err(afe->dev, "%s(), devm_clk_get %s fail, ret %ld\n",  in mt8183_init_clock()
115 int mt8183_afe_enable_clock(struct mtk_base_afe *afe)  in mt8183_afe_enable_clock()  argument
117 	struct mt8183_afe_private *afe_priv = afe->platform_priv;  in mt8183_afe_enable_clock()
122 		dev_err(afe->dev, "%s(), clk_prepare_enable %s fail %d\n",  in mt8183_afe_enable_clock()
129 		dev_err(afe->dev, "%s(), clk_prepare_enable %s fail %d\n",  in mt8183_afe_enable_clock()
137 		dev_err(afe->dev, "%s(), clk_set_parent %s-%s fail %d\n",  in mt8183_afe_enable_clock()
145 		dev_err(afe->dev, "%s(), clk_prepare_enable %s fail %d\n",  in mt8183_afe_enable_clock()
153 		dev_err(afe->dev, "%s(), clk_set_parent %s-%s fail %d\n",  in mt8183_afe_enable_clock()
161 		dev_err(afe->dev, "%s clk_prepare_enable %s fail %d\n",  in mt8183_afe_enable_clock()
168 		dev_err(afe->dev, "%s clk_prepare_enable %s fail %d\n",  in mt8183_afe_enable_clock()
175 		dev_err(afe->dev, "%s clk_prepare_enable %s fail %d\n",  in mt8183_afe_enable_clock()
182 		dev_err(afe->dev, "%s clk_prepare_enable %s fail %d\n",  in mt8183_afe_enable_clock()
189 		dev_err(afe->dev, "%s clk_prepare_enable %s fail %d\n",  in mt8183_afe_enable_clock()
214 int mt8183_afe_disable_clock(struct mtk_base_afe *afe)  in mt8183_afe_disable_clock()  argument
216 	struct mt8183_afe_private *afe_priv = afe->platform_priv;  in mt8183_afe_disable_clock()
231 static int apll1_mux_setting(struct mtk_base_afe *afe, bool enable)  in apll1_mux_setting()  argument
233 	struct mt8183_afe_private *afe_priv = afe->platform_priv;  in apll1_mux_setting()
239 			dev_err(afe->dev, "%s clk_prepare_enable %s fail %d\n",  in apll1_mux_setting()
246 			dev_err(afe->dev, "%s clk_set_parent %s-%s fail %d\n",  in apll1_mux_setting()
255 			dev_err(afe->dev, "%s clk_prepare_enable %s fail %d\n",  in apll1_mux_setting()
262 			dev_err(afe->dev, "%s clk_set_parent %s-%s fail %d\n",  in apll1_mux_setting()
271 			dev_err(afe->dev, "%s clk_set_parent %s-%s fail %d\n",  in apll1_mux_setting()
281 			dev_err(afe->dev, "%s clk_set_parent %s-%s fail %d\n",  in apll1_mux_setting()
305 static int apll2_mux_setting(struct mtk_base_afe *afe, bool enable)  in apll2_mux_setting()  argument
307 	struct mt8183_afe_private *afe_priv = afe->platform_priv;  in apll2_mux_setting()
313 			dev_err(afe->dev, "%s clk_prepare_enable %s fail %d\n",  in apll2_mux_setting()
320 			dev_err(afe->dev, "%s clk_set_parent %s-%s fail %d\n",  in apll2_mux_setting()
329 			dev_err(afe->dev, "%s clk_prepare_enable %s fail %d\n",  in apll2_mux_setting()
336 			dev_err(afe->dev, "%s clk_set_parent %s-%s fail %d\n",  in apll2_mux_setting()
345 			dev_err(afe->dev, "%s clk_set_parent %s-%s fail %d\n",  in apll2_mux_setting()
355 			dev_err(afe->dev, "%s clk_set_parent %s-%s fail %d\n",  in apll2_mux_setting()
379 int mt8183_apll1_enable(struct mtk_base_afe *afe)  in mt8183_apll1_enable()  argument
381 	struct mt8183_afe_private *afe_priv = afe->platform_priv;  in mt8183_apll1_enable()
385 	apll1_mux_setting(afe, true);  in mt8183_apll1_enable()
389 		dev_err(afe->dev, "%s clk_prepare_enable %s fail %d\n",  in mt8183_apll1_enable()
396 		dev_err(afe->dev, "%s clk_prepare_enable %s fail %d\n",  in mt8183_apll1_enable()
401 	regmap_update_bits(afe->regmap, AFE_APLL1_TUNER_CFG,  in mt8183_apll1_enable()
403 	regmap_update_bits(afe->regmap, AFE_APLL1_TUNER_CFG, 0x1, 0x1);  in mt8183_apll1_enable()
405 	regmap_update_bits(afe->regmap, AFE_HD_ENGEN_ENABLE,  in mt8183_apll1_enable()
417 void mt8183_apll1_disable(struct mtk_base_afe *afe)  in mt8183_apll1_disable()  argument
419 	struct mt8183_afe_private *afe_priv = afe->platform_priv;  in mt8183_apll1_disable()
421 	regmap_update_bits(afe->regmap, AFE_HD_ENGEN_ENABLE,  in mt8183_apll1_disable()
425 	regmap_update_bits(afe->regmap, AFE_APLL1_TUNER_CFG, 0x1, 0x0);  in mt8183_apll1_disable()
430 	apll1_mux_setting(afe, false);  in mt8183_apll1_disable()
433 int mt8183_apll2_enable(struct mtk_base_afe *afe)  in mt8183_apll2_enable()  argument
435 	struct mt8183_afe_private *afe_priv = afe->platform_priv;  in mt8183_apll2_enable()
439 	apll2_mux_setting(afe, true);  in mt8183_apll2_enable()
443 		dev_err(afe->dev, "%s clk_prepare_enable %s fail %d\n",  in mt8183_apll2_enable()
450 		dev_err(afe->dev, "%s clk_prepare_enable %s fail %d\n",  in mt8183_apll2_enable()
455 	regmap_update_bits(afe->regmap, AFE_APLL2_TUNER_CFG,  in mt8183_apll2_enable()
457 	regmap_update_bits(afe->regmap, AFE_APLL2_TUNER_CFG, 0x1, 0x1);  in mt8183_apll2_enable()
459 	regmap_update_bits(afe->regmap, AFE_HD_ENGEN_ENABLE,  in mt8183_apll2_enable()
471 void mt8183_apll2_disable(struct mtk_base_afe *afe)  in mt8183_apll2_disable()  argument
473 	struct mt8183_afe_private *afe_priv = afe->platform_priv;  in mt8183_apll2_disable()
475 	regmap_update_bits(afe->regmap, AFE_HD_ENGEN_ENABLE,  in mt8183_apll2_disable()
479 	regmap_update_bits(afe->regmap, AFE_APLL2_TUNER_CFG, 0x1, 0x0);  in mt8183_apll2_disable()
484 	apll2_mux_setting(afe, false);  in mt8183_apll2_disable()
487 int mt8183_get_apll_rate(struct mtk_base_afe *afe, int apll)  in mt8183_get_apll_rate()  argument
492 int mt8183_get_apll_by_rate(struct mtk_base_afe *afe, int rate)  in mt8183_get_apll_by_rate()  argument
497 int mt8183_get_apll_by_name(struct mtk_base_afe *afe, const char *name)  in mt8183_get_apll_by_name()  argument
542 int mt8183_mck_enable(struct mtk_base_afe *afe, int mck_id, int rate)  in mt8183_mck_enable()  argument
544 	struct mt8183_afe_private *afe_priv = afe->platform_priv;  in mt8183_mck_enable()
545 	int apll = mt8183_get_apll_by_rate(afe, rate);  in mt8183_mck_enable()
560 			dev_err(afe->dev, "%s(), clk_prepare_enable %s fail %d\n",  in mt8183_mck_enable()
567 			dev_err(afe->dev, "%s(), clk_set_parent %s-%s fail %d\n",  in mt8183_mck_enable()
577 		dev_err(afe->dev, "%s(), clk_prepare_enable %s fail %d\n",  in mt8183_mck_enable()
583 		dev_err(afe->dev, "%s(), clk_set_rate %s, rate %d, fail %d\n",  in mt8183_mck_enable()
601 void mt8183_mck_disable(struct mtk_base_afe *afe, int mck_id)  in mt8183_mck_disable()  argument
603 	struct mt8183_afe_private *afe_priv = afe->platform_priv;  in mt8183_mck_disable()