Lines Matching refs:REG_SPDIF_SCR
417 regmap_write(regmap, REG_SPDIF_SCR, SCR_SOFT_RESET); in spdif_softreset()
424 regmap_read(regmap, REG_SPDIF_SCR, &val); in spdif_softreset()
469 regmap_update_bits(regmap, REG_SPDIF_SCR, 0x1000000, 0x1000000); in spdif_write_channel_status()
637 regmap_update_bits(regmap, REG_SPDIF_SCR, mask, scr); in fsl_spdif_startup()
640 regmap_update_bits(regmap, REG_SPDIF_SCR, SCR_LOW_POWER, 0); in fsl_spdif_startup()
665 regmap_update_bits(regmap, REG_SPDIF_SCR, mask, scr); in fsl_spdif_shutdown()
670 regmap_update_bits(regmap, REG_SPDIF_SCR, in fsl_spdif_shutdown()
749 regmap_update_bits(regmap, REG_SPDIF_SCR, dmaen, dmaen); in fsl_spdif_trigger()
754 regmap_update_bits(regmap, REG_SPDIF_SCR, dmaen, 0); in fsl_spdif_trigger()
927 regmap_read(regmap, REG_SPDIF_SCR, &val); in fsl_spdif_tx_vbit_get()
943 regmap_update_bits(regmap, REG_SPDIF_SCR, SCR_VAL_MASK, val); in fsl_spdif_tx_vbit_put()
956 regmap_read(regmap, REG_SPDIF_SCR, &val); in fsl_spdif_rx_rcm_get()
976 regmap_update_bits(regmap, REG_SPDIF_SCR, SCR_RAW_CAPTURE_MODE, val); in fsl_spdif_rx_rcm_put()
1032 regmap_update_bits(regmap, REG_SPDIF_SCR, mask, scr); in fsl_spdif_bypass_put()
1270 regmap_update_bits(spdif_private->regmap, REG_SPDIF_SCR, in fsl_spdif_dai_probe()
1309 {REG_SPDIF_SCR, 0x00000400},
1324 case REG_SPDIF_SCR: in fsl_spdif_readable_reg()
1386 case REG_SPDIF_SCR: in fsl_spdif_writeable_reg()