Lines Matching +full:decimation +full:- +full:ratio
1 // SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause
19 #include <linux/dma/imx-dma.h>
114 { .compatible = "fsl,imx8mm-micfil", .data = &fsl_micfil_imx8mm },
115 { .compatible = "fsl,imx8mp-micfil", .data = &fsl_micfil_imx8mp },
116 { .compatible = "fsl,imx93-micfil", .data = &fsl_micfil_imx93 },
140 switch (micfil->quality) { in micfil_set_quality()
161 return regmap_update_bits(micfil->regmap, REG_MICFIL_CTRL2, in micfil_set_quality()
172 ucontrol->value.integer.value[0] = micfil->quality; in micfil_quality_get()
183 micfil->quality = ucontrol->value.integer.value[0]; in micfil_quality_set()
199 "Cut-off @1750Hz",
200 "Cut-off @215Hz",
201 "Cut-off @102Hz",
207 * Cut-off @21Hz 0 0
208 * Cut-off @83Hz 0 1
209 * Cut-off @152HZ 1 0
212 "Cut-off @21Hz", "Cut-off @83Hz",
213 "Cut-off @152Hz", "Bypass",
233 struct soc_enum *e = (struct soc_enum *)kcontrol->private_value; in micfil_put_dc_remover_state()
236 unsigned int *item = ucontrol->value.enumerated.item; in micfil_put_dc_remover_state()
242 return -EINVAL; in micfil_put_dc_remover_state()
244 micfil->dc_remover = val; in micfil_put_dc_remover_state()
265 ucontrol->value.enumerated.item[0] = micfil->dc_remover; in micfil_get_dc_remover_state()
274 struct soc_enum *e = (struct soc_enum *)kcontrol->private_value; in hwvad_put_enable()
275 unsigned int *item = ucontrol->value.enumerated.item; in hwvad_put_enable()
279 micfil->vad_enabled = val; in hwvad_put_enable()
290 ucontrol->value.enumerated.item[0] = micfil->vad_enabled; in hwvad_get_enable()
299 struct soc_enum *e = (struct soc_enum *)kcontrol->private_value; in hwvad_put_init_mode()
300 unsigned int *item = ucontrol->value.enumerated.item; in hwvad_put_init_mode()
304 /* 0 - Envelope-based Mode in hwvad_put_init_mode()
305 * 1 - Energy-based Mode in hwvad_put_init_mode()
307 micfil->vad_init_mode = val; in hwvad_put_init_mode()
318 ucontrol->value.enumerated.item[0] = micfil->vad_init_mode; in hwvad_get_init_mode()
329 ucontrol->value.enumerated.item[0] = micfil->vad_detected; in hwvad_detected()
380 SOC_ENUM("HWVAD High-Pass Filter", hwvad_hpf_enum),
405 if (!micfil->soc->use_verid) in fsl_micfil_use_verid()
408 ret = regmap_read(micfil->regmap, REG_MICFIL_VERID, &val); in fsl_micfil_use_verid()
414 micfil->verid.version = val & in fsl_micfil_use_verid()
416 micfil->verid.version >>= MICFIL_VERID_MINOR_SHIFT; in fsl_micfil_use_verid()
417 micfil->verid.feature = val & MICFIL_VERID_FEATURE_MASK; in fsl_micfil_use_verid()
419 ret = regmap_read(micfil->regmap, REG_MICFIL_PARAM, &val); in fsl_micfil_use_verid()
425 micfil->param.hwvad_num = (val & MICFIL_PARAM_NUM_HWVAD_MASK) >> in fsl_micfil_use_verid()
427 micfil->param.hwvad_zcd = val & MICFIL_PARAM_HWVAD_ZCD; in fsl_micfil_use_verid()
428 micfil->param.hwvad_energy_mode = val & MICFIL_PARAM_HWVAD_ENERGY_MODE; in fsl_micfil_use_verid()
429 micfil->param.hwvad = val & MICFIL_PARAM_HWVAD; in fsl_micfil_use_verid()
430 micfil->param.dc_out_bypass = val & MICFIL_PARAM_DC_OUT_BYPASS; in fsl_micfil_use_verid()
431 micfil->param.dc_in_bypass = val & MICFIL_PARAM_DC_IN_BYPASS; in fsl_micfil_use_verid()
432 micfil->param.low_power = val & MICFIL_PARAM_LOW_POWER; in fsl_micfil_use_verid()
433 micfil->param.fil_out_width = val & MICFIL_PARAM_FIL_OUT_WIDTH; in fsl_micfil_use_verid()
434 micfil->param.fifo_ptrwid = (val & MICFIL_PARAM_FIFO_PTRWID_MASK) >> in fsl_micfil_use_verid()
436 micfil->param.npair = (val & MICFIL_PARAM_NPAIR_MASK) >> in fsl_micfil_use_verid()
442 /* The SRES is a self-negated bit which provides the CPU with the
444 * slave-bus interface. This bit always reads as zero, and this
452 ret = regmap_clear_bits(micfil->regmap, REG_MICFIL_CTRL1, in fsl_micfil_reset()
457 ret = regmap_set_bits(micfil->regmap, REG_MICFIL_CTRL1, in fsl_micfil_reset()
463 * SRES is self-cleared bit, but REG_MICFIL_CTRL1 is defined in fsl_micfil_reset()
464 * as non-volatile register, so SRES still remain in regmap in fsl_micfil_reset()
468 ret = regmap_clear_bits(micfil->regmap, REG_MICFIL_CTRL1, in fsl_micfil_reset()
477 ret = regmap_write_bits(micfil->regmap, REG_MICFIL_STAT, 0xFF, 0xFF); in fsl_micfil_reset()
493 dev_err(dai->dev, "micfil dai priv_data not set\n"); in fsl_micfil_startup()
494 return -EINVAL; in fsl_micfil_startup()
497 micfil->constraint_rates.list = micfil->constraint_rates_list; in fsl_micfil_startup()
498 micfil->constraint_rates.count = 0; in fsl_micfil_startup()
502 clk_rate = clk_get_rate(micfil->clk_src[i]); in fsl_micfil_startup()
504 micfil->constraint_rates_list[k++] = rates[j]; in fsl_micfil_startup()
505 micfil->constraint_rates.count++; in fsl_micfil_startup()
511 if (micfil->constraint_rates.count > 0) in fsl_micfil_startup()
512 snd_pcm_hw_constraint_list(substream->runtime, 0, in fsl_micfil_startup()
514 &micfil->constraint_rates); in fsl_micfil_startup()
526 regmap_update_bits(micfil->regmap, REG_MICFIL_VAD0_CTRL1, in fsl_micfil_configure_hwvad_interrupts()
530 regmap_update_bits(micfil->regmap, REG_MICFIL_VAD0_CTRL1, in fsl_micfil_configure_hwvad_interrupts()
536 /* Configuration done only in energy-based initialization mode */
540 regmap_clear_bits(micfil->regmap, REG_MICFIL_VAD0_CTRL2, in fsl_micfil_init_hwvad_energy_mode()
544 regmap_clear_bits(micfil->regmap, REG_MICFIL_VAD0_CTRL2, in fsl_micfil_init_hwvad_energy_mode()
548 regmap_clear_bits(micfil->regmap, REG_MICFIL_VAD0_SCONFIG, in fsl_micfil_init_hwvad_energy_mode()
552 regmap_clear_bits(micfil->regmap, REG_MICFIL_VAD0_SCONFIG, in fsl_micfil_init_hwvad_energy_mode()
556 regmap_set_bits(micfil->regmap, REG_MICFIL_VAD0_NCONFIG, in fsl_micfil_init_hwvad_energy_mode()
560 regmap_clear_bits(micfil->regmap, REG_MICFIL_VAD0_NCONFIG, in fsl_micfil_init_hwvad_energy_mode()
564 regmap_clear_bits(micfil->regmap, REG_MICFIL_VAD0_NCONFIG, in fsl_micfil_init_hwvad_energy_mode()
568 regmap_clear_bits(micfil->regmap, REG_MICFIL_VAD0_NCONFIG, in fsl_micfil_init_hwvad_energy_mode()
574 /* Configuration done only in envelope-based initialization mode */
578 regmap_set_bits(micfil->regmap, REG_MICFIL_VAD0_CTRL2, in fsl_micfil_init_hwvad_envelope_mode()
582 regmap_set_bits(micfil->regmap, REG_MICFIL_VAD0_CTRL2, in fsl_micfil_init_hwvad_envelope_mode()
586 regmap_set_bits(micfil->regmap, REG_MICFIL_VAD0_SCONFIG, in fsl_micfil_init_hwvad_envelope_mode()
590 regmap_set_bits(micfil->regmap, REG_MICFIL_VAD0_SCONFIG, in fsl_micfil_init_hwvad_envelope_mode()
594 regmap_clear_bits(micfil->regmap, REG_MICFIL_VAD0_NCONFIG, in fsl_micfil_init_hwvad_envelope_mode()
598 regmap_set_bits(micfil->regmap, REG_MICFIL_VAD0_NCONFIG, in fsl_micfil_init_hwvad_envelope_mode()
602 regmap_set_bits(micfil->regmap, REG_MICFIL_VAD0_NCONFIG, in fsl_micfil_init_hwvad_envelope_mode()
606 regmap_set_bits(micfil->regmap, REG_MICFIL_VAD0_NCONFIG, in fsl_micfil_init_hwvad_envelope_mode()
618 * -> Eneveope-based mode (section 8.4.1)
619 * -> Energy-based mode (section 8.4.2)
629 micfil->vad_detected = 0; in fsl_micfil_hwvad_enable()
631 /* envelope-based specific initialization */ in fsl_micfil_hwvad_enable()
632 if (micfil->vad_init_mode == MICFIL_HWVAD_ENVELOPE_MODE) in fsl_micfil_hwvad_enable()
640 regmap_set_bits(micfil->regmap, REG_MICFIL_VAD0_CTRL1, in fsl_micfil_hwvad_enable()
644 regmap_clear_bits(micfil->regmap, REG_MICFIL_VAD0_CTRL1, in fsl_micfil_hwvad_enable()
653 regmap_set_bits(micfil->regmap, REG_MICFIL_VAD0_CTRL1, in fsl_micfil_hwvad_enable()
657 regmap_set_bits(micfil->regmap, REG_MICFIL_VAD0_CTRL1, in fsl_micfil_hwvad_enable()
665 struct device *dev = &micfil->pdev->dev; in fsl_micfil_hwvad_disable()
669 regmap_clear_bits(micfil->regmap, REG_MICFIL_VAD0_CTRL1, in fsl_micfil_hwvad_disable()
684 struct device *dev = &micfil->pdev->dev; in fsl_micfil_trigger()
697 /* DMA Interrupt Selection - DISEL bits in fsl_micfil_trigger()
698 * 00 - DMA and IRQ disabled in fsl_micfil_trigger()
699 * 01 - DMA req enabled in fsl_micfil_trigger()
700 * 10 - IRQ enabled in fsl_micfil_trigger()
701 * 11 - reserved in fsl_micfil_trigger()
703 ret = regmap_update_bits(micfil->regmap, REG_MICFIL_CTRL1, in fsl_micfil_trigger()
710 ret = regmap_set_bits(micfil->regmap, REG_MICFIL_CTRL1, in fsl_micfil_trigger()
715 if (micfil->vad_enabled) in fsl_micfil_trigger()
722 if (micfil->vad_enabled) in fsl_micfil_trigger()
726 ret = regmap_clear_bits(micfil->regmap, REG_MICFIL_CTRL1, in fsl_micfil_trigger()
731 ret = regmap_update_bits(micfil->regmap, REG_MICFIL_CTRL1, in fsl_micfil_trigger()
738 return -EINVAL; in fsl_micfil_trigger()
745 struct device *dev = &micfil->pdev->dev; in fsl_micfil_reparent_rootclk()
746 u64 ratio = sample_rate; in fsl_micfil_reparent_rootclk() local
751 clk = micfil->mclk; in fsl_micfil_reparent_rootclk()
755 fsl_asoc_reparent_pll_clocks(dev, clk, micfil->pll8k_clk, in fsl_micfil_reparent_rootclk()
756 micfil->pll11k_clk, ratio); in fsl_micfil_reparent_rootclk()
776 ret = regmap_clear_bits(micfil->regmap, REG_MICFIL_CTRL1, in fsl_micfil_hw_params()
782 ret = regmap_update_bits(micfil->regmap, REG_MICFIL_CTRL1, in fsl_micfil_hw_params()
783 0xFF, ((1 << channels) - 1)); in fsl_micfil_hw_params()
791 ret = clk_set_rate(micfil->mclk, rate * clk_div * osr * 8); in fsl_micfil_hw_params()
799 ret = regmap_update_bits(micfil->regmap, REG_MICFIL_CTRL2, in fsl_micfil_hw_params()
802 FIELD_PREP(MICFIL_CTRL2_CICOSR, 16 - osr)); in fsl_micfil_hw_params()
805 regmap_update_bits(micfil->regmap, REG_MICFIL_VAD0_CTRL1, in fsl_micfil_hw_params()
807 FIELD_PREP(MICFIL_VAD0_CTRL1_CICOSR, 16 - osr)); in fsl_micfil_hw_params()
810 regmap_update_bits(micfil->regmap, REG_MICFIL_VAD0_CTRL1, in fsl_micfil_hw_params()
812 FIELD_PREP(MICFIL_VAD0_CTRL1_CHSEL, (channels - 1))); in fsl_micfil_hw_params()
814 micfil->dma_params_rx.peripheral_config = &micfil->sdmacfg; in fsl_micfil_hw_params()
815 micfil->dma_params_rx.peripheral_size = sizeof(micfil->sdmacfg); in fsl_micfil_hw_params()
816 micfil->sdmacfg.n_fifos_src = channels; in fsl_micfil_hw_params()
817 micfil->sdmacfg.sw_done = true; in fsl_micfil_hw_params()
818 micfil->dma_params_rx.maxburst = channels * MICFIL_DMA_MAXBURST_RX; in fsl_micfil_hw_params()
819 if (micfil->soc->use_edma) in fsl_micfil_hw_params()
820 micfil->dma_params_rx.maxburst = channels; in fsl_micfil_hw_params()
827 struct fsl_micfil *micfil = dev_get_drvdata(cpu_dai->dev); in fsl_micfil_dai_probe()
828 struct device *dev = cpu_dai->dev; in fsl_micfil_dai_probe()
832 micfil->quality = QUALITY_VLOW0; in fsl_micfil_dai_probe()
833 micfil->card = cpu_dai->component->card; in fsl_micfil_dai_probe()
836 regmap_write(micfil->regmap, REG_MICFIL_OUT_CTRL, 0x22222222); in fsl_micfil_dai_probe()
841 ret = regmap_update_bits(micfil->regmap, REG_MICFIL_DC_CTRL, in fsl_micfil_dai_probe()
847 micfil->dc_remover = MICFIL_DC_BYPASS; in fsl_micfil_dai_probe()
850 &micfil->dma_params_rx); in fsl_micfil_dai_probe()
852 /* FIFO Watermark Control - FIFOWMK*/ in fsl_micfil_dai_probe()
853 ret = regmap_update_bits(micfil->regmap, REG_MICFIL_FIFO_CTRL, in fsl_micfil_dai_probe()
855 FIELD_PREP(MICFIL_FIFO_CTRL_FIFOWMK, micfil->soc->fifo_depth - 1)); in fsl_micfil_dai_probe()
866 if (micfil->soc->volume_sx) in fsl_micfil_component_probe()
885 .stream_name = "CPU-Capture",
895 .name = "fsl-micfil-dai",
961 if (micfil->soc->use_verid) in fsl_micfil_readable_reg()
990 if (micfil->soc->use_verid) in fsl_micfil_writeable_reg()
1039 struct platform_device *pdev = micfil->pdev; in micfil_isr()
1046 regmap_read(micfil->regmap, REG_MICFIL_STAT, &stat_reg); in micfil_isr()
1047 regmap_read(micfil->regmap, REG_MICFIL_CTRL1, &ctrl1_reg); in micfil_isr()
1048 regmap_read(micfil->regmap, REG_MICFIL_FIFO_STAT, &fifo_stat_reg); in micfil_isr()
1052 /* Channel 0-7 Output Data Flags */ in micfil_isr()
1055 dev_dbg(&pdev->dev, in micfil_isr()
1061 regmap_write_bits(micfil->regmap, in micfil_isr()
1069 dev_dbg(&pdev->dev, in micfil_isr()
1074 dev_dbg(&pdev->dev, in micfil_isr()
1085 struct platform_device *pdev = micfil->pdev; in micfil_err_isr()
1088 regmap_read(micfil->regmap, REG_MICFIL_STAT, &stat_reg); in micfil_err_isr()
1091 dev_dbg(&pdev->dev, "isr: Decimation Filter is running\n"); in micfil_err_isr()
1094 dev_dbg(&pdev->dev, "isr: FIR Filter Data ready\n"); in micfil_err_isr()
1097 dev_dbg(&pdev->dev, "isr: ipg_clk_app is too low\n"); in micfil_err_isr()
1098 regmap_write_bits(micfil->regmap, REG_MICFIL_STAT, in micfil_err_isr()
1110 if (!micfil->card) in voice_detected_fn()
1113 kctl = snd_soc_card_get_kcontrol(micfil->card, "VAD Detected"); in voice_detected_fn()
1117 if (micfil->vad_detected) in voice_detected_fn()
1118 snd_ctl_notify(micfil->card->snd_card, in voice_detected_fn()
1120 &kctl->id); in voice_detected_fn()
1128 struct device *dev = &micfil->pdev->dev; in hwvad_isr()
1132 regmap_read(micfil->regmap, REG_MICFIL_VAD0_STAT, &vad0_reg); in hwvad_isr()
1142 regmap_write_bits(micfil->regmap, REG_MICFIL_VAD0_STAT, in hwvad_isr()
1146 micfil->vad_detected = 1; in hwvad_isr()
1159 struct device *dev = &micfil->pdev->dev; in hwvad_err_isr()
1162 regmap_read(micfil->regmap, REG_MICFIL_VAD0_STAT, &vad0_reg); in hwvad_err_isr()
1175 struct device_node *np = pdev->dev.of_node; in fsl_micfil_probe()
1181 micfil = devm_kzalloc(&pdev->dev, sizeof(*micfil), GFP_KERNEL); in fsl_micfil_probe()
1183 return -ENOMEM; in fsl_micfil_probe()
1185 micfil->pdev = pdev; in fsl_micfil_probe()
1186 strscpy(micfil->name, np->name, sizeof(micfil->name)); in fsl_micfil_probe()
1188 micfil->soc = of_device_get_match_data(&pdev->dev); in fsl_micfil_probe()
1193 micfil->mclk = devm_clk_get(&pdev->dev, "ipg_clk_app"); in fsl_micfil_probe()
1194 if (IS_ERR(micfil->mclk)) { in fsl_micfil_probe()
1195 dev_err(&pdev->dev, "failed to get core clock: %ld\n", in fsl_micfil_probe()
1196 PTR_ERR(micfil->mclk)); in fsl_micfil_probe()
1197 return PTR_ERR(micfil->mclk); in fsl_micfil_probe()
1200 micfil->busclk = devm_clk_get(&pdev->dev, "ipg_clk"); in fsl_micfil_probe()
1201 if (IS_ERR(micfil->busclk)) { in fsl_micfil_probe()
1202 dev_err(&pdev->dev, "failed to get ipg clock: %ld\n", in fsl_micfil_probe()
1203 PTR_ERR(micfil->busclk)); in fsl_micfil_probe()
1204 return PTR_ERR(micfil->busclk); in fsl_micfil_probe()
1207 fsl_asoc_get_pll_clocks(&pdev->dev, &micfil->pll8k_clk, in fsl_micfil_probe()
1208 &micfil->pll11k_clk); in fsl_micfil_probe()
1210 micfil->clk_src[MICFIL_AUDIO_PLL1] = micfil->pll8k_clk; in fsl_micfil_probe()
1211 micfil->clk_src[MICFIL_AUDIO_PLL2] = micfil->pll11k_clk; in fsl_micfil_probe()
1212 micfil->clk_src[MICFIL_CLK_EXT3] = devm_clk_get(&pdev->dev, "clkext3"); in fsl_micfil_probe()
1213 if (IS_ERR(micfil->clk_src[MICFIL_CLK_EXT3])) in fsl_micfil_probe()
1214 micfil->clk_src[MICFIL_CLK_EXT3] = NULL; in fsl_micfil_probe()
1221 micfil->regmap = devm_regmap_init_mmio(&pdev->dev, in fsl_micfil_probe()
1224 if (IS_ERR(micfil->regmap)) { in fsl_micfil_probe()
1225 dev_err(&pdev->dev, "failed to init MICFIL regmap: %ld\n", in fsl_micfil_probe()
1226 PTR_ERR(micfil->regmap)); in fsl_micfil_probe()
1227 return PTR_ERR(micfil->regmap); in fsl_micfil_probe()
1234 &micfil->dataline); in fsl_micfil_probe()
1236 micfil->dataline = 1; in fsl_micfil_probe()
1238 if (micfil->dataline & ~micfil->soc->dataline) { in fsl_micfil_probe()
1239 dev_err(&pdev->dev, "dataline setting error, Mask is 0x%X\n", in fsl_micfil_probe()
1240 micfil->soc->dataline); in fsl_micfil_probe()
1241 return -EINVAL; in fsl_micfil_probe()
1246 micfil->irq[i] = platform_get_irq(pdev, i); in fsl_micfil_probe()
1247 if (micfil->irq[i] < 0) in fsl_micfil_probe()
1248 return micfil->irq[i]; in fsl_micfil_probe()
1252 ret = devm_request_irq(&pdev->dev, micfil->irq[0], in fsl_micfil_probe()
1254 micfil->name, micfil); in fsl_micfil_probe()
1256 dev_err(&pdev->dev, "failed to claim mic interface irq %u\n", in fsl_micfil_probe()
1257 micfil->irq[0]); in fsl_micfil_probe()
1262 ret = devm_request_irq(&pdev->dev, micfil->irq[1], in fsl_micfil_probe()
1264 micfil->name, micfil); in fsl_micfil_probe()
1266 dev_err(&pdev->dev, "failed to claim mic interface error irq %u\n", in fsl_micfil_probe()
1267 micfil->irq[1]); in fsl_micfil_probe()
1272 ret = devm_request_threaded_irq(&pdev->dev, micfil->irq[2], in fsl_micfil_probe()
1274 IRQF_SHARED, micfil->name, micfil); in fsl_micfil_probe()
1276 dev_err(&pdev->dev, "failed to claim hwvad event irq %u\n", in fsl_micfil_probe()
1277 micfil->irq[0]); in fsl_micfil_probe()
1282 ret = devm_request_irq(&pdev->dev, micfil->irq[3], in fsl_micfil_probe()
1284 micfil->name, micfil); in fsl_micfil_probe()
1286 dev_err(&pdev->dev, "failed to claim hwvad error irq %u\n", in fsl_micfil_probe()
1287 micfil->irq[1]); in fsl_micfil_probe()
1291 micfil->dma_params_rx.chan_name = "rx"; in fsl_micfil_probe()
1292 micfil->dma_params_rx.addr = res->start + REG_MICFIL_DATACH0; in fsl_micfil_probe()
1293 micfil->dma_params_rx.maxburst = MICFIL_DMA_MAXBURST_RX; in fsl_micfil_probe()
1297 pm_runtime_enable(&pdev->dev); in fsl_micfil_probe()
1298 if (!pm_runtime_enabled(&pdev->dev)) { in fsl_micfil_probe()
1299 ret = fsl_micfil_runtime_resume(&pdev->dev); in fsl_micfil_probe()
1304 ret = pm_runtime_resume_and_get(&pdev->dev); in fsl_micfil_probe()
1309 ret = fsl_micfil_use_verid(&pdev->dev); in fsl_micfil_probe()
1311 dev_warn(&pdev->dev, "Error reading MICFIL version: %d\n", ret); in fsl_micfil_probe()
1313 ret = pm_runtime_put_sync(&pdev->dev); in fsl_micfil_probe()
1314 if (ret < 0 && ret != -ENOSYS) in fsl_micfil_probe()
1317 regcache_cache_only(micfil->regmap, true); in fsl_micfil_probe()
1323 ret = devm_snd_dmaengine_pcm_register(&pdev->dev, NULL, 0); in fsl_micfil_probe()
1325 dev_err(&pdev->dev, "failed to pcm register\n"); in fsl_micfil_probe()
1329 fsl_micfil_dai.capture.formats = micfil->soc->formats; in fsl_micfil_probe()
1331 ret = devm_snd_soc_register_component(&pdev->dev, &fsl_micfil_component, in fsl_micfil_probe()
1334 dev_err(&pdev->dev, "failed to register component %s\n", in fsl_micfil_probe()
1342 if (!pm_runtime_status_suspended(&pdev->dev)) in fsl_micfil_probe()
1343 fsl_micfil_runtime_suspend(&pdev->dev); in fsl_micfil_probe()
1345 pm_runtime_disable(&pdev->dev); in fsl_micfil_probe()
1352 pm_runtime_disable(&pdev->dev); in fsl_micfil_remove()
1359 regcache_cache_only(micfil->regmap, true); in fsl_micfil_runtime_suspend()
1361 clk_disable_unprepare(micfil->mclk); in fsl_micfil_runtime_suspend()
1362 clk_disable_unprepare(micfil->busclk); in fsl_micfil_runtime_suspend()
1372 ret = clk_prepare_enable(micfil->busclk); in fsl_micfil_runtime_resume()
1376 ret = clk_prepare_enable(micfil->mclk); in fsl_micfil_runtime_resume()
1378 clk_disable_unprepare(micfil->busclk); in fsl_micfil_runtime_resume()
1382 regcache_cache_only(micfil->regmap, false); in fsl_micfil_runtime_resume()
1383 regcache_mark_dirty(micfil->regmap); in fsl_micfil_runtime_resume()
1384 regcache_sync(micfil->regmap); in fsl_micfil_runtime_resume()
1401 .name = "fsl-micfil-dai",
1408 MODULE_AUTHOR("Cosmin-Gabriel Samoila <cosmin.samoila@nxp.com>");