soc/codecs/wm9081.c

56 	{ 32, 0x09AF },     /* R32 - DRC 1 */
57 	{ 33, 0x4201 },     /* R33 - DRC 2 */
58 	{ 34, 0x0000 },     /* R34 - DRC 3 */
59 	{ 35, 0x0000 },     /* R35 - DRC 4 */
397 SOC_SINGLE("DRC Switch", WM9081_DRC_1, 15, 1, 0),
398 SOC_ENUM("DRC High Slope", drc_high),
399 SOC_ENUM("DRC Low Slope", drc_low),
400 SOC_SINGLE_TLV("DRC Input Volume", WM9081_DRC_4, 5, 60, 1, drc_in_tlv),
401 SOC_SINGLE_TLV("DRC Output Volume", WM9081_DRC_4, 0, 30, 1, drc_out_tlv),
402 SOC_SINGLE_TLV("DRC Minimum Volume", WM9081_DRC_2, 2, 3, 1, drc_min_tlv),
403 SOC_SINGLE_TLV("DRC Maximum Volume", WM9081_DRC_2, 0, 3, 0, drc_max_tlv),
404 SOC_ENUM("DRC Attack", drc_atk),
405 SOC_ENUM("DRC Decay", drc_dcy),
406 SOC_SINGLE("DRC Quick Release Switch", WM9081_DRC_1, 2, 1, 0),
407 SOC_SINGLE_TLV("DRC Quick Release Volume", WM9081_DRC_2, 6, 3, 0, drc_qr_tlv),
408 SOC_ENUM("DRC Quick Release Decay", drc_qr_dcy),
409 SOC_SINGLE_TLV("DRC Startup Volume", WM9081_DRC_1, 6, 18, 0, drc_startup_tlv),