soc/codecs/wm8993.c

144 	{ 123, 0x0F08 },     /* R123 - DRC Control 1 */
145 	{ 124, 0x0000 },     /* R124 - DRC Control 2 */
146 	{ 125, 0x0080 },     /* R125 - DRC Control 3 */
147 	{ 126, 0x0000 },     /* R126 - DRC Control 4 */
752 SOC_SINGLE("DRC Switch", WM8993_DRC_CONTROL_1, 15, 1, 0),
753 SOC_ENUM("DRC Path", drc_path),
754 SOC_SINGLE_TLV("DRC Compressor Threshold Volume", WM8993_DRC_CONTROL_2,
756 SOC_SINGLE_TLV("DRC Compressor Amplitude Volume", WM8993_DRC_CONTROL_3,
758 SOC_ENUM("DRC R0", drc_r0),
759 SOC_ENUM("DRC R1", drc_r1),
760 SOC_SINGLE_TLV("DRC Minimum Volume", WM8993_DRC_CONTROL_1, 2, 3, 1,
762 SOC_SINGLE_TLV("DRC Maximum Volume", WM8993_DRC_CONTROL_1, 0, 3, 0,
764 SOC_ENUM("DRC Attack Rate", drc_attack),
765 SOC_ENUM("DRC Decay Rate", drc_decay),
766 SOC_ENUM("DRC FF Delay", drc_ff),
767 SOC_SINGLE("DRC Anti-clip Switch", WM8993_DRC_CONTROL_1, 9, 1, 0),
768 SOC_SINGLE("DRC Quick Release Switch", WM8993_DRC_CONTROL_1, 10, 1, 0),
769 SOC_SINGLE_TLV("DRC Quick Release Volume", WM8993_DRC_CONTROL_3, 2, 3, 0,
771 SOC_ENUM("DRC Quick Release Rate", drc_qr_rate),
772 SOC_SINGLE("DRC Smoothing Switch", WM8993_DRC_CONTROL_1, 11, 1, 0),
773 SOC_SINGLE("DRC Smoothing Hysteresis Switch", WM8993_DRC_CONTROL_1, 8, 1, 0),
774 SOC_ENUM("DRC Smoothing Hysteresis Threshold", drc_smooth),
775 SOC_SINGLE_TLV("DRC Startup Volume", WM8993_DRC_CONTROL_4, 8, 18, 0,