Lines Matching +full:asoc +full:- +full:wm8904
1 /* SPDX-License-Identifier: GPL-2.0-only */
3 * wm8955.h -- WM8904 ASoC driver
56 * R2 (0x02) - LOUT1 volume
66 #define WM8955_LOUTVOL_MASK 0x007F /* LOUTVOL - [6:0] */
67 #define WM8955_LOUTVOL_SHIFT 0 /* LOUTVOL - [6:0] */
68 #define WM8955_LOUTVOL_WIDTH 7 /* LOUTVOL - [6:0] */
71 * R3 (0x03) - ROUT1 volume
81 #define WM8955_ROUTVOL_MASK 0x007F /* ROUTVOL - [6:0] */
82 #define WM8955_ROUTVOL_SHIFT 0 /* ROUTVOL - [6:0] */
83 #define WM8955_ROUTVOL_WIDTH 7 /* ROUTVOL - [6:0] */
86 * R5 (0x05) - DAC Control
96 #define WM8955_DEEMPH_MASK 0x0006 /* DEEMPH - [2:1] */
97 #define WM8955_DEEMPH_SHIFT 1 /* DEEMPH - [2:1] */
98 #define WM8955_DEEMPH_WIDTH 2 /* DEEMPH - [2:1] */
101 * R7 (0x07) - Audio Interface
119 #define WM8955_WL_MASK 0x000C /* WL - [3:2] */
120 #define WM8955_WL_SHIFT 2 /* WL - [3:2] */
121 #define WM8955_WL_WIDTH 2 /* WL - [3:2] */
122 #define WM8955_FORMAT_MASK 0x0003 /* FORMAT - [1:0] */
123 #define WM8955_FORMAT_SHIFT 0 /* FORMAT - [1:0] */
124 #define WM8955_FORMAT_WIDTH 2 /* FORMAT - [1:0] */
127 * R8 (0x08) - Sample Rate
137 #define WM8955_SR_MASK 0x003E /* SR - [5:1] */
138 #define WM8955_SR_SHIFT 1 /* SR - [5:1] */
139 #define WM8955_SR_WIDTH 5 /* SR - [5:1] */
146 * R10 (0x0A) - Left DAC volume
152 #define WM8955_LDACVOL_MASK 0x00FF /* LDACVOL - [7:0] */
153 #define WM8955_LDACVOL_SHIFT 0 /* LDACVOL - [7:0] */
154 #define WM8955_LDACVOL_WIDTH 8 /* LDACVOL - [7:0] */
157 * R11 (0x0B) - Right DAC volume
163 #define WM8955_RDACVOL_MASK 0x00FF /* RDACVOL - [7:0] */
164 #define WM8955_RDACVOL_SHIFT 0 /* RDACVOL - [7:0] */
165 #define WM8955_RDACVOL_WIDTH 8 /* RDACVOL - [7:0] */
168 * R12 (0x0C) - Bass control
178 #define WM8955_BASS_MASK 0x000F /* BASS - [3:0] */
179 #define WM8955_BASS_SHIFT 0 /* BASS - [3:0] */
180 #define WM8955_BASS_WIDTH 4 /* BASS - [3:0] */
183 * R13 (0x0D) - Treble control
189 #define WM8955_TRBL_MASK 0x000F /* TRBL - [3:0] */
190 #define WM8955_TRBL_SHIFT 0 /* TRBL - [3:0] */
191 #define WM8955_TRBL_WIDTH 4 /* TRBL - [3:0] */
194 * R15 (0x0F) - Reset
196 #define WM8955_RESET_MASK 0x01FF /* RESET - [8:0] */
197 #define WM8955_RESET_SHIFT 0 /* RESET - [8:0] */
198 #define WM8955_RESET_WIDTH 9 /* RESET - [8:0] */
201 * R23 (0x17) - Additional control (1)
207 #define WM8955_VSEL_MASK 0x00C0 /* VSEL - [7:6] */
208 #define WM8955_VSEL_SHIFT 6 /* VSEL - [7:6] */
209 #define WM8955_VSEL_WIDTH 2 /* VSEL - [7:6] */
210 #define WM8955_DMONOMIX_MASK 0x0030 /* DMONOMIX - [5:4] */
211 #define WM8955_DMONOMIX_SHIFT 4 /* DMONOMIX - [5:4] */
212 #define WM8955_DMONOMIX_WIDTH 2 /* DMONOMIX - [5:4] */
223 * R24 (0x18) - Additional control (2)
225 #define WM8955_OUT3SW_MASK 0x0180 /* OUT3SW - [8:7] */
226 #define WM8955_OUT3SW_SHIFT 7 /* OUT3SW - [8:7] */
227 #define WM8955_OUT3SW_WIDTH 2 /* OUT3SW - [8:7] */
238 * R25 (0x19) - Power Management (1)
240 #define WM8955_VMIDSEL_MASK 0x0180 /* VMIDSEL - [8:7] */
241 #define WM8955_VMIDSEL_SHIFT 7 /* VMIDSEL - [8:7] */
242 #define WM8955_VMIDSEL_WIDTH 2 /* VMIDSEL - [8:7] */
253 * R26 (0x1A) - Power Management (2)
289 * R27 (0x1B) - Additional Control (3)
297 * R34 (0x22) - Left out Mix (1)
307 #define WM8955_LI2LOVOL_MASK 0x0070 /* LI2LOVOL - [6:4] */
308 #define WM8955_LI2LOVOL_SHIFT 4 /* LI2LOVOL - [6:4] */
309 #define WM8955_LI2LOVOL_WIDTH 3 /* LI2LOVOL - [6:4] */
312 * R35 (0x23) - Left out Mix (2)
322 #define WM8955_RI2LOVOL_MASK 0x0070 /* RI2LOVOL - [6:4] */
323 #define WM8955_RI2LOVOL_SHIFT 4 /* RI2LOVOL - [6:4] */
324 #define WM8955_RI2LOVOL_WIDTH 3 /* RI2LOVOL - [6:4] */
327 * R36 (0x24) - Right out Mix (1)
337 #define WM8955_LI2ROVOL_MASK 0x0070 /* LI2ROVOL - [6:4] */
338 #define WM8955_LI2ROVOL_SHIFT 4 /* LI2ROVOL - [6:4] */
339 #define WM8955_LI2ROVOL_WIDTH 3 /* LI2ROVOL - [6:4] */
342 * R37 (0x25) - Right Out Mix (2)
352 #define WM8955_RI2ROVOL_MASK 0x0070 /* RI2ROVOL - [6:4] */
353 #define WM8955_RI2ROVOL_SHIFT 4 /* RI2ROVOL - [6:4] */
354 #define WM8955_RI2ROVOL_WIDTH 3 /* RI2ROVOL - [6:4] */
357 * R38 (0x26) - Mono out Mix (1)
367 #define WM8955_LI2MOVOL_MASK 0x0070 /* LI2MOVOL - [6:4] */
368 #define WM8955_LI2MOVOL_SHIFT 4 /* LI2MOVOL - [6:4] */
369 #define WM8955_LI2MOVOL_WIDTH 3 /* LI2MOVOL - [6:4] */
376 * R39 (0x27) - Mono out Mix (2)
386 #define WM8955_RI2MOVOL_MASK 0x0070 /* RI2MOVOL - [6:4] */
387 #define WM8955_RI2MOVOL_SHIFT 4 /* RI2MOVOL - [6:4] */
388 #define WM8955_RI2MOVOL_WIDTH 3 /* RI2MOVOL - [6:4] */
391 * R40 (0x28) - LOUT2 volume
401 #define WM8955_LOUT2VOL_MASK 0x007F /* LOUT2VOL - [6:0] */
402 #define WM8955_LOUT2VOL_SHIFT 0 /* LOUT2VOL - [6:0] */
403 #define WM8955_LOUT2VOL_WIDTH 7 /* LOUT2VOL - [6:0] */
406 * R41 (0x29) - ROUT2 volume
416 #define WM8955_ROUT2VOL_MASK 0x007F /* ROUT2VOL - [6:0] */
417 #define WM8955_ROUT2VOL_SHIFT 0 /* ROUT2VOL - [6:0] */
418 #define WM8955_ROUT2VOL_WIDTH 7 /* ROUT2VOL - [6:0] */
421 * R42 (0x2A) - MONOOUT volume
427 #define WM8955_MOUTVOL_MASK 0x007F /* MOUTVOL - [6:0] */
428 #define WM8955_MOUTVOL_SHIFT 0 /* MOUTVOL - [6:0] */
429 #define WM8955_MOUTVOL_WIDTH 7 /* MOUTVOL - [6:0] */
432 * R43 (0x2B) - Clocking / PLL
452 * R44 (0x2C) - PLL Control 1
454 #define WM8955_N_MASK 0x01E0 /* N - [8:5] */
455 #define WM8955_N_SHIFT 5 /* N - [8:5] */
456 #define WM8955_N_WIDTH 4 /* N - [8:5] */
457 #define WM8955_K_21_18_MASK 0x000F /* K(21:18) - [3:0] */
458 #define WM8955_K_21_18_SHIFT 0 /* K(21:18) - [3:0] */
459 #define WM8955_K_21_18_WIDTH 4 /* K(21:18) - [3:0] */
462 * R45 (0x2D) - PLL Control 2
464 #define WM8955_K_17_9_MASK 0x01FF /* K(17:9) - [8:0] */
465 #define WM8955_K_17_9_SHIFT 0 /* K(17:9) - [8:0] */
466 #define WM8955_K_17_9_WIDTH 9 /* K(17:9) - [8:0] */
469 * R46 (0x2E) - PLL Control 3
471 #define WM8955_K_8_0_MASK 0x01FF /* K(8:0) - [8:0] */
472 #define WM8955_K_8_0_SHIFT 0 /* K(8:0) - [8:0] */
473 #define WM8955_K_8_0_WIDTH 9 /* K(8:0) - [8:0] */
476 * R59 (0x3B) - PLL Control 4