Lines Matching +full:0 +full:x0100
18 #define WM8955_LOUT1_VOLUME 0x02
19 #define WM8955_ROUT1_VOLUME 0x03
20 #define WM8955_DAC_CONTROL 0x05
21 #define WM8955_AUDIO_INTERFACE 0x07
22 #define WM8955_SAMPLE_RATE 0x08
23 #define WM8955_LEFT_DAC_VOLUME 0x0A
24 #define WM8955_RIGHT_DAC_VOLUME 0x0B
25 #define WM8955_BASS_CONTROL 0x0C
26 #define WM8955_TREBLE_CONTROL 0x0D
27 #define WM8955_RESET 0x0F
28 #define WM8955_ADDITIONAL_CONTROL_1 0x17
29 #define WM8955_ADDITIONAL_CONTROL_2 0x18
30 #define WM8955_POWER_MANAGEMENT_1 0x19
31 #define WM8955_POWER_MANAGEMENT_2 0x1A
32 #define WM8955_ADDITIONAL_CONTROL_3 0x1B
33 #define WM8955_LEFT_OUT_MIX_1 0x22
34 #define WM8955_LEFT_OUT_MIX_2 0x23
35 #define WM8955_RIGHT_OUT_MIX_1 0x24
36 #define WM8955_RIGHT_OUT_MIX_2 0x25
37 #define WM8955_MONO_OUT_MIX_1 0x26
38 #define WM8955_MONO_OUT_MIX_2 0x27
39 #define WM8955_LOUT2_VOLUME 0x28
40 #define WM8955_ROUT2_VOLUME 0x29
41 #define WM8955_MONOOUT_VOLUME 0x2A
42 #define WM8955_CLOCKING_PLL 0x2B
43 #define WM8955_PLL_CONTROL_1 0x2C
44 #define WM8955_PLL_CONTROL_2 0x2D
45 #define WM8955_PLL_CONTROL_3 0x2E
46 #define WM8955_PLL_CONTROL_4 0x3B
49 #define WM8955_MAX_REGISTER 0x3B
56 * R2 (0x02) - LOUT1 volume
58 #define WM8955_LO1VU 0x0100 /* LO1VU */
59 #define WM8955_LO1VU_MASK 0x0100 /* LO1VU */
62 #define WM8955_LO1ZC 0x0080 /* LO1ZC */
63 #define WM8955_LO1ZC_MASK 0x0080 /* LO1ZC */
66 #define WM8955_LOUTVOL_MASK 0x007F /* LOUTVOL - [6:0] */
67 #define WM8955_LOUTVOL_SHIFT 0 /* LOUTVOL - [6:0] */
68 #define WM8955_LOUTVOL_WIDTH 7 /* LOUTVOL - [6:0] */
71 * R3 (0x03) - ROUT1 volume
73 #define WM8955_RO1VU 0x0100 /* RO1VU */
74 #define WM8955_RO1VU_MASK 0x0100 /* RO1VU */
77 #define WM8955_RO1ZC 0x0080 /* RO1ZC */
78 #define WM8955_RO1ZC_MASK 0x0080 /* RO1ZC */
81 #define WM8955_ROUTVOL_MASK 0x007F /* ROUTVOL - [6:0] */
82 #define WM8955_ROUTVOL_SHIFT 0 /* ROUTVOL - [6:0] */
83 #define WM8955_ROUTVOL_WIDTH 7 /* ROUTVOL - [6:0] */
86 * R5 (0x05) - DAC Control
88 #define WM8955_DAT 0x0080 /* DAT */
89 #define WM8955_DAT_MASK 0x0080 /* DAT */
92 #define WM8955_DACMU 0x0008 /* DACMU */
93 #define WM8955_DACMU_MASK 0x0008 /* DACMU */
96 #define WM8955_DEEMPH_MASK 0x0006 /* DEEMPH - [2:1] */
101 * R7 (0x07) - Audio Interface
103 #define WM8955_BCLKINV 0x0080 /* BCLKINV */
104 #define WM8955_BCLKINV_MASK 0x0080 /* BCLKINV */
107 #define WM8955_MS 0x0040 /* MS */
108 #define WM8955_MS_MASK 0x0040 /* MS */
111 #define WM8955_LRSWAP 0x0020 /* LRSWAP */
112 #define WM8955_LRSWAP_MASK 0x0020 /* LRSWAP */
115 #define WM8955_LRP 0x0010 /* LRP */
116 #define WM8955_LRP_MASK 0x0010 /* LRP */
119 #define WM8955_WL_MASK 0x000C /* WL - [3:2] */
122 #define WM8955_FORMAT_MASK 0x0003 /* FORMAT - [1:0] */
123 #define WM8955_FORMAT_SHIFT 0 /* FORMAT - [1:0] */
124 #define WM8955_FORMAT_WIDTH 2 /* FORMAT - [1:0] */
127 * R8 (0x08) - Sample Rate
129 #define WM8955_BCLKDIV2 0x0080 /* BCLKDIV2 */
130 #define WM8955_BCLKDIV2_MASK 0x0080 /* BCLKDIV2 */
133 #define WM8955_MCLKDIV2 0x0040 /* MCLKDIV2 */
134 #define WM8955_MCLKDIV2_MASK 0x0040 /* MCLKDIV2 */
137 #define WM8955_SR_MASK 0x003E /* SR - [5:1] */
140 #define WM8955_USB 0x0001 /* USB */
141 #define WM8955_USB_MASK 0x0001 /* USB */
142 #define WM8955_USB_SHIFT 0 /* USB */
146 * R10 (0x0A) - Left DAC volume
148 #define WM8955_LDVU 0x0100 /* LDVU */
149 #define WM8955_LDVU_MASK 0x0100 /* LDVU */
152 #define WM8955_LDACVOL_MASK 0x00FF /* LDACVOL - [7:0] */
153 #define WM8955_LDACVOL_SHIFT 0 /* LDACVOL - [7:0] */
154 #define WM8955_LDACVOL_WIDTH 8 /* LDACVOL - [7:0] */
157 * R11 (0x0B) - Right DAC volume
159 #define WM8955_RDVU 0x0100 /* RDVU */
160 #define WM8955_RDVU_MASK 0x0100 /* RDVU */
163 #define WM8955_RDACVOL_MASK 0x00FF /* RDACVOL - [7:0] */
164 #define WM8955_RDACVOL_SHIFT 0 /* RDACVOL - [7:0] */
165 #define WM8955_RDACVOL_WIDTH 8 /* RDACVOL - [7:0] */
168 * R12 (0x0C) - Bass control
170 #define WM8955_BB 0x0080 /* BB */
171 #define WM8955_BB_MASK 0x0080 /* BB */
174 #define WM8955_BC 0x0040 /* BC */
175 #define WM8955_BC_MASK 0x0040 /* BC */
178 #define WM8955_BASS_MASK 0x000F /* BASS - [3:0] */
179 #define WM8955_BASS_SHIFT 0 /* BASS - [3:0] */
180 #define WM8955_BASS_WIDTH 4 /* BASS - [3:0] */
183 * R13 (0x0D) - Treble control
185 #define WM8955_TC 0x0040 /* TC */
186 #define WM8955_TC_MASK 0x0040 /* TC */
189 #define WM8955_TRBL_MASK 0x000F /* TRBL - [3:0] */
190 #define WM8955_TRBL_SHIFT 0 /* TRBL - [3:0] */
191 #define WM8955_TRBL_WIDTH 4 /* TRBL - [3:0] */
194 * R15 (0x0F) - Reset
196 #define WM8955_RESET_MASK 0x01FF /* RESET - [8:0] */
197 #define WM8955_RESET_SHIFT 0 /* RESET - [8:0] */
198 #define WM8955_RESET_WIDTH 9 /* RESET - [8:0] */
201 * R23 (0x17) - Additional control (1)
203 #define WM8955_TSDEN 0x0100 /* TSDEN */
204 #define WM8955_TSDEN_MASK 0x0100 /* TSDEN */
207 #define WM8955_VSEL_MASK 0x00C0 /* VSEL - [7:6] */
210 #define WM8955_DMONOMIX_MASK 0x0030 /* DMONOMIX - [5:4] */
213 #define WM8955_DACINV 0x0002 /* DACINV */
214 #define WM8955_DACINV_MASK 0x0002 /* DACINV */
217 #define WM8955_TOEN 0x0001 /* TOEN */
218 #define WM8955_TOEN_MASK 0x0001 /* TOEN */
219 #define WM8955_TOEN_SHIFT 0 /* TOEN */
223 * R24 (0x18) - Additional control (2)
225 #define WM8955_OUT3SW_MASK 0x0180 /* OUT3SW - [8:7] */
228 #define WM8955_ROUT2INV 0x0010 /* ROUT2INV */
229 #define WM8955_ROUT2INV_MASK 0x0010 /* ROUT2INV */
232 #define WM8955_DACOSR 0x0001 /* DACOSR */
233 #define WM8955_DACOSR_MASK 0x0001 /* DACOSR */
234 #define WM8955_DACOSR_SHIFT 0 /* DACOSR */
238 * R25 (0x19) - Power Management (1)
240 #define WM8955_VMIDSEL_MASK 0x0180 /* VMIDSEL - [8:7] */
243 #define WM8955_VREF 0x0040 /* VREF */
244 #define WM8955_VREF_MASK 0x0040 /* VREF */
247 #define WM8955_DIGENB 0x0001 /* DIGENB */
248 #define WM8955_DIGENB_MASK 0x0001 /* DIGENB */
249 #define WM8955_DIGENB_SHIFT 0 /* DIGENB */
253 * R26 (0x1A) - Power Management (2)
255 #define WM8955_DACL 0x0100 /* DACL */
256 #define WM8955_DACL_MASK 0x0100 /* DACL */
259 #define WM8955_DACR 0x0080 /* DACR */
260 #define WM8955_DACR_MASK 0x0080 /* DACR */
263 #define WM8955_LOUT1 0x0040 /* LOUT1 */
264 #define WM8955_LOUT1_MASK 0x0040 /* LOUT1 */
267 #define WM8955_ROUT1 0x0020 /* ROUT1 */
268 #define WM8955_ROUT1_MASK 0x0020 /* ROUT1 */
271 #define WM8955_LOUT2 0x0010 /* LOUT2 */
272 #define WM8955_LOUT2_MASK 0x0010 /* LOUT2 */
275 #define WM8955_ROUT2 0x0008 /* ROUT2 */
276 #define WM8955_ROUT2_MASK 0x0008 /* ROUT2 */
279 #define WM8955_MONO 0x0004 /* MONO */
280 #define WM8955_MONO_MASK 0x0004 /* MONO */
283 #define WM8955_OUT3 0x0002 /* OUT3 */
284 #define WM8955_OUT3_MASK 0x0002 /* OUT3 */
289 * R27 (0x1B) - Additional Control (3)
291 #define WM8955_VROI 0x0040 /* VROI */
292 #define WM8955_VROI_MASK 0x0040 /* VROI */
297 * R34 (0x22) - Left out Mix (1)
299 #define WM8955_LD2LO 0x0100 /* LD2LO */
300 #define WM8955_LD2LO_MASK 0x0100 /* LD2LO */
303 #define WM8955_LI2LO 0x0080 /* LI2LO */
304 #define WM8955_LI2LO_MASK 0x0080 /* LI2LO */
307 #define WM8955_LI2LOVOL_MASK 0x0070 /* LI2LOVOL - [6:4] */
312 * R35 (0x23) - Left out Mix (2)
314 #define WM8955_RD2LO 0x0100 /* RD2LO */
315 #define WM8955_RD2LO_MASK 0x0100 /* RD2LO */
318 #define WM8955_RI2LO 0x0080 /* RI2LO */
319 #define WM8955_RI2LO_MASK 0x0080 /* RI2LO */
322 #define WM8955_RI2LOVOL_MASK 0x0070 /* RI2LOVOL - [6:4] */
327 * R36 (0x24) - Right out Mix (1)
329 #define WM8955_LD2RO 0x0100 /* LD2RO */
330 #define WM8955_LD2RO_MASK 0x0100 /* LD2RO */
333 #define WM8955_LI2RO 0x0080 /* LI2RO */
334 #define WM8955_LI2RO_MASK 0x0080 /* LI2RO */
337 #define WM8955_LI2ROVOL_MASK 0x0070 /* LI2ROVOL - [6:4] */
342 * R37 (0x25) - Right Out Mix (2)
344 #define WM8955_RD2RO 0x0100 /* RD2RO */
345 #define WM8955_RD2RO_MASK 0x0100 /* RD2RO */
348 #define WM8955_RI2RO 0x0080 /* RI2RO */
349 #define WM8955_RI2RO_MASK 0x0080 /* RI2RO */
352 #define WM8955_RI2ROVOL_MASK 0x0070 /* RI2ROVOL - [6:4] */
357 * R38 (0x26) - Mono out Mix (1)
359 #define WM8955_LD2MO 0x0100 /* LD2MO */
360 #define WM8955_LD2MO_MASK 0x0100 /* LD2MO */
363 #define WM8955_LI2MO 0x0080 /* LI2MO */
364 #define WM8955_LI2MO_MASK 0x0080 /* LI2MO */
367 #define WM8955_LI2MOVOL_MASK 0x0070 /* LI2MOVOL - [6:4] */
370 #define WM8955_DMEN 0x0001 /* DMEN */
371 #define WM8955_DMEN_MASK 0x0001 /* DMEN */
372 #define WM8955_DMEN_SHIFT 0 /* DMEN */
376 * R39 (0x27) - Mono out Mix (2)
378 #define WM8955_RD2MO 0x0100 /* RD2MO */
379 #define WM8955_RD2MO_MASK 0x0100 /* RD2MO */
382 #define WM8955_RI2MO 0x0080 /* RI2MO */
383 #define WM8955_RI2MO_MASK 0x0080 /* RI2MO */
386 #define WM8955_RI2MOVOL_MASK 0x0070 /* RI2MOVOL - [6:4] */
391 * R40 (0x28) - LOUT2 volume
393 #define WM8955_LO2VU 0x0100 /* LO2VU */
394 #define WM8955_LO2VU_MASK 0x0100 /* LO2VU */
397 #define WM8955_LO2ZC 0x0080 /* LO2ZC */
398 #define WM8955_LO2ZC_MASK 0x0080 /* LO2ZC */
401 #define WM8955_LOUT2VOL_MASK 0x007F /* LOUT2VOL - [6:0] */
402 #define WM8955_LOUT2VOL_SHIFT 0 /* LOUT2VOL - [6:0] */
403 #define WM8955_LOUT2VOL_WIDTH 7 /* LOUT2VOL - [6:0] */
406 * R41 (0x29) - ROUT2 volume
408 #define WM8955_RO2VU 0x0100 /* RO2VU */
409 #define WM8955_RO2VU_MASK 0x0100 /* RO2VU */
412 #define WM8955_RO2ZC 0x0080 /* RO2ZC */
413 #define WM8955_RO2ZC_MASK 0x0080 /* RO2ZC */
416 #define WM8955_ROUT2VOL_MASK 0x007F /* ROUT2VOL - [6:0] */
417 #define WM8955_ROUT2VOL_SHIFT 0 /* ROUT2VOL - [6:0] */
418 #define WM8955_ROUT2VOL_WIDTH 7 /* ROUT2VOL - [6:0] */
421 * R42 (0x2A) - MONOOUT volume
423 #define WM8955_MOZC 0x0080 /* MOZC */
424 #define WM8955_MOZC_MASK 0x0080 /* MOZC */
427 #define WM8955_MOUTVOL_MASK 0x007F /* MOUTVOL - [6:0] */
428 #define WM8955_MOUTVOL_SHIFT 0 /* MOUTVOL - [6:0] */
429 #define WM8955_MOUTVOL_WIDTH 7 /* MOUTVOL - [6:0] */
432 * R43 (0x2B) - Clocking / PLL
434 #define WM8955_MCLKSEL 0x0100 /* MCLKSEL */
435 #define WM8955_MCLKSEL_MASK 0x0100 /* MCLKSEL */
438 #define WM8955_PLLOUTDIV2 0x0020 /* PLLOUTDIV2 */
439 #define WM8955_PLLOUTDIV2_MASK 0x0020 /* PLLOUTDIV2 */
442 #define WM8955_PLL_RB 0x0010 /* PLL_RB */
443 #define WM8955_PLL_RB_MASK 0x0010 /* PLL_RB */
446 #define WM8955_PLLEN 0x0008 /* PLLEN */
447 #define WM8955_PLLEN_MASK 0x0008 /* PLLEN */
452 * R44 (0x2C) - PLL Control 1
454 #define WM8955_N_MASK 0x01E0 /* N - [8:5] */
457 #define WM8955_K_21_18_MASK 0x000F /* K(21:18) - [3:0] */
458 #define WM8955_K_21_18_SHIFT 0 /* K(21:18) - [3:0] */
459 #define WM8955_K_21_18_WIDTH 4 /* K(21:18) - [3:0] */
462 * R45 (0x2D) - PLL Control 2
464 #define WM8955_K_17_9_MASK 0x01FF /* K(17:9) - [8:0] */
465 #define WM8955_K_17_9_SHIFT 0 /* K(17:9) - [8:0] */
466 #define WM8955_K_17_9_WIDTH 9 /* K(17:9) - [8:0] */
469 * R46 (0x2E) - PLL Control 3
471 #define WM8955_K_8_0_MASK 0x01FF /* K(8:0) - [8:0] */
472 #define WM8955_K_8_0_SHIFT 0 /* K(8:0) - [8:0] */
473 #define WM8955_K_8_0_WIDTH 9 /* K(8:0) - [8:0] */
476 * R59 (0x3B) - PLL Control 4
478 #define WM8955_KEN 0x0080 /* KEN */
479 #define WM8955_KEN_MASK 0x0080 /* KEN */