Lines Matching refs:wm2000_write

81 static int wm2000_write(struct i2c_client *i2c, unsigned int reg,  in wm2000_write()  function
92 wm2000_write(i2c, WM2000_REG_SYS_CTL2, WM2000_ANC_ENG_CLR); in wm2000_reset()
93 wm2000_write(i2c, WM2000_REG_SYS_CTL2, WM2000_RAM_CLR); in wm2000_reset()
94 wm2000_write(i2c, WM2000_REG_ID1, 0); in wm2000_reset()
140 wm2000_write(i2c, WM2000_REG_SYS_CTL2, in wm2000_power_up()
144 wm2000_write(i2c, WM2000_REG_SYS_CTL2, in wm2000_power_up()
148 wm2000_write(i2c, WM2000_REG_SYS_CTL2, WM2000_ANC_ENG_CLR); in wm2000_power_up()
149 wm2000_write(i2c, WM2000_REG_SYS_CTL2, WM2000_ANC_ENG_SET); in wm2000_power_up()
166 wm2000_write(i2c, WM2000_REG_SYS_CTL2, WM2000_RAM_SET); in wm2000_power_up()
190 wm2000_write(i2c, WM2000_REG_ANA_VMID_PU_TIME, 248 / 4); in wm2000_power_up()
192 wm2000_write(i2c, WM2000_REG_SYS_MODE_CNTRL, in wm2000_power_up()
197 wm2000_write(i2c, WM2000_REG_SYS_MODE_CNTRL, in wm2000_power_up()
212 wm2000_write(i2c, WM2000_REG_SPEECH_CLARITY, val); in wm2000_power_up()
214 wm2000_write(i2c, WM2000_REG_SYS_START0, 0x33); in wm2000_power_up()
215 wm2000_write(i2c, WM2000_REG_SYS_START1, 0x02); in wm2000_power_up()
217 wm2000_write(i2c, WM2000_REG_SYS_CTL2, WM2000_ANC_INT_N_CLR); in wm2000_power_up()
239 wm2000_write(i2c, WM2000_REG_ANA_VMID_PD_TIME, 248 / 4); in wm2000_power_down()
240 wm2000_write(i2c, WM2000_REG_SYS_MODE_CNTRL, in wm2000_power_down()
244 wm2000_write(i2c, WM2000_REG_SYS_MODE_CNTRL, in wm2000_power_down()
276 wm2000_write(i2c, WM2000_REG_SYS_MODE_CNTRL, in wm2000_enter_bypass()
281 wm2000_write(i2c, WM2000_REG_SYS_MODE_CNTRL, in wm2000_enter_bypass()
298 wm2000_write(i2c, WM2000_REG_SYS_CTL1, WM2000_SYS_STBY); in wm2000_enter_bypass()
299 wm2000_write(i2c, WM2000_REG_SYS_CTL2, WM2000_RAM_CLR); in wm2000_enter_bypass()
314 wm2000_write(i2c, WM2000_REG_SYS_CTL1, 0); in wm2000_exit_bypass()
317 wm2000_write(i2c, WM2000_REG_SYS_MODE_CNTRL, in wm2000_exit_bypass()
322 wm2000_write(i2c, WM2000_REG_SYS_MODE_CNTRL, in wm2000_exit_bypass()
327 wm2000_write(i2c, WM2000_REG_SYS_CTL2, WM2000_RAM_SET); in wm2000_exit_bypass()
328 wm2000_write(i2c, WM2000_REG_SYS_CTL2, WM2000_ANC_INT_N_CLR); in wm2000_exit_bypass()
350 wm2000_write(i2c, WM2000_REG_ANA_VMID_PD_TIME, 248 / 4); in wm2000_enter_standby()
352 wm2000_write(i2c, WM2000_REG_SYS_MODE_CNTRL, in wm2000_enter_standby()
357 wm2000_write(i2c, WM2000_REG_SYS_MODE_CNTRL, in wm2000_enter_standby()
375 wm2000_write(i2c, WM2000_REG_SYS_CTL1, WM2000_SYS_STBY); in wm2000_enter_standby()
376 wm2000_write(i2c, WM2000_REG_SYS_CTL2, WM2000_RAM_CLR); in wm2000_enter_standby()
393 wm2000_write(i2c, WM2000_REG_SYS_CTL1, 0); in wm2000_exit_standby()
396 wm2000_write(i2c, WM2000_REG_ANA_VMID_PU_TIME, 248 / 4); in wm2000_exit_standby()
398 wm2000_write(i2c, WM2000_REG_SYS_MODE_CNTRL, in wm2000_exit_standby()
403 wm2000_write(i2c, WM2000_REG_SYS_MODE_CNTRL, in wm2000_exit_standby()
408 wm2000_write(i2c, WM2000_REG_SYS_CTL2, WM2000_RAM_SET); in wm2000_exit_standby()
409 wm2000_write(i2c, WM2000_REG_SYS_CTL2, WM2000_ANC_INT_N_CLR); in wm2000_exit_standby()