Lines Matching +full:3 +full:x3
18 #define R_IRQMASK VIRT_ADDR(0x0, 0x3)
70 #define R_HSDSTAT VIRT_ADDR(0x1, 0x3)
102 #define R_SUBCTL VIRT_ADDR(0x2, 0x3)
126 #define R_SPKEQFILT VIRT_ADDR(0x3, 0x1)
127 #define R_SPKCRWDL VIRT_ADDR(0x3, 0x2)
128 #define R_SPKCRWDM VIRT_ADDR(0x3, 0x3)
129 #define R_SPKCRWDH VIRT_ADDR(0x3, 0x4)
130 #define R_SPKCRRDL VIRT_ADDR(0x3, 0x5)
131 #define R_SPKCRRDM VIRT_ADDR(0x3, 0x6)
132 #define R_SPKCRRDH VIRT_ADDR(0x3, 0x7)
133 #define R_SPKCRADD VIRT_ADDR(0x3, 0x8)
134 #define R_SPKCRS VIRT_ADDR(0x3, 0x9)
135 #define R_SPKMBCEN VIRT_ADDR(0x3, 0x0A)
136 #define R_SPKMBCCTL VIRT_ADDR(0x3, 0x0B)
137 #define R_SPKMBCMUG1 VIRT_ADDR(0x3, 0x0C)
138 #define R_SPKMBCTHR1 VIRT_ADDR(0x3, 0x0D)
139 #define R_SPKMBCRAT1 VIRT_ADDR(0x3, 0x0E)
140 #define R_SPKMBCATK1L VIRT_ADDR(0x3, 0x0F)
141 #define R_SPKMBCATK1H VIRT_ADDR(0x3, 0x10)
142 #define R_SPKMBCREL1L VIRT_ADDR(0x3, 0x11)
143 #define R_SPKMBCREL1H VIRT_ADDR(0x3, 0x12)
144 #define R_SPKMBCMUG2 VIRT_ADDR(0x3, 0x13)
145 #define R_SPKMBCTHR2 VIRT_ADDR(0x3, 0x14)
146 #define R_SPKMBCRAT2 VIRT_ADDR(0x3, 0x15)
147 #define R_SPKMBCATK2L VIRT_ADDR(0x3, 0x16)
148 #define R_SPKMBCATK2H VIRT_ADDR(0x3, 0x17)
149 #define R_SPKMBCREL2L VIRT_ADDR(0x3, 0x18)
150 #define R_SPKMBCREL2H VIRT_ADDR(0x3, 0x19)
151 #define R_SPKMBCMUG3 VIRT_ADDR(0x3, 0x1A)
152 #define R_SPKMBCTHR3 VIRT_ADDR(0x3, 0x1B)
153 #define R_SPKMBCRAT3 VIRT_ADDR(0x3, 0x1C)
154 #define R_SPKMBCATK3L VIRT_ADDR(0x3, 0x1D)
155 #define R_SPKMBCATK3H VIRT_ADDR(0x3, 0x1E)
156 #define R_SPKMBCREL3L VIRT_ADDR(0x3, 0x1F)
157 #define R_SPKMBCREL3H VIRT_ADDR(0x3, 0x20)
158 #define R_SPKCLECTL VIRT_ADDR(0x3, 0x21)
159 #define R_SPKCLEMUG VIRT_ADDR(0x3, 0x22)
160 #define R_SPKCOMPTHR VIRT_ADDR(0x3, 0x23)
161 #define R_SPKCOMPRAT VIRT_ADDR(0x3, 0x24)
162 #define R_SPKCOMPATKL VIRT_ADDR(0x3, 0x25)
163 #define R_SPKCOMPATKH VIRT_ADDR(0x3, 0x26)
164 #define R_SPKCOMPRELL VIRT_ADDR(0x3, 0x27)
165 #define R_SPKCOMPRELH VIRT_ADDR(0x3, 0x28)
166 #define R_SPKLIMTHR VIRT_ADDR(0x3, 0x29)
167 #define R_SPKLIMTGT VIRT_ADDR(0x3, 0x2A)
168 #define R_SPKLIMATKL VIRT_ADDR(0x3, 0x2B)
169 #define R_SPKLIMATKH VIRT_ADDR(0x3, 0x2C)
170 #define R_SPKLIMRELL VIRT_ADDR(0x3, 0x2D)
171 #define R_SPKLIMRELH VIRT_ADDR(0x3, 0x2E)
172 #define R_SPKEXPTHR VIRT_ADDR(0x3, 0x2F)
173 #define R_SPKEXPRAT VIRT_ADDR(0x3, 0x30)
174 #define R_SPKEXPATKL VIRT_ADDR(0x3, 0x31)
175 #define R_SPKEXPATKH VIRT_ADDR(0x3, 0x32)
176 #define R_SPKEXPRELL VIRT_ADDR(0x3, 0x33)
177 #define R_SPKEXPRELH VIRT_ADDR(0x3, 0x34)
178 #define R_SPKFXCTL VIRT_ADDR(0x3, 0x35)
181 #define R_DACCRWDM VIRT_ADDR(0x4, 0x3)
234 #define R_SUBCRWDM VIRT_ADDR(0x5, 0x3)
290 #define FB_PLLCTL_RZ_PLL 3
341 #define FM_I2SPCTL_FORMAT 0x3
345 #define FV_FORMAT_TDM 0x3
360 #define FB_I2SMRATE_I2SMBR 3
368 #define FM_I2SMRATE_I2SMBM 0x3
372 #define FV_I2SMBM_2 0x3
399 #define FB_PCMPCTL1_PCMDSSP 3
546 #define FB_IRQEN_HPDINTEN 3
580 #define FB_IRQMASK_HPDIM 3
614 #define FB_IRQSTAT_HPDINT 3
693 #define FM_PLLCTL_PLLISEL 0x3
697 #define FV_PLLISEL_BCLK 0x3
711 #define FM_ISRC_IBM 0x3
715 #define FV_IBM_2 0x3
750 #define FM_I2SCMC_BCMP1 0x3
754 #define FV_BCMP1_64X 0x3
759 #define I2SCMC_BCMP_64X 0x3
771 #define FM_MCLK2PINC_MCLK2OS 0x3
812 #define FB_I2SPINC2_LR2PDD 3
837 #define FB_GPIOCTL0_GPIO3IO 3
862 #define FB_GPIOCTL1_GPIO3RD 3
891 #define FB_ASRC_ASRCOL 3
920 #define FB_TDMCTL1_TDMDSS 3
927 #define FM_TDMCTL1_TDMSI 0x3
942 #define FB_PWRM0_INPROC0PU 3
967 #define FB_PWRM1_SPKRPU 3
990 #define FB_PWRM2_I2S1OPU 3
1029 #define FB_PWRM3_RLINEPU 3
1036 #define FB_PWRM4_OPDACLPU 3
1056 #define FM_I2SIDCTL_I2SI1DCTL 0x3
1066 #define FM_I2SODCTL_I2SO1DCTL 0x3
1076 #define FB_AUDIOMUX1_I2S2MUX 3
1092 #define FV_I2S1MUX_ADC_DMIC 0x3
1101 #define AUDIOMUX1_I2SMUX_ADC_DMIC 0x3
1115 #define FB_AUDIOMUX2_DACMUX 3
1131 #define FV_I2S3MUX_ADC_DMIC 0x3
1138 #define FB_AUDIOMUX3_SUBMUX 3
1164 #define FV_CLSSDMUX_ADC_DMIC 0x3
1180 #define FB_HSDCTL1_HPDLYBYP 3
1204 #define FB_HSDCTL2_SWMODE 3
1211 #define FM_HSDCTL2_FPLUGTYPE 0x3
1217 #define FB_HSDSTAT_HSDETSTAT 3
1240 #define FB_BUTCTL_BSTABLE_L 3
1288 #define FB_ICTL0_IN1MUTE 3
1310 #define FB_ICTL1_IN3MUTE 3
1333 #define FM_MICBIAS_SPARE2 0x3
1359 #define FB_IVOLCTLU_IFADE 3
1378 #define FB_ALCCTL0_ALCEN3 3
1415 #define FB_NGATE_NGTH 3
1438 #define FM_DMICCTL_DMRATE 0x3
1458 #define FB_DACCTL_DACMUTE 3
1482 #define FB_SPKCTL_SPKMUTE 3
1496 #define FB_SUBCTL_SUBMUTE 3
1525 #define FB_OVOLCTLU_SUBVOLU 3
1544 #define FB_MUTEC_APWD 3
1599 #define FM_COP1_MONRATE 0x3
1618 #define FB_PWM0_BFDIS 3
1672 #define FM_THERMTS_TSPOLL 0x3
1688 #define FM_THERMSPK1_DECSTEP 0x3
1698 #define FB_SCSTAT_ESDF 3
1705 #define FM_SCSTAT_CLSDF 0x3
1723 #define FB_SPKEQFILT_EQ1EN 3
1792 #define FB_SPKMBCCTL_LVLMODE2 3
1808 #define FB_SPKCLECTL_WINSEL 3
1906 #define FB_SPKFXCTL_TEEN 3
1927 #define FB_DACEQFILT_EQ1EN 3
1996 #define FB_DACMBCCTL_LVLMODE2 3
2012 #define FB_DACCLECTL_WINSEL 3
2110 #define FB_DACFXCTL_TEEN 3
2131 #define FB_SUBEQFILT_EQ1EN 3
2200 #define FB_SUBMBCCTL_LVLMODE2 3
2216 #define FB_SUBCLECTL_WINSEL 3
2311 #define FB_SUBFXCTL_TEEN 3