25 #define SSM2518_REG_POWER1		0x00
26 #define SSM2518_REG_CLOCK		0x01
27 #define SSM2518_REG_SAI_CTRL1		0x02
28 #define SSM2518_REG_SAI_CTRL2		0x03
29 #define SSM2518_REG_CHAN_MAP		0x04
30 #define SSM2518_REG_LEFT_VOL		0x05
31 #define SSM2518_REG_RIGHT_VOL		0x06
32 #define SSM2518_REG_MUTE_CTRL		0x07
33 #define SSM2518_REG_FAULT_CTRL		0x08
34 #define SSM2518_REG_POWER2		0x09
35 #define SSM2518_REG_DRC_1		0x0a
36 #define SSM2518_REG_DRC_2		0x0b
37 #define SSM2518_REG_DRC_3		0x0c
38 #define SSM2518_REG_DRC_4		0x0d
39 #define SSM2518_REG_DRC_5		0x0e
40 #define SSM2518_REG_DRC_6		0x0f
41 #define SSM2518_REG_DRC_7		0x10
42 #define SSM2518_REG_DRC_8		0x11
43 #define SSM2518_REG_DRC_9		0x12
47 #define SSM2518_POWER1_MCS_MASK			(0xf << 1)
48 #define SSM2518_POWER1_MCS_64FS			(0x0 << 1)
49 #define SSM2518_POWER1_MCS_128FS		(0x1 << 1)
50 #define SSM2518_POWER1_MCS_256FS		(0x2 << 1)
51 #define SSM2518_POWER1_MCS_384FS		(0x3 << 1)
52 #define SSM2518_POWER1_MCS_512FS		(0x4 << 1)
53 #define SSM2518_POWER1_MCS_768FS		(0x5 << 1)
54 #define SSM2518_POWER1_MCS_100FS		(0x6 << 1)
55 #define SSM2518_POWER1_MCS_200FS		(0x7 << 1)
56 #define SSM2518_POWER1_MCS_400FS		(0x8 << 1)
57 #define SSM2518_POWER1_SPWDN			BIT(0)
59 #define SSM2518_CLOCK_ASR			BIT(0)
61 #define SSM2518_SAI_CTRL1_FMT_MASK		(0x3 << 5)
62 #define SSM2518_SAI_CTRL1_FMT_I2S		(0x0 << 5)
63 #define SSM2518_SAI_CTRL1_FMT_LJ		(0x1 << 5)
64 #define SSM2518_SAI_CTRL1_FMT_RJ_24BIT		(0x2 << 5)
65 #define SSM2518_SAI_CTRL1_FMT_RJ_16BIT		(0x3 << 5)
67 #define SSM2518_SAI_CTRL1_SAI_MASK		(0x7 << 2)
68 #define SSM2518_SAI_CTRL1_SAI_I2S		(0x0 << 2)
69 #define SSM2518_SAI_CTRL1_SAI_TDM_2		(0x1 << 2)
70 #define SSM2518_SAI_CTRL1_SAI_TDM_4		(0x2 << 2)
71 #define SSM2518_SAI_CTRL1_SAI_TDM_8		(0x3 << 2)
72 #define SSM2518_SAI_CTRL1_SAI_TDM_16		(0x4 << 2)
73 #define SSM2518_SAI_CTRL1_SAI_MONO		(0x5 << 2)
75 #define SSM2518_SAI_CTRL1_FS_MASK		(0x3)
76 #define SSM2518_SAI_CTRL1_FS_8000_12000		(0x0)
77 #define SSM2518_SAI_CTRL1_FS_16000_24000	(0x1)
78 #define SSM2518_SAI_CTRL1_FS_32000_48000	(0x2)
79 #define SSM2518_SAI_CTRL1_FS_64000_96000	(0x3)
85 #define SSM2518_SAI_CTRL2_SLOT_WIDTH_MASK	(0x3 << 2)
86 #define SSM2518_SAI_CTRL2_SLOT_WIDTH_32		(0x0 << 2)
87 #define SSM2518_SAI_CTRL2_SLOT_WIDTH_24		(0x1 << 2)
88 #define SSM2518_SAI_CTRL2_SLOT_WIDTH_16		(0x2 << 2)
92 #define SSM2518_CHAN_MAP_RIGHT_SLOT_MASK	0xf0
93 #define SSM2518_CHAN_MAP_LEFT_SLOT_OFFSET	0
94 #define SSM2518_CHAN_MAP_LEFT_SLOT_MASK		0x0f
97 #define SSM2518_MUTE_CTRL_MUTE_MASTER		BIT(0)
99 #define SSM2518_POWER2_APWDN			BIT(0)
102 #define SSM2518_DAC_FS_MASK			0x07
103 #define SSM2518_DAC_FS_8000			0x00
104 #define SSM2518_DAC_FS_16000			0x01
105 #define SSM2518_DAC_FS_32000			0x02
106 #define SSM2518_DAC_FS_64000			0x03
107 #define SSM2518_DAC_FS_128000			0x04
120 	{ 0x00, 0x05 },
121 	{ 0x01, 0x00 },
122 	{ 0x02, 0x02 },
123 	{ 0x03, 0x00 },
124 	{ 0x04, 0x10 },
125 	{ 0x05, 0x40 },
126 	{ 0x06, 0x40 },
127 	{ 0x07, 0x81 },
128 	{ 0x08, 0x0c },
129 	{ 0x09, 0x99 },
130 	{ 0x0a, 0x7c },
131 	{ 0x0b, 0x5b },
132 	{ 0x0c, 0x57 },
133 	{ 0x0d, 0x89 },
134 	{ 0x0e, 0x8c },
135 	{ 0x0f, 0x77 },
136 	{ 0x10, 0x26 },
137 	{ 0x11, 0x1c },
138 	{ 0x12, 0x97 },
142 static const DECLARE_TLV_DB_SCALE(ssm2518_compressor_tlv, -3400, 200, 0);
143 static const DECLARE_TLV_DB_SCALE(ssm2518_expander_tlv, -8100, 300, 0);
144 static const DECLARE_TLV_DB_SCALE(ssm2518_noise_gate_tlv, -9600, 300, 0);
145 static const DECLARE_TLV_DB_SCALE(ssm2518_post_drc_tlv, -2400, 300, 0);
148 	0, 7, TLV_DB_SCALE_ITEM(-2200, 200, 0),
149 	7, 15, TLV_DB_SCALE_ITEM(-800, 100, 0),
153 	"0 ms", "0.1 ms", "0.19 ms", "0.37 ms", "0.75 ms", "1.5 ms", "3 ms",
154 	"6 ms", "12 ms", "24 ms", "48 ms", "96 ms", "192 ms", "384 ms",
155 	"768 ms", "1536 ms",
159 	"0 ms", "1.5 ms", "3 ms", "6 ms", "12 ms", "24 ms", "48 ms", "96 ms",
160 	"192 ms", "384 ms", "768 ms", "1536 ms", "3072 ms", "6144 ms",
161 	"12288 ms", "24576 ms"
165 	"0 ms", "0.67 ms", "1.33 ms", "2.67 ms", "5.33 ms", "10.66 ms",
166 	"21.32 ms", "42.64 ms", "85.28 ms", "170.56 ms", "341.12 ms",
167 	"682.24 ms", "1364 ms",
173 	SSM2518_REG_DRC_2, 0, ssm2518_drc_peak_detector_release_time_text);
177 	SSM2518_REG_DRC_6, 0, ssm2518_drc_peak_detector_release_time_text);
181 	SSM2518_REG_DRC_7, 0, ssm2518_drc_hold_time_text);
183 	SSM2518_REG_DRC_9, 0, ssm2518_drc_peak_detector_release_time_text);
187 			4, 1, 0),
189 			SSM2518_REG_RIGHT_VOL, 0, 0xff, 1, ssm2518_vol_tlv),
192 	SOC_SINGLE("Amp Low Power Mode Switch", SSM2518_REG_POWER2, 4, 1, 0),
193 	SOC_SINGLE("DAC Low Power Mode Switch", SSM2518_REG_POWER2, 3, 1, 0),
195 	SOC_SINGLE("DRC Limiter Switch", SSM2518_REG_DRC_1, 5, 1, 0),
196 	SOC_SINGLE("DRC Compressor Switch", SSM2518_REG_DRC_1, 4, 1, 0),
197 	SOC_SINGLE("DRC Expander Switch", SSM2518_REG_DRC_1, 3, 1, 0),
198 	SOC_SINGLE("DRC Noise Gate Switch", SSM2518_REG_DRC_1, 2, 1, 0),
199 	SOC_DOUBLE("DRC Switch", SSM2518_REG_DRC_1, 0, 1, 1, 0),
204 			SSM2518_REG_DRC_3, 0, 15, 1, ssm2518_compressor_tlv),
208 			SSM2518_REG_DRC_4, 0, 15, 1, ssm2518_noise_gate_tlv),
212 			SSM2518_REG_DRC_5, 0, 15, 1, ssm2518_noise_gate_tlv),
248 	3200000, 6400000, 12800000, 0
253 	4410000, 8820000, 17640000, 0
258 	4800000, 9600000, 19200000, 0
316 	for (i = 0; i < ARRAY_SIZE(ssm2518_mcs_lut); i++) {  in ssm2518_lookup_mcs()
326 	for (i = 0; sysclks[i]; i++) {  in ssm2518_lookup_mcs()
345 	if (mcs < 0)  in ssm2518_hw_params()
378 	if (ret < 0)  in ssm2518_hw_params()
383 	if (ret < 0)  in ssm2518_hw_params()
398 		val = 0;  in ssm2518_mute()
407 	unsigned int ctrl1 = 0, ctrl2 = 0;  in ssm2518_set_dai_fmt()
477 	int ret = 0;  in ssm2518_set_power()
492 			SSM2518_POWER1_SPWDN | SSM2518_POWER1_RESET, 0x00);  in ssm2518_set_power()
503 	int ret = 0;  in ssm2518_set_bias_level()
530 	if (slots == 0)  in ssm2518_set_tdm_slot()
535 	if (tx_mask == 0 || rx_mask != 0)  in ssm2518_set_tdm_slot()
541 		left_slot = 0;  in ssm2518_set_tdm_slot()
542 		right_slot = 0;  in ssm2518_set_tdm_slot()
547 		if (tx_mask == 0) {  in ssm2518_set_tdm_slot()
555 	if (tx_mask != 0 || left_slot >= slots || right_slot >= slots)  in ssm2518_set_tdm_slot()
613 		snd_pcm_hw_constraint_list(substream->runtime, 0,  in ssm2518_startup()
616 	return 0;  in ssm2518_startup()
654 		val = 0;  in ssm2518_set_sysclk()
667 	case 0:  in ssm2518_set_sysclk()
774 				SSM2518_POWER2_APWDN, 0x00);  in ssm2518_i2c_probe()