Lines Matching +full:0 +full:x8004

15 	{ 0x202d, 0x00 },
16 	{ 0x2f01, 0x00 },
17 	{ 0x2f02, 0x09 },
18 	{ 0x2f03, 0x00 },
19 	{ 0x2f04, 0x00 },
20 	{ 0x2f05, 0x0b },
21 	{ 0x2f06, 0x01 },
22 	{ 0x2f08, 0x00 },
23 	{ 0x2f09, 0x00 },
24 	{ 0x2f0a, 0x00 },
25 	{ 0x2f35, 0x00 },
26 	{ 0x2f36, 0x00 },
27 	{ 0x2f50, 0xf0 },
28 	{ 0x2f58, 0x07 },
29 	{ 0x2f59, 0x07 },
30 	{ 0x2f5a, 0x07 },
31 	{ 0x2f5b, 0x07 },
32 	{ 0x2f5c, 0x27 },
33 	{ 0x2f5d, 0x07 },
35 		0), 0x09 },
37 		0), 0x09 },
39 		0), 0x03 },
41 		0), 0x03 },
43 		0x01 },
45 		0x01 },
47 		0x01 },
49 		0x01 },
51 		0), 0x09 },
53 		0x01 },
55 		0x01 },
57 		0x01 },
59 		0x01 },
60 	{ SDW_SDCA_CTL(FUNC_NUM_MIC_ARRAY, RT722_SDCA_ENT_PDE2A, RT722_SDCA_CTL_REQ_POWER_STATE, 0),
61 		0x03 },
62 	{ SDW_SDCA_CTL(FUNC_NUM_MIC_ARRAY, RT722_SDCA_ENT_IT26, RT722_SDCA_CTL_VENDOR_DEF, 0),
63 		0x00 },
64 	{ SDW_SDCA_CTL(FUNC_NUM_AMP, RT722_SDCA_ENT_CS31, RT722_SDCA_CTL_SAMPLE_FREQ_INDEX, 0),
65 		0x09 },
67 		0x01 },
69 		0x01 },
70 	{ SDW_SDCA_CTL(FUNC_NUM_AMP, RT722_SDCA_ENT_PDE23, RT722_SDCA_CTL_REQ_POWER_STATE, 0),
71 		0x03 },
72 	{ SDW_SDCA_CTL(FUNC_NUM_AMP, RT722_SDCA_ENT_OT23, RT722_SDCA_CTL_VENDOR_DEF, 0), 0x00 },
76 	{ 0x200003c, 0xc214 },
77 	{ 0x2000046, 0x8004 },
78 	{ 0x6100006, 0x0005 },
79 	{ 0x6100010, 0x2630 },
80 	{ 0x6100011, 0x152f },
81 	{ 0x6100013, 0x0102 },
82 	{ 0x6100015, 0x2200 },
83 	{ 0x6100017, 0x0102 },
84 	{ 0x6100025, 0x2a29 },
85 	{ 0x6100026, 0x2a00 },
86 	{ 0x6100028, 0x2a2a },
87 	{ 0x6100029, 0x4141 },
88 	{ 0x6100055, 0x0000 },
89 	{ 0x5810000, 0x702d },
91 		CH_L), 0x0000 },
93 		CH_R), 0x0000 },
95 		CH_L), 0x0000 },
97 		CH_R), 0x0000 },
99 		CH_L), 0x0000 },
101 		CH_R), 0x0000 },
103 		CH_01), 0x0000 },
105 		CH_02), 0x0000 },
107 		CH_03), 0x0000 },
109 		CH_04), 0x0000 },
111 		0x0000 },
113 		0x0000 },
115 		0x0000 },
117 		0x0000 },
119 		0x0000 },
121 		0x0000 },