Lines Matching +full:8 +full:- +full:12
1 /* SPDX-License-Identifier: GPL-2.0-only */
3 * rt5682s.h -- RT5682I-VS ALSA SoC audio driver
17 #include <linux/clk-provider.h>
25 /* I/O - Output */
33 /* I/O - Input */
44 /* I/O - ADC/DAC/DMIC */
50 /* Mixer - D-D */
57 /* Mixer - ADC */
84 /* Format - ADC/DAC */
91 /* Format - TDM Control */
98 /* Function - Analog */
416 #define RT5682S_L_VOL_SFT 8
436 #define RT5682S_G_HP (0xf << 8)
437 #define RT5682S_G_HP_SFT 8
448 #define RT5682S_DET_TYPE (0x1 << 12)
449 #define RT5682S_DET_TYPE_SFT 12
455 #define RT5682S_POL_FAST_OFF_MASK (0x1 << 8)
456 #define RT5682S_POL_FAST_OFF_HIGH (0x1 << 8)
457 #define RT5682S_POL_FAST_OFF_LOW (0x0 << 8)
489 #define RT5682S_POW_BG_MB2_MASK (0x1 << 12)
490 #define RT5682S_POW_BG_MB2_REG (0x1 << 12)
491 #define RT5682S_POW_BG_MB2_FSM (0x0 << 12)
508 #define RT5682S_SEL_SHT_MID_TON_MASK (0x3 << 12)
509 #define RT5682S_SEL_SHT_MID_TON_2 (0x0 << 12)
510 #define RT5682S_SEL_SHT_MID_TON_3 (0x1 << 12)
516 #define RT5682S_JD_FAST_OFF_SRC_MASK (0x7 << 8)
517 #define RT5682S_JD_FAST_OFF_SRC_JDH (0x6 << 8)
518 #define RT5682S_JD_FAST_OFF_SRC_GPIO6 (0x5 << 8)
519 #define RT5682S_JD_FAST_OFF_SRC_GPIO5 (0x4 << 8)
520 #define RT5682S_JD_FAST_OFF_SRC_GPIO4 (0x3 << 8)
521 #define RT5682S_JD_FAST_OFF_SRC_GPIO3 (0x2 << 8)
522 #define RT5682S_JD_FAST_OFF_SRC_GPIO2 (0x1 << 8)
523 #define RT5682S_JD_FAST_OFF_SRC_GPIO1 (0x0 << 8)
526 #define RT5682S_DAC_L1_VOL_MASK (0xff << 8)
527 #define RT5682S_DAC_L1_VOL_SFT 8
532 #define RT5682S_ADC_L_VOL_MASK (0x7f << 8)
533 #define RT5682S_ADC_L_VOL_SFT 8
540 #define RT5682S_STO1_ADC_R_BST_MASK (0x3 << 12)
541 #define RT5682S_STO1_ADC_R_BST_SFT 12
544 #define RT5682S_ST_SRC_SEL (0x1 << 8)
545 #define RT5682S_ST_SRC_SFT 8
560 #define RT5682S_STO1_ADC2L_SRC_MASK (0x1 << 12)
561 #define RT5682S_STO1_ADC2L_SRC_SFT 12
592 #define RT5682S_G_DAC_R1_STO_L_MASK (0x1 << 12)
593 #define RT5682S_G_DAC_R1_STO_L_SFT 12
606 #define RT5682S_M_ST_STO_R (0x1 << 8)
607 #define RT5682S_M_ST_STO_R_SFT 8
620 #define RT5682S_BST_CBJ_MASK (0x3f << 8)
621 #define RT5682S_BST_CBJ_SFT 8
628 #define RT5682S_PWR_RM1_R_BIT 8
638 #define RT5682S_PRE_CHR_DAC_R1 (0x1 << 12)
639 #define RT5682S_PRE_CHR_DAC_R1_BIT 12
644 #define RT5682S_PWR_LDO (0x1 << 8)
645 #define RT5682S_PWR_LDO_BIT 8
683 #define RT5682S_PWR_FV2 (0x1 << 12)
684 #define RT5682S_PWR_FV2_BIT 12
701 #define RT5682S_RST_MCLK1 (0x1 << 12)
702 #define RT5682S_RST_MCLK1_BIT 12
720 #define RT5682S_PWR_BIAS_PLLB (0x1 << 12)
721 #define RT5682S_PWR_BIAS_PLLB_BIT 12
742 #define RT5682S_DBG_BGLDO_MASK (0x3 << 12)
743 #define RT5682S_DBG_BGLDO_SFT 12
746 #define RT5682S_DBG_BGLDO_MB2_MASK (0x3 << 8)
747 #define RT5682S_DBG_BGLDO_MB2_SFT 8
769 #define RT5682S_FIFO_CLK_DIV_MASK (0x7 << 12)
770 #define RT5682S_FIFO_CLK_DIV_2 (0x1 << 12)
783 #define RT5682S_I2S1_TX_CHL_MASK (0x7 << 12)
784 #define RT5682S_I2S1_TX_CHL_SFT 12
785 #define RT5682S_I2S1_TX_CHL_16 (0x0 << 12)
786 #define RT5682S_I2S1_TX_CHL_20 (0x1 << 12)
787 #define RT5682S_I2S1_TX_CHL_24 (0x2 << 12)
788 #define RT5682S_I2S1_TX_CHL_32 (0x3 << 12)
789 #define RT5682S_I2S1_TX_CHL_8 (0x4 << 12)
790 #define RT5682S_I2S1_RX_CHL_MASK (0x7 << 8)
791 #define RT5682S_I2S1_RX_CHL_SFT 8
792 #define RT5682S_I2S1_RX_CHL_16 (0x0 << 8)
793 #define RT5682S_I2S1_RX_CHL_20 (0x1 << 8)
794 #define RT5682S_I2S1_RX_CHL_24 (0x2 << 8)
795 #define RT5682S_I2S1_RX_CHL_32 (0x3 << 8)
796 #define RT5682S_I2S1_RX_CHL_8 (0x4 << 8)
819 #define RT5682S_I2S_BP_MASK (0x1 << 8)
820 #define RT5682S_I2S_BP_SFT 8
821 #define RT5682S_I2S_BP_NOR (0x0 << 8)
822 #define RT5682S_I2S_BP_INV (0x1 << 8)
843 #define RT5682S_ADC_OSR_MASK (0xf << 12)
844 #define RT5682S_ADC_OSR_SFT 12
845 #define RT5682S_ADC_OSR_D_1 (0x0 << 12)
846 #define RT5682S_ADC_OSR_D_2 (0x1 << 12)
847 #define RT5682S_ADC_OSR_D_4 (0x2 << 12)
848 #define RT5682S_ADC_OSR_D_6 (0x3 << 12)
849 #define RT5682S_ADC_OSR_D_8 (0x4 << 12)
850 #define RT5682S_ADC_OSR_D_12 (0x5 << 12)
851 #define RT5682S_ADC_OSR_D_16 (0x6 << 12)
852 #define RT5682S_ADC_OSR_D_24 (0x7 << 12)
853 #define RT5682S_ADC_OSR_D_32 (0x8 << 12)
854 #define RT5682S_ADC_OSR_D_48 (0x9 << 12)
855 #define RT5682S_I2S_M_D_MASK (0xf << 8)
856 #define RT5682S_I2S_M_D_SFT 8
857 #define RT5682S_I2S_M_D_1 (0x0 << 8)
858 #define RT5682S_I2S_M_D_2 (0x1 << 8)
859 #define RT5682S_I2S_M_D_3 (0x2 << 8)
860 #define RT5682S_I2S_M_D_4 (0x3 << 8)
861 #define RT5682S_I2S_M_D_6 (0x4 << 8)
862 #define RT5682S_I2S_M_D_8 (0x5 << 8)
863 #define RT5682S_I2S_M_D_12 (0x6 << 8)
864 #define RT5682S_I2S_M_D_16 (0x7 << 8)
865 #define RT5682S_I2S_M_D_24 (0x8 << 8)
866 #define RT5682S_I2S_M_D_32 (0x9 << 8)
867 #define RT5682S_I2S_M_D_48 (0x10 << 8)
891 #define RT5682S_TDM_TX_CH_MASK (0x3 << 12)
892 #define RT5682S_TDM_TX_CH_2 (0x0 << 12)
893 #define RT5682S_TDM_TX_CH_4 (0x1 << 12)
894 #define RT5682S_TDM_TX_CH_6 (0x2 << 12)
895 #define RT5682S_TDM_TX_CH_8 (0x3 << 12)
896 #define RT5682S_TDM_RX_CH_MASK (0x3 << 8)
897 #define RT5682S_TDM_RX_CH_2 (0x0 << 8)
898 #define RT5682S_TDM_RX_CH_4 (0x1 << 8)
899 #define RT5682S_TDM_RX_CH_6 (0x2 << 8)
900 #define RT5682S_TDM_RX_CH_8 (0x3 << 8)
908 #define RT5682S_IF1_ADC2_SEL_SFT 12
910 #define RT5682S_IF1_ADC4_SEL_SFT 8
933 #define RT5682S_TDM_BCLK_MS1_MASK (0x3 << 8)
934 #define RT5682S_TDM_BCLK_MS1_SFT 8
935 #define RT5682S_TDM_BCLK_MS1_32 (0x0 << 8)
936 #define RT5682S_TDM_BCLK_MS1_64 (0x1 << 8)
937 #define RT5682S_TDM_BCLK_MS1_128 (0x2 << 8)
938 #define RT5682S_TDM_BCLK_MS1_256 (0x3 << 8)
939 #define RT5682S_TDM_BCLK_MS1_16 (0x4 << 8)
961 #define RT5682S_PLL_SRC_MASK (0x3 << 8)
962 #define RT5682S_PLL_SRC_SFT 8
963 #define RT5682S_PLL_SRC_MCLK (0x0 << 8)
964 #define RT5682S_PLL_SRC_BCLK1 (0x1 << 8)
965 #define RT5682S_PLL_SRC_RC (0x3 << 8)
970 #define RT5682S_DAC_STO1_ASRC_MASK (0x1 << 12)
971 #define RT5682S_DAC_STO1_ASRC_SFT 12
972 #define RT5682S_AD_ASRC_MASK (0x1 << 8)
973 #define RT5682S_AD_ASRC_SFT 8
984 #define RT5682S_FILTER_CLK_SEL_MASK (0x7 << 12)
985 #define RT5682S_FILTER_CLK_SEL_SFT 12
986 #define RT5682S_FILTER_CLK_DIV_MASK (0xf << 8)
987 #define RT5682S_FILTER_CLK_DIV_SFT 8
992 #define RT5682S_ASRCIN_FTK_N2_MASK (0x3 << 12)
993 #define RT5682S_ASRCIN_FTK_N2_SFT 12
994 #define RT5682S_ASRCIN_FTK_M1_MASK (0x7 << 8)
995 #define RT5682S_ASRCIN_FTK_M1_SFT 8
1025 #define RT5682S_RAMP_MASK (0x1 << 12)
1026 #define RT5682S_RAMP_SFT 12
1027 #define RT5682S_RAMP_DIS (0x0 << 12)
1028 #define RT5682S_RAMP_EN (0x1 << 12)
1051 #define RT5682S_PM_HP_MASK (0x3 << 8)
1052 #define RT5682S_PM_HP_SFT 8
1053 #define RT5682S_PM_HP_LV (0x0 << 8)
1054 #define RT5682S_PM_HP_MV (0x1 << 8)
1055 #define RT5682S_PM_HP_HV (0x2 << 8)
1064 #define RT5682S_MIC2_OV_MASK (0x3 << 8)
1065 #define RT5682S_MIC2_OV_SFT 8
1066 #define RT5682S_MIC2_OV_2V7 (0x0 << 8)
1067 #define RT5682S_MIC2_OV_2V4 (0x1 << 8)
1068 #define RT5682S_MIC2_OV_2V25 (0x3 << 8)
1069 #define RT5682S_MIC2_OV_1V8 (0x4 << 8)
1076 #define RT5682S_PWR_CLK1M_MASK (0x1 << 8)
1077 #define RT5682S_PWR_CLK1M_SFT 8
1078 #define RT5682S_PWR_CLK1M_PD (0x0 << 8)
1079 #define RT5682S_PWR_CLK1M_PU (0x1 << 8)
1085 #define RT5682S_PLLA_M_MASK (0x1f << 8)
1086 #define RT5682S_PLLA_M_SFT 8
1093 #define RT5682S_PLLB_M_MASK (0x1f << 8)
1094 #define RT5682S_PLLB_M_SFT 8
1100 #define RT5682S_PLLB_BYP_PS_MASK (0x1 << 12)
1101 #define RT5682S_PLLB_BYP_PS_SFT 12
1169 #define RT5682S_GP2_PIN_MASK (0x3 << 12)
1170 #define RT5682S_GP2_PIN_SFT 12
1171 #define RT5682S_GP2_PIN_GPIO2 (0x0 << 12)
1172 #define RT5682S_GP2_PIN_LRCK2 (0x1 << 12)
1173 #define RT5682S_GP2_PIN_DMIC_SDA (0x2 << 12)
1179 #define RT5682S_GP4_PIN_MASK (0x3 << 8)
1180 #define RT5682S_GP4_PIN_SFT 8
1181 #define RT5682S_GP4_PIN_GPIO4 (0x0 << 8)
1182 #define RT5682S_GP4_PIN_ADCDAT1 (0x1 << 8)
1183 #define RT5682S_GP4_PIN_DMIC_CLK (0x2 << 8)
1184 #define RT5682S_GP4_PIN_ADCDAT2 (0x3 << 8)
1205 #define RT5682S_GP2_OUT_MASK (0x1 << 12)
1206 #define RT5682S_GP2_OUT_L (0x0 << 12)
1207 #define RT5682S_GP2_OUT_H (0x1 << 12)
1217 #define RT5682S_GP4_OUT_MASK (0x1 << 8)
1218 #define RT5682S_GP4_OUT_L (0x0 << 8)
1219 #define RT5682S_GP4_OUT_H (0x1 << 8)
1256 #define RT5682S_4BTN_IL_HOLD_WIN_MASK (0x7f << 8)
1257 #define RT5682S_4BTN_IL_HOLD_WIN_SFT 8
1284 #define RT5682S_PAD_DRV_GP2_MASK (0x1 << 12)
1285 #define RT5682S_PAD_DRV_GP2_HIGH (0x1 << 12)
1286 #define RT5682S_PAD_DRV_GP2_LOW (0x0 << 12)
1290 #define RT5682S_PAD_DRV_GP4_MASK (0x1 << 8)
1291 #define RT5682S_PAD_DRV_GP4_HIGH (0x1 << 8)
1292 #define RT5682S_PAD_DRV_GP4_LOW (0x0 << 8)
1303 #define RT5682S_CKGEN_DAC1_MASK (0x1 << 12)
1304 #define RT5682S_CKGEN_DAC1_SFT 12
1309 #define RT5682S_CKGEN_ADC1_MASK (0x1 << 12)
1310 #define RT5682S_CKGEN_ADC1_SFT 12
1347 #define RT5682S_SAR_POW_MASK (0x1 << 12)
1348 #define RT5682S_SAR_POW_EN (0x1 << 12)
1349 #define RT5682S_SAR_POW_DIS (0x0 << 12)
1356 #define RT5682S_SAR_SEL_MB1_2_MASK (0x3 << 8)
1357 #define RT5682S_SAR_SEL_MB1_2_SFT 8