Lines Matching +full:11 +full:- +full:14
1 /* SPDX-License-Identifier: GPL-2.0-only */
3 * rt5670.h -- RT5670 ALSA SoC audio driver
17 /* I/O - Output */
20 /* I/O - Input */
26 /* I/O - ADC/DAC/DMIC */
34 /* Mixer - D-D */
47 /* Mixer - PDM */
56 /* Mixer - ADC */
61 /* Mixer - DAC */
77 /* Format - ADC/DAC */
86 /* Format - TDM Control */
91 /* Function - Analog */
121 /* Function - Digital */
237 #define RT5670_CAPLESS_EN (0x1 << 11)
309 #define RT5670_STO1_ADC_L_BST_MASK (0x3 << 14)
310 #define RT5670_STO1_ADC_L_BST_SFT 14
327 #define RT5670_M_ADC_L1 (0x1 << 14)
328 #define RT5670_M_ADC_L1_SFT 14
335 #define RT5670_ADC_2_SRC_MASK (0x1 << 11)
336 #define RT5670_ADC_2_SRC_SFT 11
349 #define RT5670_M_MONO_ADC_L1 (0x1 << 14)
350 #define RT5670_M_MONO_ADC_L1_SFT 14
357 #define RT5670_MONO_ADC_L2_SRC_MASK (0x1 << 11)
358 #define RT5670_MONO_ADC_L2_SRC_SFT 11
379 #define RT5670_M_DAC1_L (0x1 << 14)
380 #define RT5670_M_DAC1_L_SFT 14
399 #define RT5670_M_DAC_L1 (0x1 << 14)
400 #define RT5670_M_DAC_L1_SFT 14
405 #define RT5670_DAC_L2_STO_L_VOL_MASK (0x1 << 11)
406 #define RT5670_DAC_L2_STO_L_VOL_SFT 11
425 #define RT5670_M_DAC_L1_MONO_L (0x1 << 14)
426 #define RT5670_M_DAC_L1_MONO_L_SFT 14
431 #define RT5670_DAC_L2_MONO_L_VOL_MASK (0x1 << 11)
432 #define RT5670_DAC_L2_MONO_L_VOL_SFT 11
453 #define RT5670_STO_L_DAC_L_VOL_MASK (0x1 << 14)
454 #define RT5670_STO_L_DAC_L_VOL_SFT 14
459 #define RT5670_M_STO_R_DAC_R (0x1 << 11)
460 #define RT5670_M_STO_R_DAC_R_SFT 11
479 #define RT5670_RXDP_SRC_MASK (0x3 << 11)
480 #define RT5670_RXDP_SRC_SFT 11
481 #define RT5670_RXDP_SRC_NOR (0x0 << 11)
482 #define RT5670_RXDP_SRC_DIV2 (0x1 << 11)
483 #define RT5670_RXDP_SRC_DIV3 (0x2 << 11)
519 #define RT5670_M_PDM1_L (0x1 << 14)
520 #define RT5670_M_PDM1_L_SFT 14
525 #define RT5670_PDM2_L_MASK (0x1 << 11)
526 #define RT5670_PDM2_L_SFT 11
586 #define RT5670_M_HPVOL_HM (0x1 << 14)
587 #define RT5670_M_HPVOL_HM_SFT 14
604 #define RT5670_M_DAC_L2_MA (0x1 << 14)
605 #define RT5670_M_DAC_L2_MA_SFT 14
682 #define RT5670_M_DAC_R1_LM (0x1 << 14)
683 #define RT5670_M_DAC_R1_LM_SFT 14
688 #define RT5670_G_LOUTMIX_MASK (0x1 << 11)
689 #define RT5670_G_LOUTMIX_SFT 11
694 #define RT5670_PWR_I2S2 (0x1 << 14)
695 #define RT5670_PWR_I2S2_BIT 14
698 #define RT5670_PWR_DAC_R1 (0x1 << 11)
699 #define RT5670_PWR_DAC_R1_BIT 11
714 #define RT5670_PWR_ADC_MF_L (0x1 << 14)
715 #define RT5670_PWR_ADC_MF_L_BIT 14
720 #define RT5670_PWR_DAC_S1F (0x1 << 11)
721 #define RT5670_PWR_DAC_S1F_BIT 11
736 #define RT5670_PWR_FV1 (0x1 << 14)
737 #define RT5670_PWR_FV1_BIT 14
742 #define RT5670_PWR_BG (0x1 << 11)
743 #define RT5670_PWR_BG_BIT 11
762 #define RT5670_PWR_MB1 (0x1 << 11)
763 #define RT5670_PWR_MB1_BIT 11
780 #define RT5670_PWR_OM_R (0x1 << 14)
781 #define RT5670_PWR_OM_R_BIT 14
782 #define RT5670_PWR_RM_L (0x1 << 11)
783 #define RT5670_PWR_RM_L_BIT 11
788 #define RT5670_PWR_HV_L (0x1 << 11)
789 #define RT5670_PWR_HV_L_BIT 11
854 #define RT5670_I2S_BCLK_MS2_MASK (0x1 << 11)
855 #define RT5670_I2S_BCLK_MS2_SFT 11
856 #define RT5670_I2S_BCLK_MS2_32 (0x0 << 11)
857 #define RT5670_I2S_BCLK_MS2_64 (0x1 << 11)
896 #define RT5670_DAC_L_OSR_MASK (0x3 << 14)
897 #define RT5670_DAC_L_OSR_SFT 14
898 #define RT5670_DAC_L_OSR_128 (0x0 << 14)
899 #define RT5670_DAC_L_OSR_64 (0x1 << 14)
900 #define RT5670_DAC_L_OSR_32 (0x2 << 14)
901 #define RT5670_DAC_L_OSR_16 (0x3 << 14)
908 #define RT5670_DAHPF_EN (0x1 << 11)
909 #define RT5670_DAHPF_EN_SFT 11
918 #define RT5670_DMIC_2_EN_MASK (0x1 << 14)
919 #define RT5670_DMIC_2_EN_SFT 14
920 #define RT5670_DMIC_2_DIS (0x0 << 14)
921 #define RT5670_DMIC_2_EN (0x1 << 14)
962 #define RT5670_SCLK_SRC_MASK (0x3 << 14)
963 #define RT5670_SCLK_SRC_SFT 14
964 #define RT5670_SCLK_SRC_MCLK (0x0 << 14)
965 #define RT5670_SCLK_SRC_PLL1 (0x1 << 14)
966 #define RT5670_SCLK_SRC_RCCLK (0x2 << 14) /* 15MHz */
967 #define RT5670_PLL1_SRC_MASK (0x7 << 11)
968 #define RT5670_PLL1_SRC_SFT 11
969 #define RT5670_PLL1_SRC_MCLK (0x0 << 11)
970 #define RT5670_PLL1_SRC_BCLK1 (0x1 << 11)
971 #define RT5670_PLL1_SRC_BCLK2 (0x2 << 11)
972 #define RT5670_PLL1_SRC_BCLK3 (0x3 << 11)
992 #define RT5670_PLL_M_BP (0x1 << 11)
993 #define RT5670_PLL_M_BP_SFT 11
1000 #define RT5670_M1_T_MASK (0x1 << 14)
1001 #define RT5670_M1_T_SFT 14
1002 #define RT5670_M1_T_I2S2 (0x0 << 14)
1003 #define RT5670_M1_T_I2S2_D3 (0x1 << 14)
1078 #define RT5670_CLSD_OM_MASK (0x1 << 11)
1079 #define RT5670_CLSD_OM_SFT 11
1080 #define RT5670_CLSD_OM_MONO (0x0 << 11)
1081 #define RT5670_CLSD_OM_STO (0x1 << 11)
1142 #define RT5670_BPS_MASK (0x1 << 11)
1143 #define RT5670_BPS_SFT 11
1144 #define RT5670_BPS_DIS (0x0 << 11)
1145 #define RT5670_BPS_EN (0x1 << 11)
1186 #define RT5670_OSW_L_MASK (0x1 << 11)
1187 #define RT5670_OSW_L_SFT 11
1188 #define RT5670_OSW_L_DIS (0x0 << 11)
1189 #define RT5670_OSW_L_EN (0x1 << 11)
1211 #define RT5670_SPK_AG_MASK (0x1 << 14)
1212 #define RT5670_SPK_AG_SFT 14
1213 #define RT5670_SPK_AG_DIS (0x0 << 14)
1214 #define RT5670_SPK_AG_EN (0x1 << 14)
1221 #define RT5670_MIC2_BS_MASK (0x1 << 14)
1222 #define RT5670_MIC2_BS_SFT 14
1223 #define RT5670_MIC2_BS_9AV (0x0 << 14)
1224 #define RT5670_MIC2_BS_75AV (0x1 << 14)
1233 #define RT5670_MIC1_OVCD_MASK (0x1 << 11)
1234 #define RT5670_MIC1_OVCD_SFT 11
1235 #define RT5670_MIC1_OVCD_DIS (0x0 << 11)
1236 #define RT5670_MIC1_OVCD_EN (0x1 << 11)
1275 #define RT5670_EQ_UPD (0x1 << 14)
1276 #define RT5670_EQ_UPD_BIT 14
1338 #define RT5670_DRC_AGC_MASK (0x1 << 14)
1339 #define RT5670_DRC_AGC_SFT 14
1340 #define RT5670_DRC_AGC_DIS (0x0 << 14)
1341 #define RT5670_DRC_AGC_EN (0x1 << 14)
1399 #define RT5670_JD_HP_MASK (0x1 << 11)
1400 #define RT5670_JD_HP_SFT 11
1401 #define RT5670_JD_HP_DIS (0x0 << 11)
1402 #define RT5670_JD_HP_EN (0x1 << 11)
1453 #define RT5670_IRQ_OT_MASK (0x1 << 14)
1454 #define RT5670_IRQ_OT_SFT 14
1455 #define RT5670_IRQ_OT_BP (0x0 << 14)
1456 #define RT5670_IRQ_OT_NOR (0x1 << 14)
1465 #define RT5670_JD_P_MASK (0x1 << 11)
1466 #define RT5670_JD_P_SFT 11
1467 #define RT5670_JD_P_NOR (0x0 << 11)
1468 #define RT5670_JD_P_INV (0x1 << 11)
1483 #define RT5670_IRQ_MB2_OC_MASK (0x1 << 14)
1484 #define RT5670_IRQ_MB2_OC_SFT 14
1485 #define RT5670_IRQ_MB2_OC_BP (0x0 << 14)
1486 #define RT5670_IRQ_MB2_OC_NOR (0x1 << 14)
1487 #define RT5670_MB1_OC_STKY_MASK (0x1 << 11)
1488 #define RT5670_MB1_OC_STKY_SFT 11
1489 #define RT5670_MB1_OC_STKY_DIS (0x0 << 11)
1490 #define RT5670_MB1_OC_STKY_EN (0x1 << 11)
1513 #define RT5670_GP2_PIN_MASK (0x1 << 14)
1514 #define RT5670_GP2_PIN_SFT 14
1515 #define RT5670_GP2_PIN_GPIO2 (0x0 << 14)
1516 #define RT5670_GP2_PIN_DMIC1_SCL (0x1 << 14)
1522 #define RT5670_GP4_PIN_MASK (0x1 << 11)
1523 #define RT5670_GP4_PIN_SFT 11
1524 #define RT5670_GP4_PIN_GPIO4 (0x0 << 11)
1525 #define RT5670_GP4_PIN_DMIC2_SDA (0x1 << 11)
1566 #define RT5670_GP4_PF_MASK (0x1 << 11)
1567 #define RT5670_GP4_PF_SFT 11
1568 #define RT5670_GP4_PF_IN (0x0 << 11)
1569 #define RT5670_GP4_PF_OUT (0x1 << 11)
1624 #define RT5670_SCB_MASK (0x1 << 14)
1625 #define RT5670_SCB_SFT 14
1626 #define RT5670_SCB_DIS (0x0 << 14)
1627 #define RT5670_SCB_EN (0x1 << 14)
1654 #define RT5670_M_MP3_R_MASK (0x1 << 14)
1655 #define RT5670_M_MP3_R_SFT 14
1686 #define RT5670_3D_HP_MASK (0x1 << 14)
1687 #define RT5670_3D_HP_SFT 14
1688 #define RT5670_3D_HP_DIS (0x0 << 14)
1689 #define RT5670_3D_HP_EN (0x1 << 14)
1694 #define RT5670_3D_1F_MIX_MASK (0x3 << 11)
1695 #define RT5670_3D_1F_MIX_SFT 11
1716 #define RT5670_1ST_HPF_MASK (0x1 << 11)
1717 #define RT5670_1ST_HPF_SFT 11
1718 #define RT5670_1ST_HPF_DIS (0x0 << 11)
1719 #define RT5670_1ST_HPF_EN (0x1 << 11)
1732 #define RT5670_SI_DAC_MASK (0x1 << 11)
1733 #define RT5670_SI_DAC_SFT 11
1734 #define RT5670_SI_DAC_AUTO (0x0 << 11)
1735 #define RT5670_SI_DAC_TEST (0x1 << 11)
1773 #define RT5670_SPO_SV_MASK (0x1 << 14)
1774 #define RT5670_SPO_SV_SFT 14
1775 #define RT5670_SPO_SV_DIS (0x0 << 14)
1776 #define RT5670_SPO_SV_EN (0x1 << 14)
1785 #define RT5670_ZCD_DIG_MASK (0x1 << 11)
1786 #define RT5670_ZCD_DIG_SFT 11
1787 #define RT5670_ZCD_DIG_DIS (0x0 << 11)
1788 #define RT5670_ZCD_DIG_EN (0x1 << 11)
1811 #define RT5670_TDM_DATA_MODE_SEL (0x1 << 11)
1812 #define RT5670_TDM_DATA_MODE_NOR (0x0 << 11)
1813 #define RT5670_TDM_DATA_MODE_50FS (0x1 << 11)
1855 #define RT5670_WND_WIND_MASK (0x1 << 13) /* Read-Only */
1857 #define RT5670_WND_STRONG_MASK (0x1 << 12) /* Read-Only */
1866 #define RT5670_DP_ATT_MASK (0x3 << 14)
1867 #define RT5670_DP_ATT_SFT 14
1908 #define RT5670_IF1_ADC1_IN2_SEL (0x1 << 11)
1909 #define RT5670_IF1_ADC1_IN2_SFT 11