Lines Matching +full:10 +full:- +full:14
1 /* SPDX-License-Identifier: GPL-2.0-only */
3 * rt5670.h -- RT5670 ALSA SoC audio driver
17 /* I/O - Output */
20 /* I/O - Input */
26 /* I/O - ADC/DAC/DMIC */
34 /* Mixer - D-D */
47 /* Mixer - PDM */
56 /* Mixer - ADC */
61 /* Mixer - DAC */
77 /* Format - ADC/DAC */
86 /* Format - TDM Control */
91 /* Function - Analog */
121 /* Function - Digital */
309 #define RT5670_STO1_ADC_L_BST_MASK (0x3 << 14)
310 #define RT5670_STO1_ADC_L_BST_SFT 14
313 #define RT5670_STO1_ADC_COMP_MASK (0x3 << 10)
314 #define RT5670_STO1_ADC_COMP_SFT 10
327 #define RT5670_M_ADC_L1 (0x1 << 14)
328 #define RT5670_M_ADC_L1_SFT 14
337 #define RT5670_ADC_SRC_MASK (0x1 << 10)
338 #define RT5670_ADC_SRC_SFT 10
349 #define RT5670_M_MONO_ADC_L1 (0x1 << 14)
350 #define RT5670_M_MONO_ADC_L1_SFT 14
359 #define RT5670_MONO_ADC_L_SRC_MASK (0x1 << 10)
360 #define RT5670_MONO_ADC_L_SRC_SFT 10
379 #define RT5670_M_DAC1_L (0x1 << 14)
380 #define RT5670_M_DAC1_L_SFT 14
381 #define RT5670_DAC1_R_SEL_MASK (0x3 << 10)
382 #define RT5670_DAC1_R_SEL_SFT 10
383 #define RT5670_DAC1_R_SEL_IF1 (0x0 << 10)
384 #define RT5670_DAC1_R_SEL_IF2 (0x1 << 10)
385 #define RT5670_DAC1_R_SEL_IF3 (0x2 << 10)
386 #define RT5670_DAC1_R_SEL_IF4 (0x3 << 10)
399 #define RT5670_M_DAC_L1 (0x1 << 14)
400 #define RT5670_M_DAC_L1_SFT 14
425 #define RT5670_M_DAC_L1_MONO_L (0x1 << 14)
426 #define RT5670_M_DAC_L1_MONO_L_SFT 14
433 #define RT5670_M_DAC_R2_MONO_L (0x1 << 10)
434 #define RT5670_M_DAC_R2_MONO_L_SFT 10
453 #define RT5670_STO_L_DAC_L_VOL_MASK (0x1 << 14)
454 #define RT5670_STO_L_DAC_L_VOL_SFT 14
461 #define RT5670_STO_R_DAC_R_VOL_MASK (0x1 << 10)
462 #define RT5670_STO_R_DAC_R_VOL_SFT 10
507 #define RT5670_IF2_DAC_SEL_MASK (0x3 << 10)
508 #define RT5670_IF2_DAC_SEL_SFT 10
519 #define RT5670_M_PDM1_L (0x1 << 14)
520 #define RT5670_M_PDM1_L_SFT 14
527 #define RT5670_M_PDM2_L (0x1 << 10)
528 #define RT5670_M_PDM2_L_SFT 10
542 #define RT5670_G_IN_L_RM_L_MASK (0x7 << 10)
543 #define RT5670_G_IN_L_RM_L_SFT 10
564 #define RT5670_G_IN_R_RM_R_MASK (0x7 << 10)
565 #define RT5670_G_IN_R_RM_R_SFT 10
586 #define RT5670_M_HPVOL_HM (0x1 << 14)
587 #define RT5670_M_HPVOL_HM_SFT 14
604 #define RT5670_M_DAC_L2_MA (0x1 << 14)
605 #define RT5670_M_DAC_L2_MA_SFT 14
610 #define RT5670_G_MONOMIX_MASK (0x1 << 10)
611 #define RT5670_G_MONOMIX_SFT 10
622 #define RT5670_G_BST2_OM_L_MASK (0x7 << 10)
623 #define RT5670_G_BST2_OM_L_SFT 10
634 #define RT5670_G_DAC_L2_OM_L_MASK (0x7 << 10)
635 #define RT5670_G_DAC_L2_OM_L_SFT 10
652 #define RT5670_G_BST2_OM_R_MASK (0x7 << 10)
653 #define RT5670_G_BST2_OM_R_SFT 10
664 #define RT5670_G_DAC_R2_OM_R_MASK (0x7 << 10)
665 #define RT5670_G_DAC_R2_OM_R_SFT 10
682 #define RT5670_M_DAC_R1_LM (0x1 << 14)
683 #define RT5670_M_DAC_R1_LM_SFT 14
694 #define RT5670_PWR_I2S2 (0x1 << 14)
695 #define RT5670_PWR_I2S2_BIT 14
714 #define RT5670_PWR_ADC_MF_L (0x1 << 14)
715 #define RT5670_PWR_ADC_MF_L_BIT 14
722 #define RT5670_PWR_DAC_MF_L (0x1 << 10)
723 #define RT5670_PWR_DAC_MF_L_BIT 10
736 #define RT5670_PWR_FV1 (0x1 << 14)
737 #define RT5670_PWR_FV1_BIT 14
764 #define RT5670_PWR_MB2 (0x1 << 10)
765 #define RT5670_PWR_MB2_BIT 10
780 #define RT5670_PWR_OM_R (0x1 << 14)
781 #define RT5670_PWR_OM_R_BIT 14
784 #define RT5670_PWR_RM_R (0x1 << 10)
785 #define RT5670_PWR_RM_R_BIT 10
790 #define RT5670_PWR_HV_R (0x1 << 10)
791 #define RT5670_PWR_HV_R_BIT 10
806 #define RT5670_I2S_O_CP_MASK (0x3 << 10)
807 #define RT5670_I2S_O_CP_SFT 10
808 #define RT5670_I2S_O_CP_OFF (0x0 << 10)
809 #define RT5670_I2S_O_CP_U_LAW (0x1 << 10)
810 #define RT5670_I2S_O_CP_A_LAW (0x2 << 10)
896 #define RT5670_DAC_L_OSR_MASK (0x3 << 14)
897 #define RT5670_DAC_L_OSR_SFT 14
898 #define RT5670_DAC_L_OSR_128 (0x0 << 14)
899 #define RT5670_DAC_L_OSR_64 (0x1 << 14)
900 #define RT5670_DAC_L_OSR_32 (0x2 << 14)
901 #define RT5670_DAC_L_OSR_16 (0x3 << 14)
910 #define RT5670_ADHPF_EN (0x1 << 10)
911 #define RT5670_ADHPF_EN_SFT 10
918 #define RT5670_DMIC_2_EN_MASK (0x1 << 14)
919 #define RT5670_DMIC_2_EN_SFT 14
920 #define RT5670_DMIC_2_DIS (0x0 << 14)
921 #define RT5670_DMIC_2_EN (0x1 << 14)
930 #define RT5670_DMIC_2_DP_MASK (0x1 << 10)
931 #define RT5670_DMIC_2_DP_SFT 10
932 #define RT5670_DMIC_2_DP_GPIO8 (0x0 << 10)
933 #define RT5670_DMIC_2_DP_IN3N (0x1 << 10)
962 #define RT5670_SCLK_SRC_MASK (0x3 << 14)
963 #define RT5670_SCLK_SRC_SFT 14
964 #define RT5670_SCLK_SRC_MCLK (0x0 << 14)
965 #define RT5670_SCLK_SRC_PLL1 (0x1 << 14)
966 #define RT5670_SCLK_SRC_RCCLK (0x2 << 14) /* 15MHz */
1000 #define RT5670_M1_T_MASK (0x1 << 14)
1001 #define RT5670_M1_T_SFT 14
1002 #define RT5670_M1_T_I2S2 (0x0 << 14)
1003 #define RT5670_M1_T_I2S2_D3 (0x1 << 14)
1052 #define RT5670_HP_OVCD_MASK (0x1 << 10)
1053 #define RT5670_HP_OVCD_SFT 10
1054 #define RT5670_HP_OVCD_DIS (0x0 << 10)
1055 #define RT5670_HP_OVCD_EN (0x1 << 10)
1082 #define RT5670_CLSD_SCH_MASK (0x1 << 10)
1083 #define RT5670_CLSD_SCH_SFT 10
1084 #define RT5670_CLSD_SCH_L (0x0 << 10)
1085 #define RT5670_CLSD_SCH_S (0x1 << 10)
1146 #define RT5670_FAST_UPDN_MASK (0x1 << 10)
1147 #define RT5670_FAST_UPDN_SFT 10
1148 #define RT5670_FAST_UPDN_DIS (0x0 << 10)
1149 #define RT5670_FAST_UPDN_EN (0x1 << 10)
1190 #define RT5670_OSW_R_MASK (0x1 << 10)
1191 #define RT5670_OSW_R_SFT 10
1192 #define RT5670_OSW_R_DIS (0x0 << 10)
1193 #define RT5670_OSW_R_EN (0x1 << 10)
1211 #define RT5670_SPK_AG_MASK (0x1 << 14)
1212 #define RT5670_SPK_AG_SFT 14
1213 #define RT5670_SPK_AG_DIS (0x0 << 14)
1214 #define RT5670_SPK_AG_EN (0x1 << 14)
1221 #define RT5670_MIC2_BS_MASK (0x1 << 14)
1222 #define RT5670_MIC2_BS_SFT 14
1223 #define RT5670_MIC2_BS_9AV (0x0 << 14)
1224 #define RT5670_MIC2_BS_75AV (0x1 << 14)
1275 #define RT5670_EQ_UPD (0x1 << 14)
1276 #define RT5670_EQ_UPD_BIT 14
1338 #define RT5670_DRC_AGC_MASK (0x1 << 14)
1339 #define RT5670_DRC_AGC_SFT 14
1340 #define RT5670_DRC_AGC_DIS (0x0 << 14)
1341 #define RT5670_DRC_AGC_EN (0x1 << 14)
1403 #define RT5670_JD_HP_TRG_MASK (0x1 << 10)
1404 #define RT5670_JD_HP_TRG_SFT 10
1405 #define RT5670_JD_HP_TRG_LO (0x0 << 10)
1406 #define RT5670_JD_HP_TRG_HI (0x1 << 10)
1453 #define RT5670_IRQ_OT_MASK (0x1 << 14)
1454 #define RT5670_IRQ_OT_SFT 14
1455 #define RT5670_IRQ_OT_BP (0x0 << 14)
1456 #define RT5670_IRQ_OT_NOR (0x1 << 14)
1469 #define RT5670_OT_P_MASK (0x1 << 10)
1470 #define RT5670_OT_P_SFT 10
1471 #define RT5670_OT_P_NOR (0x0 << 10)
1472 #define RT5670_OT_P_INV (0x1 << 10)
1483 #define RT5670_IRQ_MB2_OC_MASK (0x1 << 14)
1484 #define RT5670_IRQ_MB2_OC_SFT 14
1485 #define RT5670_IRQ_MB2_OC_BP (0x0 << 14)
1486 #define RT5670_IRQ_MB2_OC_NOR (0x1 << 14)
1491 #define RT5670_MB2_OC_STKY_MASK (0x1 << 10)
1492 #define RT5670_MB2_OC_STKY_SFT 10
1493 #define RT5670_MB2_OC_STKY_DIS (0x0 << 10)
1494 #define RT5670_MB2_OC_STKY_EN (0x1 << 10)
1513 #define RT5670_GP2_PIN_MASK (0x1 << 14)
1514 #define RT5670_GP2_PIN_SFT 14
1515 #define RT5670_GP2_PIN_GPIO2 (0x0 << 14)
1516 #define RT5670_GP2_PIN_DMIC1_SCL (0x1 << 14)
1526 #define RT5670_DP_SIG_MASK (0x1 << 10)
1527 #define RT5670_DP_SIG_SFT 10
1528 #define RT5670_DP_SIG_TEST (0x0 << 10)
1529 #define RT5670_DP_SIG_AP (0x1 << 10)
1570 #define RT5670_GP4_OUT_MASK (0x1 << 10)
1571 #define RT5670_GP4_OUT_SFT 10
1572 #define RT5670_GP4_OUT_LO (0x0 << 10)
1573 #define RT5670_GP4_OUT_HI (0x1 << 10)
1624 #define RT5670_SCB_MASK (0x1 << 14)
1625 #define RT5670_SCB_SFT 14
1626 #define RT5670_SCB_DIS (0x0 << 14)
1627 #define RT5670_SCB_EN (0x1 << 14)
1654 #define RT5670_M_MP3_R_MASK (0x1 << 14)
1655 #define RT5670_M_MP3_R_SFT 14
1686 #define RT5670_3D_HP_MASK (0x1 << 14)
1687 #define RT5670_3D_HP_SFT 14
1688 #define RT5670_3D_HP_DIS (0x0 << 14)
1689 #define RT5670_3D_HP_EN (0x1 << 14)
1696 #define RT5670_3D_HP_M_MASK (0x1 << 10)
1697 #define RT5670_3D_HP_M_SFT 10
1698 #define RT5670_3D_HP_M_SUR (0x0 << 10)
1699 #define RT5670_3D_HP_M_FRO (0x1 << 10)
1736 #define RT5670_DC_CAL_M_MASK (0x1 << 10)
1737 #define RT5670_DC_CAL_M_SFT 10
1738 #define RT5670_DC_CAL_M_CAL (0x0 << 10)
1739 #define RT5670_DC_CAL_M_NOR (0x1 << 10)
1773 #define RT5670_SPO_SV_MASK (0x1 << 14)
1774 #define RT5670_SPO_SV_SFT 14
1775 #define RT5670_SPO_SV_DIS (0x0 << 14)
1776 #define RT5670_SPO_SV_EN (0x1 << 14)
1789 #define RT5670_ZCD_MASK (0x1 << 10)
1790 #define RT5670_ZCD_SFT 10
1791 #define RT5670_ZCD_PD (0x0 << 10)
1792 #define RT5670_ZCD_PU (0x1 << 10)
1835 #define RT5670_WND_FC_NW_MASK (0x3f << 10)
1836 #define RT5670_WND_FC_NW_SFT 10
1855 #define RT5670_WND_WIND_MASK (0x1 << 13) /* Read-Only */
1857 #define RT5670_WND_STRONG_MASK (0x1 << 12) /* Read-Only */
1866 #define RT5670_DP_ATT_MASK (0x3 << 14)
1867 #define RT5670_DP_ATT_SFT 14
1868 #define RT5670_DP_SPK_MASK (0x1 << 10)
1869 #define RT5670_DP_SPK_SFT 10
1870 #define RT5670_DP_SPK_DIS (0x0 << 10)
1871 #define RT5670_DP_SPK_EN (0x1 << 10)
1910 #define RT5670_IF1_ADC2_IN1_SEL (0x1 << 10)
1911 #define RT5670_IF1_ADC2_IN1_SFT 10