Lines Matching +full:out +full:- +full:mono
1 // SPDX-License-Identifier: GPL-2.0-only
3 * rt5659.c -- RT5659/RT5658 ALSA SoC audio codec driver
25 #include <sound/soc-dapm.h>
1136 static const DECLARE_TLV_DB_SCALE(hp_vol_tlv, -2325, 75, 0);
1137 static const DECLARE_TLV_DB_SCALE(out_vol_tlv, -4650, 150, 0);
1138 static const DECLARE_TLV_DB_SCALE(dac_vol_tlv, -65625, 375, 0);
1139 static const DECLARE_TLV_DB_SCALE(in_vol_tlv, -3450, 150, 0);
1140 static const DECLARE_TLV_DB_SCALE(adc_vol_tlv, -17625, 375, 0);
1142 static const DECLARE_TLV_DB_SCALE(in_bst_tlv, -1200, 75, 0);
1249 * rt5659_headset_detect - Detect headset.
1296 rt5659->jack_type = SND_JACK_HEADSET; in rt5659_headset_detect()
1301 rt5659->jack_type = SND_JACK_HEADPHONE; in rt5659_headset_detect()
1309 if (rt5659->jack_type == SND_JACK_HEADSET) in rt5659_headset_detect()
1311 rt5659->jack_type = 0; in rt5659_headset_detect()
1314 dev_dbg(component->dev, "jack_type = %d\n", rt5659->jack_type); in rt5659_headset_detect()
1315 return rt5659->jack_type; in rt5659_headset_detect()
1334 &rt5659->jack_detect_work, msecs_to_jiffies(250)); in rt5659_irq()
1344 rt5659->hs_jack = hs_jack; in rt5659_set_jack_detect()
1358 if (!rt5659->component) in rt5659_jack_detect_work()
1361 val = snd_soc_component_read(rt5659->component, RT5659_INT_ST_1) & 0x0080; in rt5659_jack_detect_work()
1364 if (rt5659->jack_type == 0) { in rt5659_jack_detect_work()
1365 /* jack was out, report jack type */ in rt5659_jack_detect_work()
1366 report = rt5659_headset_detect(rt5659->component, 1); in rt5659_jack_detect_work()
1370 btn_type = rt5659_button_detect(rt5659->component); in rt5659_jack_detect_work()
1403 dev_err(rt5659->component->dev, in rt5659_jack_detect_work()
1411 report = rt5659->jack_type; in rt5659_jack_detect_work()
1414 /* jack out */ in rt5659_jack_detect_work()
1415 report = rt5659_headset_detect(rt5659->component, 0); in rt5659_jack_detect_work()
1418 snd_soc_jack_report(rt5659->hs_jack, report, SND_JACK_HEADSET | in rt5659_jack_detect_work()
1430 if (!rt5659->hs_jack) in rt5659_jack_detect_intel_hd_header()
1434 regmap_read(rt5659->regmap, RT5659_GPIO_STA, &value); in rt5659_jack_detect_intel_hd_header()
1437 if (hp_flag != rt5659->hda_hp_plugged) { in rt5659_jack_detect_intel_hd_header()
1438 rt5659->hda_hp_plugged = hp_flag; in rt5659_jack_detect_intel_hd_header()
1441 regmap_update_bits(rt5659->regmap, RT5659_IRQ_CTRL_1, in rt5659_jack_detect_intel_hd_header()
1443 rt5659->jack_type |= SND_JACK_HEADPHONE; in rt5659_jack_detect_intel_hd_header()
1445 regmap_update_bits(rt5659->regmap, RT5659_IRQ_CTRL_1, in rt5659_jack_detect_intel_hd_header()
1447 rt5659->jack_type = rt5659->jack_type & in rt5659_jack_detect_intel_hd_header()
1451 snd_soc_jack_report(rt5659->hs_jack, rt5659->jack_type, in rt5659_jack_detect_intel_hd_header()
1456 regmap_read(rt5659->regmap, RT5659_4BTN_IL_CMD_1, &value); in rt5659_jack_detect_intel_hd_header()
1457 regmap_write(rt5659->regmap, RT5659_4BTN_IL_CMD_1, value); in rt5659_jack_detect_intel_hd_header()
1460 if (mic_flag != rt5659->hda_mic_plugged) { in rt5659_jack_detect_intel_hd_header()
1461 rt5659->hda_mic_plugged = mic_flag; in rt5659_jack_detect_intel_hd_header()
1463 regmap_update_bits(rt5659->regmap, RT5659_IRQ_CTRL_2, in rt5659_jack_detect_intel_hd_header()
1465 rt5659->jack_type |= SND_JACK_MICROPHONE; in rt5659_jack_detect_intel_hd_header()
1467 regmap_update_bits(rt5659->regmap, RT5659_IRQ_CTRL_2, in rt5659_jack_detect_intel_hd_header()
1469 rt5659->jack_type = rt5659->jack_type in rt5659_jack_detect_intel_hd_header()
1473 snd_soc_jack_report(rt5659->hs_jack, rt5659->jack_type, in rt5659_jack_detect_intel_hd_header()
1488 /* Mono Output Volume */
1489 SOC_SINGLE_TLV("Mono Playback Volume", RT5659_MONO_OUT,
1493 SOC_DOUBLE_TLV("OUT Playback Volume", RT5659_LOUT,
1526 SOC_DOUBLE("Mono ADC Capture Switch", RT5659_MONO_ADC_DIG_VOL,
1528 SOC_DOUBLE_TLV("Mono ADC Capture Volume", RT5659_MONO_ADC_DIG_VOL,
1540 SOC_DOUBLE_TLV("Mono ADC Boost Gain Volume", RT5659_MONO_BOOST,
1555 * set_dmic_clk - Set parameter of dmic.
1567 struct snd_soc_component *component = snd_soc_dapm_to_component(w->dapm); in set_dmic_clk()
1571 pd = rl6231_get_pre_div(rt5659->regmap, in set_dmic_clk()
1573 idx = rl6231_calc_dmic_clk(rt5659->sysclk / pd); in set_dmic_clk()
1576 dev_err(component->dev, "Failed to set DMIC clock\n"); in set_dmic_clk()
1587 struct snd_soc_component *component = snd_soc_dapm_to_component(w->dapm); in set_adc1_clk()
1613 snd_soc_dapm_to_component(w->dapm); in set_adc2_clk()
1638 struct snd_soc_component *component = snd_soc_dapm_to_component(w->dapm); in rt5659_charge_pump_event()
1659 struct snd_soc_component *component = snd_soc_dapm_to_component(w->dapm); in is_sys_clk_from_pll()
1673 struct snd_soc_component *component = snd_soc_dapm_to_component(w->dapm); in is_using_asrc()
1675 switch (w->shift) { in is_using_asrc()
1968 /*MX-1B [6:4], MX-1B [2:0]*/
1970 "IF1 DAC2", "IF2 DAC", "IF3 DAC", "Mono ADC MIX"
1989 /* MX-26 [13] */
2002 /* MX-26 [12] */
2015 /* MX-26 [11] */
2028 /* MX-26 [8] */
2041 /* MONO ADC L2 Source */
2042 /* MX-27 [12] */
2044 "Mono DAC MIXL", "DMIC"
2052 SOC_DAPM_ENUM("Mono ADC L2 Source", rt5659_mono_adc_l2_enum);
2055 /* MONO ADC L1 Source */
2056 /* MX-27 [11] */
2058 "Mono DAC MIXL", "ADC"
2066 SOC_DAPM_ENUM("Mono ADC L1 Source", rt5659_mono_adc_l1_enum);
2068 /* MONO ADC L Source, MONO ADC R Source*/
2069 /* MX-27 [10:9], MX-27 [2:1] */
2079 SOC_DAPM_ENUM("Mono ADC L Source", rt5659_mono_adc_l_enum);
2086 SOC_DAPM_ENUM("Mono ADC R Source", rt5659_mono_adcr_enum);
2088 /* MONO DMIC L Source */
2089 /* MX-27 [8] */
2099 SOC_DAPM_ENUM("Mono DMIC L Source", rt5659_mono_dmic_l_enum);
2101 /* MONO ADC R2 Source */
2102 /* MX-27 [4] */
2104 "Mono DAC MIXR", "DMIC"
2112 SOC_DAPM_ENUM("Mono ADC R2 Source", rt5659_mono_adc_r2_enum);
2114 /* MONO ADC R1 Source */
2115 /* MX-27 [3] */
2117 "Mono DAC MIXR", "ADC"
2125 SOC_DAPM_ENUM("Mono ADC R1 Source", rt5659_mono_adc_r1_enum);
2127 /* MONO DMIC R Source */
2128 /* MX-27 [0] */
2138 SOC_DAPM_ENUM("Mono DMIC R Source", rt5659_mono_dmic_r_enum);
2142 /* MX-29 [11:10], MX-29 [9:8]*/
2162 /* MX-2C [6], MX-2C [4]*/
2164 "Stereo DAC Mixer", "Mono DAC Mixer"
2182 /* MX-2D [3], MX-2D [2]*/
2202 /* MX-2D [1], MX-2D [0]*/
2204 "Stereo DAC Mixer", "Mono DAC Mixer"
2222 /* MX-2F [13:12] */
2235 /* MX-2F [1:0] */
2248 /* MX-31 [15] [13] */
2250 "Mono DAC", "Stereo DAC"
2268 /* MX-36 [1:0] */
2281 /* MX-78[4:0] */
2300 /* Out Volume Switch */
2316 /* Out Switch */
2346 struct snd_soc_component *component = snd_soc_dapm_to_component(w->dapm); in rt5659_spk_event()
2378 struct snd_soc_component *component = snd_soc_dapm_to_component(w->dapm); in rt5659_mono_event()
2400 struct snd_soc_component *component = snd_soc_dapm_to_component(w->dapm); in rt5659_hp_event()
2447 SND_SOC_DAPM_SUPPLY("Mono Vref", RT5659_PWR_ANLG_1,
2459 SND_SOC_DAPM_SUPPLY_S("DAC Mono L ASRC", 1, RT5659_ASRC_1,
2461 SND_SOC_DAPM_SUPPLY_S("DAC Mono R ASRC", 1, RT5659_ASRC_1,
2465 SND_SOC_DAPM_SUPPLY_S("ADC Mono L ASRC", 1, RT5659_ASRC_1,
2467 SND_SOC_DAPM_SUPPLY_S("ADC Mono R ASRC", 1, RT5659_ASRC_1,
2572 SND_SOC_DAPM_MUX("Mono ADC L2 Mux", SND_SOC_NOPM, 0, 0,
2574 SND_SOC_DAPM_MUX("Mono ADC R2 Mux", SND_SOC_NOPM, 0, 0,
2576 SND_SOC_DAPM_MUX("Mono ADC L1 Mux", SND_SOC_NOPM, 0, 0,
2578 SND_SOC_DAPM_MUX("Mono ADC R1 Mux", SND_SOC_NOPM, 0, 0,
2580 SND_SOC_DAPM_MUX("Mono DMIC L Mux", SND_SOC_NOPM, 0, 0,
2582 SND_SOC_DAPM_MUX("Mono DMIC R Mux", SND_SOC_NOPM, 0, 0,
2584 SND_SOC_DAPM_MUX("Mono ADC L Mux", SND_SOC_NOPM, 0, 0,
2586 SND_SOC_DAPM_MUX("Mono ADC R Mux", SND_SOC_NOPM, 0, 0,
2599 SND_SOC_DAPM_SUPPLY("ADC Mono Left Filter", RT5659_PWR_DIG_2,
2601 SND_SOC_DAPM_MIXER("Mono ADC MIXL", RT5659_MONO_ADC_DIG_VOL,
2604 SND_SOC_DAPM_SUPPLY("ADC Mono Right Filter", RT5659_PWR_DIG_2,
2606 SND_SOC_DAPM_MIXER("Mono ADC MIXR", RT5659_MONO_ADC_DIG_VOL,
2713 SND_SOC_DAPM_SUPPLY("DAC Mono Left Filter", RT5659_PWR_DIG_2,
2715 SND_SOC_DAPM_SUPPLY("DAC Mono Right Filter", RT5659_PWR_DIG_2,
2721 SND_SOC_DAPM_MIXER("Mono DAC MIXL", SND_SOC_NOPM, 0, 0,
2723 SND_SOC_DAPM_MIXER("Mono DAC MIXR", SND_SOC_NOPM, 0, 0,
2746 /* OUT Mixer */
2753 SND_SOC_DAPM_MIXER("OUT MIXL", RT5659_PWR_MIXER, RT5659_PWR_OM_L_BIT,
2755 SND_SOC_DAPM_MIXER("OUT MIXR", RT5659_PWR_MIXER, RT5659_PWR_OM_R_BIT,
2770 /* SPO/MONO/HPO/LOUT */
2775 SND_SOC_DAPM_MIXER("Mono MIX", SND_SOC_NOPM, 0, 0, rt5659_mono_mix,
2785 SND_SOC_DAPM_PGA_S("Mono Amp", 1, RT5659_PWR_ANLG_1, RT5659_PWR_MA_BIT,
2798 SND_SOC_DAPM_SWITCH("Mono Playback", SND_SOC_NOPM, 0, 0,
2844 { "ADC Mono Left Filter", NULL, "PLL", is_sys_clk_from_pll },
2845 { "ADC Mono Right Filter", NULL, "PLL", is_sys_clk_from_pll },
2847 { "DAC Mono Left Filter", NULL, "PLL", is_sys_clk_from_pll },
2848 { "DAC Mono Right Filter", NULL, "PLL", is_sys_clk_from_pll },
2852 { "ADC Mono Left Filter", NULL, "ADC Mono L ASRC", is_using_asrc },
2853 { "ADC Mono Right Filter", NULL, "ADC Mono R ASRC", is_using_asrc },
2854 { "DAC Mono Left Filter", NULL, "DAC Mono L ASRC", is_using_asrc },
2855 { "DAC Mono Right Filter", NULL, "DAC Mono R ASRC", is_using_asrc },
2942 { "Mono DMIC L Mux", "DMIC1 L", "DMIC L1" },
2943 { "Mono DMIC L Mux", "DMIC2 L", "DMIC L2" },
2945 { "Mono DMIC R Mux", "DMIC1 R", "DMIC R1" },
2946 { "Mono DMIC R Mux", "DMIC2 R", "DMIC R2" },
2963 { "Mono ADC L Mux", "ADC1 L", "ADC1 L" },
2964 { "Mono ADC L Mux", "ADC1 R", "ADC1 R" },
2965 { "Mono ADC L Mux", "ADC2 L", "ADC2 L" },
2966 { "Mono ADC L Mux", "ADC2 R", "ADC2 R" },
2968 { "Mono ADC R Mux", "ADC1 L", "ADC1 L" },
2969 { "Mono ADC R Mux", "ADC1 R", "ADC1 R" },
2970 { "Mono ADC R Mux", "ADC2 L", "ADC2 L" },
2971 { "Mono ADC R Mux", "ADC2 R", "ADC2 R" },
2973 { "Mono ADC L2 Mux", "DMIC", "Mono DMIC L Mux" },
2974 { "Mono ADC L2 Mux", "Mono DAC MIXL", "Mono DAC MIXL" },
2975 { "Mono ADC L1 Mux", "Mono DAC MIXL", "Mono DAC MIXL" },
2976 { "Mono ADC L1 Mux", "ADC", "Mono ADC L Mux" },
2978 { "Mono ADC R1 Mux", "Mono DAC MIXR", "Mono DAC MIXR" },
2979 { "Mono ADC R1 Mux", "ADC", "Mono ADC R Mux" },
2980 { "Mono ADC R2 Mux", "DMIC", "Mono DMIC R Mux" },
2981 { "Mono ADC R2 Mux", "Mono DAC MIXR", "Mono DAC MIXR" },
2991 { "Mono ADC MIXL", "ADC1 Switch", "Mono ADC L1 Mux" },
2992 { "Mono ADC MIXL", "ADC2 Switch", "Mono ADC L2 Mux" },
2993 { "Mono ADC MIXL", NULL, "ADC Mono Left Filter" },
2995 { "Mono ADC MIXR", "ADC1 Switch", "Mono ADC R1 Mux" },
2996 { "Mono ADC MIXR", "ADC2 Switch", "Mono ADC R2 Mux" },
2997 { "Mono ADC MIXR", NULL, "ADC Mono Right Filter" },
3004 { "IF_ADC2", NULL, "Mono ADC MIXL" },
3005 { "IF_ADC2", NULL, "Mono ADC MIXR" },
3132 { "DAC L2 Mux", "Mono ADC MIX", "Mono ADC MIXL" },
3133 { "DAC L2 Mux", NULL, "DAC Mono Left Filter" },
3138 { "DAC R2 Mux", "Mono ADC MIX", "Mono ADC MIXR" },
3139 { "DAC R2 Mux", NULL, "DAC Mono Right Filter" },
3151 { "Mono DAC MIXL", "DAC L1 Switch", "DAC1 MIXL" },
3152 { "Mono DAC MIXL", "DAC R1 Switch", "DAC1 MIXR" },
3153 { "Mono DAC MIXL", "DAC L2 Switch", "DAC L2 Mux" },
3154 { "Mono DAC MIXL", "DAC R2 Switch", "DAC R2 Mux" },
3155 { "Mono DAC MIXR", "DAC L1 Switch", "DAC1 MIXL" },
3156 { "Mono DAC MIXR", "DAC R1 Switch", "DAC1 MIXR" },
3157 { "Mono DAC MIXR", "DAC R2 Switch", "DAC R2 Mux" },
3158 { "Mono DAC MIXR", "DAC L2 Switch", "DAC L2 Mux" },
3161 { "DAC MIXL", "Mono DAC Mixer", "Mono DAC MIXL" },
3163 { "DAC MIXR", "Mono DAC Mixer", "Mono DAC MIXR" },
3172 { "DAC L2 Source", "Mono DAC Mixer", "Mono DAC MIXL" },
3175 { "DAC R2 Source", "Mono DAC Mixer", "Mono DAC MIXR" },
3200 { "OUT MIXL", "DAC L2 Switch", "DAC L2" },
3201 { "OUT MIXL", "INL Switch", "INL VOL" },
3202 { "OUT MIXL", "BST1 Switch", "BST1" },
3203 { "OUT MIXL", "BST2 Switch", "BST2" },
3204 { "OUT MIXL", "BST3 Switch", "BST3" },
3205 { "OUT MIXR", "DAC R2 Switch", "DAC R2" },
3206 { "OUT MIXR", "INR Switch", "INR VOL" },
3207 { "OUT MIXR", "BST2 Switch", "BST2" },
3208 { "OUT MIXR", "BST3 Switch", "BST3" },
3209 { "OUT MIXR", "BST4 Switch", "BST4" },
3225 { "Mono MIX", "DAC L2 Switch", "DAC L2" },
3226 { "Mono MIX", "MONOVOL Switch", "MONOVOL" },
3227 { "Mono Amp", NULL, "Mono MIX" },
3228 { "Mono Amp", NULL, "Mono Vref" },
3229 { "Mono Amp", NULL, "SYS CLK DET" },
3230 { "Mono Playback", "Switch", "Mono Amp" },
3231 { "MONOOUT", NULL, "Mono Playback" },
3242 { "OUTVOL L", "Switch", "OUT MIXL" },
3243 { "OUTVOL R", "Switch", "OUT MIXR" },
3257 { "PDM L Mux", "Mono DAC", "Mono DAC MIXL" },
3260 { "PDM R Mux", "Mono DAC", "Mono DAC MIXR" },
3278 struct snd_soc_component *component = dai->component; in rt5659_hw_params()
3283 rt5659->lrck[dai->id] = params_rate(params); in rt5659_hw_params()
3284 pre_div = rl6231_get_clk_info(rt5659->sysclk, rt5659->lrck[dai->id]); in rt5659_hw_params()
3286 dev_err(component->dev, "Unsupported clock setting %d for DAI %d\n", in rt5659_hw_params()
3287 rt5659->lrck[dai->id], dai->id); in rt5659_hw_params()
3288 return -EINVAL; in rt5659_hw_params()
3292 dev_err(component->dev, "Unsupported frame size: %d\n", frame_size); in rt5659_hw_params()
3293 return -EINVAL; in rt5659_hw_params()
3296 dev_dbg(dai->dev, "lrck is %dHz and pre_div is %d for iis %d\n", in rt5659_hw_params()
3297 rt5659->lrck[dai->id], pre_div, dai->id); in rt5659_hw_params()
3312 return -EINVAL; in rt5659_hw_params()
3315 switch (dai->id) { in rt5659_hw_params()
3335 dev_err(component->dev, "Invalid dai->id: %d\n", dai->id); in rt5659_hw_params()
3336 return -EINVAL; in rt5659_hw_params()
3341 switch (rt5659->lrck[dai->id]) { in rt5659_hw_params()
3361 struct snd_soc_component *component = dai->component; in rt5659_set_dai_fmt()
3367 rt5659->master[dai->id] = 1; in rt5659_set_dai_fmt()
3371 rt5659->master[dai->id] = 0; in rt5659_set_dai_fmt()
3374 return -EINVAL; in rt5659_set_dai_fmt()
3384 return -EINVAL; in rt5659_set_dai_fmt()
3400 return -EINVAL; in rt5659_set_dai_fmt()
3403 switch (dai->id) { in rt5659_set_dai_fmt()
3420 dev_err(component->dev, "Invalid dai->id: %d\n", dai->id); in rt5659_set_dai_fmt()
3421 return -EINVAL; in rt5659_set_dai_fmt()
3433 if (freq == rt5659->sysclk && clk_id == rt5659->sysclk_src) in rt5659_set_component_sysclk()
3438 ret = clk_set_rate(rt5659->mclk, freq); in rt5659_set_component_sysclk()
3451 dev_err(component->dev, "Invalid clock id (%d)\n", clk_id); in rt5659_set_component_sysclk()
3452 return -EINVAL; in rt5659_set_component_sysclk()
3456 rt5659->sysclk = freq; in rt5659_set_component_sysclk()
3457 rt5659->sysclk_src = clk_id; in rt5659_set_component_sysclk()
3459 dev_dbg(component->dev, "Sysclk is %dHz and clock id is %d\n", in rt5659_set_component_sysclk()
3473 if (source == rt5659->pll_src && freq_in == rt5659->pll_in && in rt5659_set_component_pll()
3474 freq_out == rt5659->pll_out) in rt5659_set_component_pll()
3478 dev_dbg(component->dev, "PLL disabled\n"); in rt5659_set_component_pll()
3480 rt5659->pll_in = 0; in rt5659_set_component_pll()
3481 rt5659->pll_out = 0; in rt5659_set_component_pll()
3505 dev_err(component->dev, "Unknown PLL source %d\n", source); in rt5659_set_component_pll()
3506 return -EINVAL; in rt5659_set_component_pll()
3511 dev_err(component->dev, "Unsupported input clock %d\n", freq_in); in rt5659_set_component_pll()
3515 dev_dbg(component->dev, "bypass=%d m=%d n=%d k=%d\n", in rt5659_set_component_pll()
3525 rt5659->pll_in = freq_in; in rt5659_set_component_pll()
3526 rt5659->pll_out = freq_out; in rt5659_set_component_pll()
3527 rt5659->pll_src = source; in rt5659_set_component_pll()
3535 struct snd_soc_component *component = dai->component; in rt5659_set_tdm_slot()
3557 return -EINVAL; in rt5659_set_tdm_slot()
3576 return -EINVAL; in rt5659_set_tdm_slot()
3586 struct snd_soc_component *component = dai->component; in rt5659_set_bclk_ratio()
3589 dev_dbg(component->dev, "%s ratio=%d\n", __func__, ratio); in rt5659_set_bclk_ratio()
3591 rt5659->bclk[dai->id] = ratio; in rt5659_set_bclk_ratio()
3594 switch (dai->id) { in rt5659_set_bclk_ratio()
3620 regmap_update_bits(rt5659->regmap, RT5659_DIG_MISC, in rt5659_set_bias_level()
3622 regmap_update_bits(rt5659->regmap, RT5659_PWR_DIG_1, in rt5659_set_bias_level()
3624 regmap_update_bits(rt5659->regmap, RT5659_PWR_ANLG_1, in rt5659_set_bias_level()
3628 regmap_update_bits(rt5659->regmap, RT5659_PWR_ANLG_1, in rt5659_set_bias_level()
3634 if (dapm->bias_level == SND_SOC_BIAS_OFF) { in rt5659_set_bias_level()
3635 ret = clk_prepare_enable(rt5659->mclk); in rt5659_set_bias_level()
3637 dev_err(component->dev, in rt5659_set_bias_level()
3645 regmap_update_bits(rt5659->regmap, RT5659_PWR_DIG_1, in rt5659_set_bias_level()
3647 regmap_update_bits(rt5659->regmap, RT5659_PWR_ANLG_1, in rt5659_set_bias_level()
3651 regmap_update_bits(rt5659->regmap, RT5659_DIG_MISC, in rt5659_set_bias_level()
3653 clk_disable_unprepare(rt5659->mclk); in rt5659_set_bias_level()
3669 rt5659->component = component; in rt5659_probe()
3671 switch (rt5659->pdata.jd_src) { in rt5659_probe()
3689 regmap_write(rt5659->regmap, RT5659_RESET, 0); in rt5659_remove()
3697 regcache_cache_only(rt5659->regmap, true); in rt5659_suspend()
3698 regcache_mark_dirty(rt5659->regmap); in rt5659_suspend()
3706 regcache_cache_only(rt5659->regmap, false); in rt5659_resume()
3707 regcache_sync(rt5659->regmap); in rt5659_resume()
3729 .name = "rt5659-aif1",
3748 .name = "rt5659-aif2",
3767 .name = "rt5659-aif3",
3826 rt5659->pdata.in1_diff = device_property_read_bool(dev, in rt5659_parse_dt()
3827 "realtek,in1-differential"); in rt5659_parse_dt()
3828 rt5659->pdata.in3_diff = device_property_read_bool(dev, in rt5659_parse_dt()
3829 "realtek,in3-differential"); in rt5659_parse_dt()
3830 rt5659->pdata.in4_diff = device_property_read_bool(dev, in rt5659_parse_dt()
3831 "realtek,in4-differential"); in rt5659_parse_dt()
3834 device_property_read_u32(dev, "realtek,dmic1-data-pin", in rt5659_parse_dt()
3835 &rt5659->pdata.dmic1_data_pin); in rt5659_parse_dt()
3836 device_property_read_u32(dev, "realtek,dmic2-data-pin", in rt5659_parse_dt()
3837 &rt5659->pdata.dmic2_data_pin); in rt5659_parse_dt()
3838 device_property_read_u32(dev, "realtek,jd-src", in rt5659_parse_dt()
3839 &rt5659->pdata.jd_src); in rt5659_parse_dt()
3850 regmap_write(rt5659->regmap, RT5659_BIAS_CUR_CTRL_8, 0xa502); in rt5659_calibrate()
3851 regmap_write(rt5659->regmap, RT5659_CHOP_DAC, 0x3030); in rt5659_calibrate()
3853 regmap_write(rt5659->regmap, RT5659_PRE_DIV_1, 0xef00); in rt5659_calibrate()
3854 regmap_write(rt5659->regmap, RT5659_PRE_DIV_2, 0xeffc); in rt5659_calibrate()
3855 regmap_write(rt5659->regmap, RT5659_MICBIAS_2, 0x0280); in rt5659_calibrate()
3856 regmap_write(rt5659->regmap, RT5659_DIG_MISC, 0x0001); in rt5659_calibrate()
3857 regmap_write(rt5659->regmap, RT5659_GLB_CLK, 0x8000); in rt5659_calibrate()
3859 regmap_write(rt5659->regmap, RT5659_PWR_ANLG_1, 0xaa7e); in rt5659_calibrate()
3861 regmap_write(rt5659->regmap, RT5659_PWR_ANLG_1, 0xfe7e); in rt5659_calibrate()
3863 regmap_write(rt5659->regmap, RT5659_PWR_ANLG_3, 0x0004); in rt5659_calibrate()
3864 regmap_write(rt5659->regmap, RT5659_PWR_DIG_2, 0x0400); in rt5659_calibrate()
3866 regmap_write(rt5659->regmap, RT5659_PWR_DIG_1, 0x0080); in rt5659_calibrate()
3868 regmap_write(rt5659->regmap, RT5659_DEPOP_1, 0x0009); in rt5659_calibrate()
3870 regmap_write(rt5659->regmap, RT5659_PWR_DIG_1, 0x0f80); in rt5659_calibrate()
3872 regmap_write(rt5659->regmap, RT5659_HP_CHARGE_PUMP_1, 0x0e16); in rt5659_calibrate()
3876 regmap_write(rt5659->regmap, RT5659_CAL_REC, 0x0505); in rt5659_calibrate()
3878 regmap_write(rt5659->regmap, RT5659_PWR_ANLG_3, 0x0184); in rt5659_calibrate()
3879 regmap_write(rt5659->regmap, RT5659_CALIB_ADC_CTRL, 0x3c05); in rt5659_calibrate()
3880 regmap_write(rt5659->regmap, RT5659_HP_CALIB_CTRL_2, 0x20c1); in rt5659_calibrate()
3883 regmap_write(rt5659->regmap, RT5659_HP_CALIB_CTRL_2, 0x2cc1); in rt5659_calibrate()
3884 regmap_write(rt5659->regmap, RT5659_HP_CALIB_CTRL_1, 0x5100); in rt5659_calibrate()
3885 regmap_write(rt5659->regmap, RT5659_HP_CALIB_CTRL_7, 0x0014); in rt5659_calibrate()
3886 regmap_write(rt5659->regmap, RT5659_HP_CALIB_CTRL_1, 0xd100); in rt5659_calibrate()
3890 regmap_write(rt5659->regmap, RT5659_HP_CALIB_CTRL_2, 0x2cc1); in rt5659_calibrate()
3891 regmap_write(rt5659->regmap, RT5659_HP_CALIB_CTRL_1, 0x4900); in rt5659_calibrate()
3892 regmap_write(rt5659->regmap, RT5659_HP_CALIB_CTRL_7, 0x0016); in rt5659_calibrate()
3893 regmap_update_bits(rt5659->regmap, RT5659_HP_CALIB_CTRL_1, in rt5659_calibrate()
3898 regmap_read(rt5659->regmap, RT5659_HP_CALIB_CTRL_1, &value); in rt5659_calibrate()
3905 dev_err(rt5659->component->dev, in rt5659_calibrate()
3914 regmap_write(rt5659->regmap, RT5659_HP_CALIB_CTRL_2, 0x2cc1); in rt5659_calibrate()
3915 regmap_write(rt5659->regmap, RT5659_HP_VOL, 0x0000); in rt5659_calibrate()
3916 regmap_write(rt5659->regmap, RT5659_HP_CALIB_CTRL_1, 0x4500); in rt5659_calibrate()
3917 regmap_write(rt5659->regmap, RT5659_HP_CALIB_CTRL_7, 0x001f); in rt5659_calibrate()
3918 regmap_update_bits(rt5659->regmap, RT5659_HP_CALIB_CTRL_1, in rt5659_calibrate()
3923 regmap_read(rt5659->regmap, RT5659_HP_CALIB_CTRL_1, &value); in rt5659_calibrate()
3930 dev_err(rt5659->component->dev, in rt5659_calibrate()
3938 regmap_write(rt5659->regmap, RT5659_HP_CALIB_CTRL_7, 0x0000); in rt5659_calibrate()
3939 regmap_write(rt5659->regmap, RT5659_HP_CALIB_CTRL_2, 0x20c0); in rt5659_calibrate()
3943 regmap_write(rt5659->regmap, RT5659_CLASSD_0, 0x2021); in rt5659_calibrate()
3944 regmap_write(rt5659->regmap, RT5659_CLASSD_CTRL_1, 0x0260); in rt5659_calibrate()
3945 regmap_write(rt5659->regmap, RT5659_PWR_MIXER, 0x3000); in rt5659_calibrate()
3946 regmap_write(rt5659->regmap, RT5659_PWR_VOL, 0xc000); in rt5659_calibrate()
3947 regmap_write(rt5659->regmap, RT5659_A_DAC_MUX, 0x000c); in rt5659_calibrate()
3948 regmap_write(rt5659->regmap, RT5659_DIG_MISC, 0x8000); in rt5659_calibrate()
3949 regmap_write(rt5659->regmap, RT5659_SPO_VOL, 0x0808); in rt5659_calibrate()
3950 regmap_write(rt5659->regmap, RT5659_SPK_L_MIXER, 0x001e); in rt5659_calibrate()
3951 regmap_write(rt5659->regmap, RT5659_SPK_R_MIXER, 0x001e); in rt5659_calibrate()
3952 regmap_write(rt5659->regmap, RT5659_CLASSD_1, 0x0803); in rt5659_calibrate()
3953 regmap_write(rt5659->regmap, RT5659_CLASSD_2, 0x0554); in rt5659_calibrate()
3954 regmap_write(rt5659->regmap, RT5659_SPO_AMP_GAIN, 0x1103); in rt5659_calibrate()
3957 regmap_write(rt5659->regmap, RT5659_CAL_REC, 0x0909); in rt5659_calibrate()
3958 regmap_update_bits(rt5659->regmap, RT5659_HP_CALIB_CTRL_2, 0x0001, in rt5659_calibrate()
3962 regmap_write(rt5659->regmap, RT5659_SPK_DC_CAILB_CTRL_3, 0x0000); in rt5659_calibrate()
3963 regmap_write(rt5659->regmap, RT5659_CLASSD_0, 0x0021); in rt5659_calibrate()
3964 regmap_write(rt5659->regmap, RT5659_SPK_DC_CAILB_CTRL_1, 0x3e80); in rt5659_calibrate()
3965 regmap_update_bits(rt5659->regmap, RT5659_SPK_DC_CAILB_CTRL_1, in rt5659_calibrate()
3970 regmap_read(rt5659->regmap, in rt5659_calibrate()
3978 dev_err(rt5659->component->dev, in rt5659_calibrate()
3987 /* Calibrate MONO Start */ in rt5659_calibrate()
3988 regmap_write(rt5659->regmap, RT5659_DIG_MISC, 0x0000); in rt5659_calibrate()
3989 regmap_write(rt5659->regmap, RT5659_MONOMIX_IN_GAIN, 0x021f); in rt5659_calibrate()
3990 regmap_write(rt5659->regmap, RT5659_MONO_OUT, 0x480a); in rt5659_calibrate()
3991 /* MONO NG2 GAIN 5dB */ in rt5659_calibrate()
3992 regmap_write(rt5659->regmap, RT5659_MONO_GAIN, 0x0003); in rt5659_calibrate()
3993 regmap_write(rt5659->regmap, RT5659_MONO_NG2_CTRL_5, 0x0009); in rt5659_calibrate()
3996 regmap_write(rt5659->regmap, RT5659_SPK_DC_CAILB_CTRL_3, 0x000f); in rt5659_calibrate()
3997 regmap_write(rt5659->regmap, RT5659_MONO_AMP_CALIB_CTRL_1, 0x1e00); in rt5659_calibrate()
3998 regmap_update_bits(rt5659->regmap, RT5659_MONO_AMP_CALIB_CTRL_1, in rt5659_calibrate()
4003 regmap_read(rt5659->regmap, RT5659_MONO_AMP_CALIB_CTRL_1, in rt5659_calibrate()
4011 dev_err(rt5659->component->dev, in rt5659_calibrate()
4012 "Mono Calibration Failure\n"); in rt5659_calibrate()
4019 regmap_write(rt5659->regmap, RT5659_SPK_DC_CAILB_CTRL_3, 0x0003); in rt5659_calibrate()
4020 /* Calibrate MONO End */ in rt5659_calibrate()
4023 regmap_write(rt5659->regmap, RT5659_CAL_REC, 0x0808); in rt5659_calibrate()
4024 regmap_write(rt5659->regmap, RT5659_PWR_ANLG_3, 0x0000); in rt5659_calibrate()
4025 regmap_write(rt5659->regmap, RT5659_CALIB_ADC_CTRL, 0x2005); in rt5659_calibrate()
4026 regmap_write(rt5659->regmap, RT5659_HP_CALIB_CTRL_2, 0x20c0); in rt5659_calibrate()
4027 regmap_write(rt5659->regmap, RT5659_DEPOP_1, 0x0000); in rt5659_calibrate()
4028 regmap_write(rt5659->regmap, RT5659_CLASSD_1, 0x0011); in rt5659_calibrate()
4029 regmap_write(rt5659->regmap, RT5659_CLASSD_2, 0x0150); in rt5659_calibrate()
4030 regmap_write(rt5659->regmap, RT5659_PWR_ANLG_1, 0xfe3e); in rt5659_calibrate()
4031 regmap_write(rt5659->regmap, RT5659_MONO_OUT, 0xc80a); in rt5659_calibrate()
4032 regmap_write(rt5659->regmap, RT5659_MONO_AMP_CALIB_CTRL_1, 0x1e04); in rt5659_calibrate()
4033 regmap_write(rt5659->regmap, RT5659_PWR_MIXER, 0x0000); in rt5659_calibrate()
4034 regmap_write(rt5659->regmap, RT5659_PWR_VOL, 0x0000); in rt5659_calibrate()
4035 regmap_write(rt5659->regmap, RT5659_PWR_DIG_1, 0x0000); in rt5659_calibrate()
4036 regmap_write(rt5659->regmap, RT5659_PWR_DIG_2, 0x0000); in rt5659_calibrate()
4037 regmap_write(rt5659->regmap, RT5659_PWR_ANLG_1, 0x003e); in rt5659_calibrate()
4038 regmap_write(rt5659->regmap, RT5659_CLASSD_CTRL_1, 0x0060); in rt5659_calibrate()
4039 regmap_write(rt5659->regmap, RT5659_CLASSD_0, 0x2021); in rt5659_calibrate()
4040 regmap_write(rt5659->regmap, RT5659_GLB_CLK, 0x0000); in rt5659_calibrate()
4041 regmap_write(rt5659->regmap, RT5659_MICBIAS_2, 0x0080); in rt5659_calibrate()
4042 regmap_write(rt5659->regmap, RT5659_HP_VOL, 0x8080); in rt5659_calibrate()
4043 regmap_write(rt5659->regmap, RT5659_HP_CHARGE_PUMP_1, 0x0c16); in rt5659_calibrate()
4050 regmap_read(rt5659->regmap, RT5659_GPIO_STA, &value); in rt5659_intel_hd_header_probe_setup()
4052 rt5659->hda_hp_plugged = true; in rt5659_intel_hd_header_probe_setup()
4053 regmap_update_bits(rt5659->regmap, RT5659_IRQ_CTRL_1, in rt5659_intel_hd_header_probe_setup()
4056 regmap_update_bits(rt5659->regmap, RT5659_IRQ_CTRL_1, in rt5659_intel_hd_header_probe_setup()
4060 regmap_update_bits(rt5659->regmap, RT5659_PWR_ANLG_1, in rt5659_intel_hd_header_probe_setup()
4064 regmap_update_bits(rt5659->regmap, RT5659_PWR_ANLG_1, in rt5659_intel_hd_header_probe_setup()
4067 regmap_update_bits(rt5659->regmap, RT5659_PWR_ANLG_3, RT5659_PWR_LDO2, in rt5659_intel_hd_header_probe_setup()
4069 regmap_update_bits(rt5659->regmap, RT5659_PWR_ANLG_2, RT5659_PWR_MB1, in rt5659_intel_hd_header_probe_setup()
4071 regmap_update_bits(rt5659->regmap, RT5659_PWR_VOL, RT5659_PWR_MIC_DET, in rt5659_intel_hd_header_probe_setup()
4075 regmap_update_bits(rt5659->regmap, RT5659_4BTN_IL_CMD_2, in rt5659_intel_hd_header_probe_setup()
4077 regmap_read(rt5659->regmap, RT5659_4BTN_IL_CMD_1, &value); in rt5659_intel_hd_header_probe_setup()
4078 regmap_write(rt5659->regmap, RT5659_4BTN_IL_CMD_1, value); in rt5659_intel_hd_header_probe_setup()
4079 regmap_read(rt5659->regmap, RT5659_4BTN_IL_CMD_1, &value); in rt5659_intel_hd_header_probe_setup()
4082 rt5659->hda_mic_plugged = true; in rt5659_intel_hd_header_probe_setup()
4083 regmap_update_bits(rt5659->regmap, RT5659_IRQ_CTRL_2, in rt5659_intel_hd_header_probe_setup()
4086 regmap_update_bits(rt5659->regmap, RT5659_IRQ_CTRL_2, in rt5659_intel_hd_header_probe_setup()
4090 regmap_update_bits(rt5659->regmap, RT5659_IRQ_CTRL_2, in rt5659_intel_hd_header_probe_setup()
4096 struct rt5659_platform_data *pdata = dev_get_platdata(&i2c->dev); in rt5659_i2c_probe()
4101 rt5659 = devm_kzalloc(&i2c->dev, sizeof(struct rt5659_priv), in rt5659_i2c_probe()
4105 return -ENOMEM; in rt5659_i2c_probe()
4110 rt5659->pdata = *pdata; in rt5659_i2c_probe()
4112 rt5659_parse_dt(rt5659, &i2c->dev); in rt5659_i2c_probe()
4114 rt5659->gpiod_ldo1_en = devm_gpiod_get_optional(&i2c->dev, "ldo1-en", in rt5659_i2c_probe()
4116 if (IS_ERR(rt5659->gpiod_ldo1_en)) in rt5659_i2c_probe()
4117 dev_warn(&i2c->dev, "Request ldo1-en GPIO failed\n"); in rt5659_i2c_probe()
4119 rt5659->gpiod_reset = devm_gpiod_get_optional(&i2c->dev, "reset", in rt5659_i2c_probe()
4125 rt5659->regmap = devm_regmap_init_i2c(i2c, &rt5659_regmap); in rt5659_i2c_probe()
4126 if (IS_ERR(rt5659->regmap)) { in rt5659_i2c_probe()
4127 ret = PTR_ERR(rt5659->regmap); in rt5659_i2c_probe()
4128 dev_err(&i2c->dev, "Failed to allocate register map: %d\n", in rt5659_i2c_probe()
4133 regmap_read(rt5659->regmap, RT5659_DEVICE_ID, &val); in rt5659_i2c_probe()
4135 dev_err(&i2c->dev, in rt5659_i2c_probe()
4137 return -ENODEV; in rt5659_i2c_probe()
4140 regmap_write(rt5659->regmap, RT5659_RESET, 0); in rt5659_i2c_probe()
4143 rt5659->mclk = devm_clk_get_optional(&i2c->dev, "mclk"); in rt5659_i2c_probe()
4144 if (IS_ERR(rt5659->mclk)) in rt5659_i2c_probe()
4145 return PTR_ERR(rt5659->mclk); in rt5659_i2c_probe()
4150 if (rt5659->pdata.in1_diff) in rt5659_i2c_probe()
4151 regmap_update_bits(rt5659->regmap, RT5659_IN1_IN2, in rt5659_i2c_probe()
4153 if (rt5659->pdata.in3_diff) in rt5659_i2c_probe()
4154 regmap_update_bits(rt5659->regmap, RT5659_IN3_IN4, in rt5659_i2c_probe()
4156 if (rt5659->pdata.in4_diff) in rt5659_i2c_probe()
4157 regmap_update_bits(rt5659->regmap, RT5659_IN3_IN4, in rt5659_i2c_probe()
4161 if (rt5659->pdata.dmic1_data_pin != RT5659_DMIC1_NULL || in rt5659_i2c_probe()
4162 rt5659->pdata.dmic2_data_pin != RT5659_DMIC2_NULL) { in rt5659_i2c_probe()
4163 regmap_update_bits(rt5659->regmap, RT5659_GPIO_CTRL_1, in rt5659_i2c_probe()
4166 switch (rt5659->pdata.dmic1_data_pin) { in rt5659_i2c_probe()
4168 regmap_update_bits(rt5659->regmap, RT5659_DMIC_CTRL_1, in rt5659_i2c_probe()
4173 regmap_update_bits(rt5659->regmap, in rt5659_i2c_probe()
4177 regmap_update_bits(rt5659->regmap, RT5659_DMIC_CTRL_1, in rt5659_i2c_probe()
4179 regmap_update_bits(rt5659->regmap, RT5659_GPIO_CTRL_1, in rt5659_i2c_probe()
4184 regmap_update_bits(rt5659->regmap, RT5659_DMIC_CTRL_1, in rt5659_i2c_probe()
4186 regmap_update_bits(rt5659->regmap, RT5659_GPIO_CTRL_1, in rt5659_i2c_probe()
4191 regmap_update_bits(rt5659->regmap, RT5659_DMIC_CTRL_1, in rt5659_i2c_probe()
4193 regmap_update_bits(rt5659->regmap, RT5659_GPIO_CTRL_1, in rt5659_i2c_probe()
4199 dev_dbg(&i2c->dev, "no DMIC1\n"); in rt5659_i2c_probe()
4203 switch (rt5659->pdata.dmic2_data_pin) { in rt5659_i2c_probe()
4205 regmap_update_bits(rt5659->regmap, in rt5659_i2c_probe()
4212 regmap_update_bits(rt5659->regmap, in rt5659_i2c_probe()
4216 regmap_update_bits(rt5659->regmap, in rt5659_i2c_probe()
4223 regmap_update_bits(rt5659->regmap, in rt5659_i2c_probe()
4227 regmap_update_bits(rt5659->regmap, in rt5659_i2c_probe()
4234 regmap_update_bits(rt5659->regmap, in rt5659_i2c_probe()
4238 regmap_update_bits(rt5659->regmap, in rt5659_i2c_probe()
4245 dev_dbg(&i2c->dev, "no DMIC2\n"); in rt5659_i2c_probe()
4250 regmap_update_bits(rt5659->regmap, RT5659_GPIO_CTRL_1, in rt5659_i2c_probe()
4259 regmap_update_bits(rt5659->regmap, RT5659_DMIC_CTRL_1, in rt5659_i2c_probe()
4264 switch (rt5659->pdata.jd_src) { in rt5659_i2c_probe()
4266 regmap_write(rt5659->regmap, RT5659_EJD_CTRL_1, 0xa880); in rt5659_i2c_probe()
4267 regmap_write(rt5659->regmap, RT5659_RC_CLK_CTRL, 0x9000); in rt5659_i2c_probe()
4268 regmap_write(rt5659->regmap, RT5659_GPIO_CTRL_1, 0xc800); in rt5659_i2c_probe()
4269 regmap_update_bits(rt5659->regmap, RT5659_PWR_ANLG_1, in rt5659_i2c_probe()
4271 regmap_write(rt5659->regmap, RT5659_PWR_ANLG_2, 0x0001); in rt5659_i2c_probe()
4272 regmap_write(rt5659->regmap, RT5659_IRQ_CTRL_2, 0x0040); in rt5659_i2c_probe()
4273 INIT_DELAYED_WORK(&rt5659->jack_detect_work, in rt5659_i2c_probe()
4277 regmap_write(rt5659->regmap, RT5659_GPIO_CTRL_3, 0x8000); in rt5659_i2c_probe()
4278 regmap_write(rt5659->regmap, RT5659_RC_CLK_CTRL, 0x0900); in rt5659_i2c_probe()
4279 regmap_write(rt5659->regmap, RT5659_EJD_CTRL_1, 0x70c0); in rt5659_i2c_probe()
4280 regmap_write(rt5659->regmap, RT5659_JD_CTRL_1, 0x2000); in rt5659_i2c_probe()
4281 regmap_write(rt5659->regmap, RT5659_IRQ_CTRL_1, 0x0040); in rt5659_i2c_probe()
4282 INIT_DELAYED_WORK(&rt5659->jack_detect_work, in rt5659_i2c_probe()
4290 if (i2c->irq) { in rt5659_i2c_probe()
4291 ret = devm_request_threaded_irq(&i2c->dev, i2c->irq, NULL, in rt5659_i2c_probe()
4295 dev_err(&i2c->dev, "Failed to request IRQ: %d\n", ret); in rt5659_i2c_probe()
4298 regmap_update_bits(rt5659->regmap, RT5659_GPIO_CTRL_1, in rt5659_i2c_probe()
4302 return devm_snd_soc_register_component(&i2c->dev, in rt5659_i2c_probe()
4311 regmap_write(rt5659->regmap, RT5659_RESET, 0); in rt5659_i2c_shutdown()