Lines Matching full:13
231 #define RT5651_M_DAC_L2_VOL (0x1 << 13)
232 #define RT5651_M_DAC_L2_VOL_SFT 13
271 #define RT5651_M_STO1_ADC_L2 (0x1 << 13)
272 #define RT5651_M_STO1_ADC_L2_SFT 13
289 #define RT5651_M_STO2_ADC_L2 (0x1 << 13)
290 #define RT5651_M_STO2_ADC_L2_SFT 13
325 #define RT5651_DAC_L1_STO_L_VOL_MASK (0x1 << 13)
326 #define RT5651_DAC_L1_STO_L_VOL_SFT 13
351 #define RT5651_STO_DD_L1_VOL_MASK (0x1 << 13)
352 #define RT5651_DAC_DD_L1_VOL_SFT 13
379 #define RT5651_M_DAC_L2_DAC_L (0x1 << 13)
380 #define RT5651_M_DAC_L2_DAC_L_SFT 13
472 #define RT5651_PDM_R_SEL_MASK (0x1 << 13)
473 #define RT5651_PDM_R_SEL_SFT 13
474 #define RT5651_PDM_R_SEL_DD_L (0x0 << 13)
475 #define RT5651_PDM_R_SEL_STO_L (0x1 << 13)
508 #define RT5651_G_LN_L2_RM_L_MASK (0x7 << 13)
509 #define RT5651_G_IN_L2_RM_L_SFT 13
518 #define RT5651_G_BST1_RM_L_MASK (0x7 << 13)
519 #define RT5651_G_BST1_RM_L_SFT 13
536 #define RT5651_G_IN2_R_RM_R_MASK (0x7 << 13)
537 #define RT5651_G_IN2_R_RM_R_SFT 13
546 #define RT5651_G_BST1_RM_R_MASK (0x7 << 13)
547 #define RT5651_G_BST1_RM_R_SFT 13
566 #define RT5651_M_HPVOL_HM (0x1 << 13)
567 #define RT5651_M_HPVOL_HM_SFT 13
620 #define RT5651_M_SV_R_SPM_L (0x1 << 13)
621 #define RT5651_M_SV_R_SPM_L_SFT 13
628 #define RT5651_M_DAC_R1_SPM_R (0x1 << 13)
629 #define RT5651_M_DAC_R1_SPM_R_SFT 13
644 #define RT5651_M_OV_R_MM (0x1 << 13)
645 #define RT5651_M_OV_R_MM_SFT 13
718 #define RT5651_M_OV_L_LM (0x1 << 13)
719 #define RT5651_M_OV_L_LM_SFT 13
756 #define RT5651_PWR_MB (0x1 << 13)
757 #define RT5651_PWR_MB_BIT 13
785 #define RT5651_PWR_BST3 (0x1 << 13)
786 #define RT5651_PWR_BST3_BIT 13
815 #define RT5651_PWR_OV_L (0x1 << 13)
816 #define RT5651_PWR_OV_L_BIT 13
913 #define RT5651_DMIC_1L_LH_MASK (0x1 << 13)
914 #define RT5651_DMIC_1L_LH_SFT 13
915 #define RT5651_DMIC_1L_LH_FALLING (0x0 << 13)
916 #define RT5651_DMIC_1L_LH_RISING (0x1 << 13)
992 #define RT5651_TDM_CH_VAL_EN (0x1 << 13)
993 #define RT5651_TDM_CH_VAL_SFT 13
1117 #define RT5651_STO1_DAC_M_MASK (0x1 << 13)
1118 #define RT5651_STO1_DAC_M_SFT 13
1119 #define RT5651_STO1_DAC_M_NOR (0x0 << 13)
1120 #define RT5651_STO1_DAC_M_ASRC (0x1 << 13)
1232 #define RT5651_DEPOP_MASK (0x1 << 13)
1233 #define RT5651_DEPOP_SFT 13
1234 #define RT5651_DEPOP_AUTO (0x0 << 13)
1235 #define RT5651_DEPOP_MAN (0x1 << 13)
1309 #define RT5651_MIC1_CLK_MASK (0x1 << 13)
1310 #define RT5651_MIC1_CLK_SFT 13
1311 #define RT5651_MIC1_CLK_DIS (0x0 << 13)
1312 #define RT5651_MIC1_CLK_EN (0x1 << 13)
1366 #define RT5651_EQ_CD_MASK (0x1 << 13)
1367 #define RT5651_EQ_CD_SFT 13
1368 #define RT5651_EQ_CD_DIS (0x0 << 13)
1369 #define RT5651_EQ_CD_EN (0x1 << 13)
1447 #define RT5651_ALC_UPD (0x1 << 13)
1448 #define RT5651_ALC_UPD_BIT 13
1495 #define RT5651_JD_MASK (0x7 << 13)
1496 #define RT5651_JD_SFT 13
1497 #define RT5651_JD_DIS (0x0 << 13)
1498 #define RT5651_JD_GPIO1 (0x1 << 13)
1499 #define RT5651_JD_GPIO2 (0x2 << 13)
1500 #define RT5651_JD_GPIO3 (0x3 << 13)
1501 #define RT5651_JD_GPIO4 (0x4 << 13)
1502 #define RT5651_JD_GPIO5 (0x5 << 13)
1503 #define RT5651_JD_GPIO6 (0x6 << 13)
1557 #define RT5651_JD_STKY_MASK (0x1 << 13)
1558 #define RT5651_JD_STKY_SFT 13
1559 #define RT5651_JD_STKY_DIS (0x0 << 13)
1560 #define RT5651_JD_STKY_EN (0x1 << 13)
1608 #define RT5651_STA_JD1_2 (0x1 << 13)
1609 #define RT5651_STA_JD1_2_BIT 13
1672 #define RT5651_GP5_OUT_MASK (0x1 << 13)
1673 #define RT5651_GP5_OUT_SFT 13
1674 #define RT5651_GP5_OUT_LO (0x0 << 13)
1675 #define RT5651_GP5_OUT_HI (0x1 << 13)
1804 #define RT5651_M_MP3_MASK (0x1 << 13)
1805 #define RT5651_M_MP3_SFT 13
1806 #define RT5651_M_MP3_DIS (0x0 << 13)
1807 #define RT5651_M_MP3_EN (0x1 << 13)
1820 #define RT5651_MP3_WT_MASK (0x1 << 13)
1821 #define RT5651_MP3_WT_SFT 13
1822 #define RT5651_MP3_WT_1_4 (0x0 << 13)
1823 #define RT5651_MP3_WT_1_2 (0x1 << 13)
1838 #define RT5651_3D_BT_MASK (0x1 << 13)
1839 #define RT5651_3D_BT_SFT 13
1840 #define RT5651_3D_BT_DIS (0x0 << 13)
1841 #define RT5651_3D_BT_EN (0x1 << 13)
1923 #define RT5651_OUT_SV_MASK (0x1 << 13)
1924 #define RT5651_OUT_SV_SFT 13
1925 #define RT5651_OUT_SV_DIS (0x0 << 13)
1926 #define RT5651_OUT_SV_EN (0x1 << 13)
1981 #define RT5651_3D_SPK_M_MASK (0x3 << 13)
1982 #define RT5651_3D_SPK_M_SFT 13
2015 #define RT5651_WND_WIND_MASK (0x1 << 13) /* Read-Only */
2016 #define RT5651_WND_WIND_SFT 13