Lines Matching +full:11 +full:- +full:14
1 /* SPDX-License-Identifier: GPL-2.0-only */
3 * rt5651.h -- RT5651 ALSA SoC audio driver
12 #include <dt-bindings/sound/rt5651.h>
19 /* I/O - Output */
23 /* I/O - Input */
28 /* I/O - ADC/DAC/DMIC */
35 /* Mixer - D-D */
48 /* Mixer - ADC */
53 /* Mixer - DAC */
72 /* Format - ADC/DAC */
82 /* Function - Analog */
99 /* Function - Digital */
178 #define RT5651_VOL_L_MUTE (0x1 << 14)
179 #define RT5651_VOL_L_SFT 14
235 #define RT5651_SEL_DAC_L2 (0x1 << 11)
236 #define RT5651_IF2_DAC_L2 (0x1 << 11)
237 #define RT5651_IF1_DAC_L2 (0x0 << 11)
238 #define RT5651_SEL_DAC_L2_SFT 11
240 #define RT5651_IF2_DAC_R2 (0x1 << 11)
241 #define RT5651_IF1_DAC_R2 (0x0 << 11)
261 #define RT5651_ADC_L_BST_MASK (0x3 << 14)
262 #define RT5651_ADC_L_BST_SFT 14
269 #define RT5651_M_STO1_ADC_L1 (0x1 << 14)
270 #define RT5651_M_STO1_ADC_L1_SFT 14
277 #define RT5651_STO1_ADC_2_SRC_MASK (0x1 << 11)
278 #define RT5651_STO1_ADC_2_SRC_SFT 11
279 #define RT5651_STO1_ADC_2_SRC_DMIC (0x0 << 11)
280 #define RT5651_STO1_ADC_2_SRC_DACMIXR (0x1 << 11)
287 #define RT5651_M_STO2_ADC_L1 (0x1 << 14)
288 #define RT5651_M_STO2_ADC_L1_SFT 14
295 #define RT5651_STO2_ADC_L2_SRC_MASK (0x1 << 11)
296 #define RT5651_STO2_ADC_L2_SRC_SFT 11
297 #define RT5651_STO2_ADC_L2_SRC_DMIC (0x0 << 11)
298 #define RT5651_STO2_ADC_L2_SRC_DACMIXR (0x1 << 11)
315 #define RT5651_M_IF1_DAC_L (0x1 << 14)
316 #define RT5651_M_IF1_DAC_L_SFT 14
323 #define RT5651_M_DAC_L1_MIXL (0x1 << 14)
324 #define RT5651_M_DAC_L1_MIXL_SFT 14
329 #define RT5651_DAC_L2_STO_L_VOL_MASK (0x1 << 11)
330 #define RT5651_DAC_L2_STO_L_VOL_SFT 11
349 #define RT5651_M_STO_DD_L1 (0x1 << 14)
350 #define RT5651_M_STO_DD_L1_SFT 14
355 #define RT5651_STO_DD_L2_VOL_MASK (0x1 << 11)
356 #define RT5651_STO_DD_L2_VOL_SFT 11
377 #define RT5651_STO_L_DAC_L_VOL_MASK (0x1 << 14)
378 #define RT5651_STO_L_DAC_L_VOL_SFT 14
383 #define RT5651_M_STO_R_DAC_R (0x1 << 11)
384 #define RT5651_M_STO_R_DAC_R_SFT 11
397 #define RT5651_TXDP_SRC_MASK (0x1 << 14)
398 #define RT5651_TXDP_SRC_SFT 14
399 #define RT5651_TXDP_SRC_NOR (0x0 << 14)
400 #define RT5651_TXDP_SRC_DIV3 (0x1 << 14)
403 #define RT5651_DAC_L2_SEL_MASK (0x3 << 14)
404 #define RT5651_DAC_L2_SEL_SFT 14
405 #define RT5651_DAC_L2_SEL_IF2 (0x0 << 14)
406 #define RT5651_DAC_L2_SEL_IF3 (0x1 << 14)
407 #define RT5651_DAC_L2_SEL_TXDC (0x2 << 14)
408 #define RT5651_DAC_L2_SEL_BASS (0x3 << 14)
414 #define RT5651_IF2_ADC_L_SEL_MASK (0x1 << 11)
415 #define RT5651_IF2_ADC_L_SEL_SFT 11
416 #define RT5651_IF2_ADC_L_SEL_TXDP (0x0 << 11)
417 #define RT5651_IF2_ADC_L_SEL_PASS (0x1 << 11)
470 #define RT5651_M_PDM_L (0x1 << 14)
471 #define RT5651_M_PDM_L_SFT 14
494 #define PT5631_PDM_CMD_EXE (0x1 << 11)
564 #define RT5651_M_DAC1_HM (0x1 << 14)
565 #define RT5651_M_DAC1_HM_SFT 14
572 #define RT5651_G_RM_L_SM_L_MASK (0x3 << 14)
573 #define RT5651_G_RM_L_SM_L_SFT 14
594 #define RT5651_G_RM_R_SM_R_MASK (0x3 << 14)
595 #define RT5651_G_RM_R_SM_R_SFT 14
618 #define RT5651_M_DAC_L1_SPM_L (0x1 << 14)
619 #define RT5651_M_DAC_L1_SPM_L_SFT 14
624 #define RT5651_M_BST1_SPM_L (0x1 << 11)
625 #define RT5651_M_BST1_SPM_L_SFT 11
632 #define RT5651_M_BST1_SPM_R (0x1 << 11)
633 #define RT5651_M_BST1_SPM_R_SFT 11
642 #define RT5651_M_DAC_L2_MM (0x1 << 14)
643 #define RT5651_M_DAC_L2_MM_SFT 14
648 #define RT5651_M_BST1_MM (0x1 << 11)
649 #define RT5651_M_BST1_MM_SFT 11
716 #define RT5651_M_DAC_R1_LM (0x1 << 14)
717 #define RT5651_M_DAC_R1_LM_SFT 14
722 #define RT5651_G_LOUTMIX_MASK (0x1 << 11)
723 #define RT5651_G_LOUTMIX_SFT 11
728 #define RT5651_PWR_I2S2 (0x1 << 14)
729 #define RT5651_PWR_I2S2_BIT 14
732 #define RT5651_PWR_DAC_R1 (0x1 << 11)
733 #define RT5651_PWR_DAC_R1_BIT 11
742 #define RT5651_PWR_ADC_STO2_F (0x1 << 14)
743 #define RT5651_PWR_ADC_STO2_F_BIT 14
744 #define RT5651_PWR_DAC_STO1_F (0x1 << 11)
745 #define RT5651_PWR_DAC_STO1_F_BIT 11
754 #define RT5651_PWR_FV1 (0x1 << 14)
755 #define RT5651_PWR_FV1_BIT 14
760 #define RT5651_PWR_BG (0x1 << 11)
761 #define RT5651_PWR_BG_BIT 11
783 #define RT5651_PWR_BST2 (0x1 << 14)
784 #define RT5651_PWR_BST2_BIT 14
787 #define RT5651_PWR_MB1 (0x1 << 11)
788 #define RT5651_PWR_MB1_BIT 11
807 #define RT5651_PWR_OM_R (0x1 << 14)
808 #define RT5651_PWR_OM_R_BIT 14
809 #define RT5651_PWR_RM_L (0x1 << 11)
810 #define RT5651_PWR_RM_L_BIT 11
819 #define RT5651_PWR_HV_L (0x1 << 11)
820 #define RT5651_PWR_HV_L_BIT 11
875 #define RT5651_I2S_BCLK_MS2_MASK (0x1 << 11)
876 #define RT5651_I2S_BCLK_MS2_SFT 11
877 #define RT5651_I2S_BCLK_MS2_32 (0x0 << 11)
878 #define RT5651_I2S_BCLK_MS2_64 (0x1 << 11)
903 #define RT5651_DAHPF_EN (0x1 << 11)
904 #define RT5651_DAHPF_EN_SFT 11
934 #define RT5651_TDM_MODE_SEL_MASK (0x1 << 14)
935 #define RT5651_TDM_MODE_SEL_SFT 14
936 #define RT5651_TDM_MODE_SEL_NOR (0x0 << 14)
937 #define RT5651_TDM_MODE_SEL_TDM (0x1 << 14)
988 #define RT5651_TDM_CH_VAL_SEL_MASK (0x1 << 14)
989 #define RT5651_TDM_CH_VAL_SEL_SFT 14
990 #define RT5651_TDM_CH_VAL_SEL_CH01 (0x0 << 14)
991 #define RT5651_TDM_CH_VAL_SEL_CH0123 (0x1 << 14)
996 #define RT5651_TDM_LRCK_PULSE_SEL_MASK (0x1 << 11)
997 #define RT5651_TDM_LRCK_PULSE_SEL_SFT 11
998 #define RT5651_TDM_LRCK_PULSE_SEL_BCLK (0x0 << 11)
999 #define RT5651_TDM_LRCK_PULSE_SEL_CH (0x1 << 11)
1062 #define RT5651_SCLK_SRC_MASK (0x3 << 14)
1063 #define RT5651_SCLK_SRC_SFT 14
1064 #define RT5651_SCLK_SRC_MCLK (0x0 << 14)
1065 #define RT5651_SCLK_SRC_PLL1 (0x1 << 14)
1066 #define RT5651_SCLK_SRC_RCCLK (0x2 << 14)
1091 #define RT5651_PLL_M_BP (0x1 << 11)
1092 #define RT5651_PLL_M_BP_SFT 11
1103 #define RT5651_ASRC2_REF_MASK (0x1 << 11)
1104 #define RT5651_ASRC2_REF_SFT 11
1105 #define RT5651_ASRC2_REF_LRCK2 (0x0 << 11)
1106 #define RT5651_ASRC2_REF_LRCK1 (0x1 << 11)
1115 #define RT5651_STO2_ASRC_EN (0x1 << 14)
1116 #define RT5651_STO2_ASRC_EN_SFT 14
1125 #define RT5651_ADC_M_MASK (0x1 << 11)
1126 #define RT5651_ADC_M_SFT 11
1127 #define RT5651_ADC_M_NOR (0x0 << 11)
1128 #define RT5651_ADC_M_ASRC (0x1 << 11)
1240 #define RT5651_BPS_MASK (0x1 << 11)
1241 #define RT5651_BPS_SFT 11
1242 #define RT5651_BPS_DIS (0x0 << 11)
1243 #define RT5651_BPS_EN (0x1 << 11)
1284 #define RT5651_OSW_L_MASK (0x1 << 11)
1285 #define RT5651_OSW_L_SFT 11
1286 #define RT5651_OSW_L_DIS (0x0 << 11)
1287 #define RT5651_OSW_L_EN (0x1 << 11)
1313 #define RT5651_MIC1_OVCD_MASK (0x1 << 11)
1314 #define RT5651_MIC1_OVCD_SFT 11
1315 #define RT5651_MIC1_OVCD_DIS (0x0 << 11)
1316 #define RT5651_MIC1_OVCD_EN (0x1 << 11)
1334 #define RT5651_JD_PU (0x1 << 11)
1335 #define RT5651_JD_PU_SFT 11
1364 #define RT5651_EQ_UPD (0x1 << 14)
1365 #define RT5651_EQ_UPD_BIT 14
1443 #define RT5651_ALC_MASK (0x1 << 14)
1444 #define RT5651_ALC_SFT 14
1445 #define RT5651_ALC_DIS (0x0 << 14)
1446 #define RT5651_ALC_EN (0x1 << 14)
1504 #define RT5651_JD_HP_MASK (0x1 << 11)
1505 #define RT5651_JD_HP_SFT 11
1506 #define RT5651_JD_HP_DIS (0x0 << 11)
1507 #define RT5651_JD_HP_EN (0x1 << 11)
1561 #define RT5651_JD_P_MASK (0x1 << 11)
1562 #define RT5651_JD_P_SFT 11
1563 #define RT5651_JD_P_NOR (0x0 << 11)
1564 #define RT5651_JD_P_INV (0x1 << 11)
1589 #define RT5651_MB1_OC_STKY_MASK (0x1 << 11)
1590 #define RT5651_MB1_OC_STKY_SFT 11
1591 #define RT5651_MB1_OC_STKY_DIS (0x0 << 11)
1592 #define RT5651_MB1_OC_STKY_EN (0x1 << 11)
1606 #define RT5651_STA_JD2 (0x1 << 14)
1607 #define RT5651_STA_JD2_BIT 14
1612 #define RT5651_STA_GP7 (0x1 << 11)
1613 #define RT5651_STA_GP7_BIT 11
1634 #define RT5651_GP2_PIN_MASK (0x1 << 14)
1635 #define RT5651_GP2_PIN_SFT 14
1636 #define RT5651_GP2_PIN_GPIO2 (0x0 << 14)
1637 #define RT5651_GP2_PIN_DMIC1_SCL (0x1 << 14)
1668 #define RT5651_GP5_DR_MASK (0x1 << 14)
1669 #define RT5651_GP5_DR_SFT 14
1670 #define RT5651_GP5_DR_IN (0x0 << 14)
1671 #define RT5651_GP5_DR_OUT (0x1 << 14)
1680 #define RT5651_GP4_DR_MASK (0x1 << 11)
1681 #define RT5651_GP4_DR_SFT 11
1682 #define RT5651_GP4_DR_IN (0x0 << 11)
1683 #define RT5651_GP4_DR_OUT (0x1 << 11)
1772 #define RT5651_SCB_MASK (0x1 << 14)
1773 #define RT5651_SCB_SFT 14
1774 #define RT5651_SCB_DIS (0x0 << 14)
1775 #define RT5651_SCB_EN (0x1 << 14)
1802 #define RT5651_M_MP3_R_MASK (0x1 << 14)
1803 #define RT5651_M_MP3_R_SFT 14
1834 #define RT5651_3D_HP_MASK (0x1 << 14)
1835 #define RT5651_3D_HP_SFT 14
1836 #define RT5651_3D_HP_DIS (0x0 << 14)
1837 #define RT5651_3D_HP_EN (0x1 << 14)
1842 #define RT5651_3D_1F_MIX_MASK (0x3 << 11)
1843 #define RT5651_3D_1F_MIX_SFT 11
1882 #define RT5651_SI_DAC_MASK (0x1 << 11)
1883 #define RT5651_SI_DAC_SFT 11
1884 #define RT5651_SI_DAC_AUTO (0x0 << 11)
1885 #define RT5651_SI_DAC_TEST (0x1 << 11)
1931 #define RT5651_ZCD_DIG_MASK (0x1 << 11)
1932 #define RT5651_ZCD_DIG_SFT 11
1933 #define RT5651_ZCD_DIG_DIS (0x0 << 11)
1934 #define RT5651_ZCD_DIG_EN (0x1 << 11)
2015 #define RT5651_WND_WIND_MASK (0x1 << 13) /* Read-Only */
2017 #define RT5651_WND_STRONG_MASK (0x1 << 12) /* Read-Only */
2026 #define RT5651_DP_ATT_MASK (0x3 << 14)
2027 #define RT5651_DP_ATT_SFT 14