Lines Matching +full:11 +full:- +full:14
1 /* SPDX-License-Identifier: GPL-2.0-only */
3 * rt5640.h -- RT5640 ALSA SoC audio driver
15 #include <dt-bindings/sound/rt5640.h>
22 /* I/O - Output */
27 /* I/O - Input */
31 /* I/O - ADC/DAC/DMIC */
38 /* Mixer - D-D */
48 /* Mixer - ADC */
53 /* Mixer - DAC */
78 /* Format - ADC/DAC */
84 /* Function - Analog */
102 /* Function - Digital */
185 #define RT5640_VOL_L_MUTE (0x1 << 14)
186 #define RT5640_VOL_L_SFT 14
257 #define RT5640_ADC_L_BST_MASK (0x3 << 14)
258 #define RT5640_ADC_L_BST_SFT 14
265 #define RT5640_M_ADC_L1 (0x1 << 14)
266 #define RT5640_M_ADC_L1_SFT 14
284 #define RT5640_M_MONO_ADC_L1 (0x1 << 14)
285 #define RT5640_M_MONO_ADC_L1_SFT 14
314 #define RT5640_M_IF1_DAC_L (0x1 << 14)
315 #define RT5640_M_IF1_DAC_L_SFT 14
322 #define RT5640_M_DAC_L1 (0x1 << 14)
323 #define RT5640_M_DAC_L1_SFT 14
328 #define RT5640_DAC_L2_STO_L_VOL_MASK (0x1 << 11)
329 #define RT5640_DAC_L2_STO_L_VOL_SFT 11
344 #define RT5640_M_DAC_L1_MONO_L (0x1 << 14)
345 #define RT5640_M_DAC_L1_MONO_L_SFT 14
350 #define RT5640_DAC_L2_MONO_L_VOL_MASK (0x1 << 11)
351 #define RT5640_DAC_L2_MONO_L_VOL_SFT 11
372 #define RT5640_STO_L_DAC_L_VOL_MASK (0x1 << 14)
373 #define RT5640_STO_L_DAC_L_VOL_SFT 14
378 #define RT5640_M_STO_R_DAC_R (0x1 << 11)
379 #define RT5640_M_STO_R_DAC_R_SFT 11
392 #define RT5640_TXDP_SRC_MASK (0x1 << 14)
393 #define RT5640_TXDP_SRC_SFT 14
394 #define RT5640_TXDP_SRC_NOR (0x0 << 14)
395 #define RT5640_TXDP_SRC_DIV3 (0x1 << 14)
398 #define RT5640_DAC_L2_SEL_MASK (0x3 << 14)
399 #define RT5640_DAC_L2_SEL_SFT 14
400 #define RT5640_DAC_L2_SEL_IF2 (0x0 << 14)
401 #define RT5640_DAC_L2_SEL_IF3 (0x1 << 14)
402 #define RT5640_DAC_L2_SEL_TXDC (0x2 << 14)
403 #define RT5640_DAC_L2_SEL_BASS (0x3 << 14)
409 #define RT5640_IF2_ADC_L_SEL_MASK (0x1 << 11)
410 #define RT5640_IF2_ADC_L_SEL_SFT 11
411 #define RT5640_IF2_ADC_L_SEL_TXDP (0x0 << 11)
412 #define RT5640_IF2_ADC_L_SEL_PASS (0x1 << 11)
443 #define RT5640_IF1_DAC_SEL_MASK (0x3 << 14)
444 #define RT5640_IF1_DAC_SEL_SFT 14
445 #define RT5640_IF1_DAC_SEL_NOR (0x0 << 14)
446 #define RT5640_IF1_DAC_SEL_SWAP (0x1 << 14)
447 #define RT5640_IF1_DAC_SEL_L2R (0x2 << 14)
448 #define RT5640_IF1_DAC_SEL_R2L (0x3 << 14)
547 #define RT5640_M_DAC1_HM (0x1 << 14)
548 #define RT5640_M_DAC1_HM_SFT 14
555 #define RT5640_G_RM_L_SM_L_MASK (0x3 << 14)
556 #define RT5640_G_RM_L_SM_L_SFT 14
577 #define RT5640_G_RM_R_SM_R_MASK (0x3 << 14)
578 #define RT5640_G_RM_R_SM_R_SFT 14
601 #define RT5640_M_DAC_L1_SPM_L (0x1 << 14)
602 #define RT5640_M_DAC_L1_SPM_L_SFT 14
607 #define RT5640_M_BST1_SPM_L (0x1 << 11)
608 #define RT5640_M_BST1_SPM_L_SFT 11
615 #define RT5640_M_BST1_SPM_R (0x1 << 11)
616 #define RT5640_M_BST1_SPM_R_SFT 11
625 #define RT5640_M_DAC_L2_MM (0x1 << 14)
626 #define RT5640_M_DAC_L2_MM_SFT 14
631 #define RT5640_M_BST1_MM (0x1 << 11)
632 #define RT5640_M_BST1_MM_SFT 11
719 #define RT5640_M_DAC_R1_LM (0x1 << 14)
720 #define RT5640_M_DAC_R1_LM_SFT 14
725 #define RT5640_G_LOUTMIX_MASK (0x1 << 11)
726 #define RT5640_G_LOUTMIX_SFT 11
731 #define RT5640_PWR_I2S2 (0x1 << 14)
732 #define RT5640_PWR_I2S2_BIT 14
735 #define RT5640_PWR_DAC_R1 (0x1 << 11)
736 #define RT5640_PWR_DAC_R1_BIT 11
751 #define RT5640_PWR_ADC_MF_L (0x1 << 14)
752 #define RT5640_PWR_ADC_MF_L_BIT 14
761 #define RT5640_PWR_FV1 (0x1 << 14)
762 #define RT5640_PWR_FV1_BIT 14
767 #define RT5640_PWR_BG (0x1 << 11)
768 #define RT5640_PWR_BG_BIT 11
789 #define RT5640_PWR_BST2 (0x1 << 14)
790 #define RT5640_PWR_BST2_BIT 14
795 #define RT5640_PWR_MB1 (0x1 << 11)
796 #define RT5640_PWR_MB1_BIT 11
803 #define RT5640_PWR_OM_R (0x1 << 14)
804 #define RT5640_PWR_OM_R_BIT 14
809 #define RT5640_PWR_RM_L (0x1 << 11)
810 #define RT5640_PWR_RM_L_BIT 11
817 #define RT5640_PWR_SV_R (0x1 << 14)
818 #define RT5640_PWR_SV_R_BIT 14
823 #define RT5640_PWR_HV_L (0x1 << 11)
824 #define RT5640_PWR_HV_L_BIT 11
887 #define RT5640_I2S_BCLK_MS2_MASK (0x1 << 11)
888 #define RT5640_I2S_BCLK_MS2_SFT 11
889 #define RT5640_I2S_BCLK_MS2_32 (0x0 << 11)
890 #define RT5640_I2S_BCLK_MS2_64 (0x1 << 11)
929 #define RT5640_DAC_L_OSR_MASK (0x3 << 14)
930 #define RT5640_DAC_L_OSR_SFT 14
931 #define RT5640_DAC_L_OSR_128 (0x0 << 14)
932 #define RT5640_DAC_L_OSR_64 (0x1 << 14)
933 #define RT5640_DAC_L_OSR_32 (0x2 << 14)
934 #define RT5640_DAC_L_OSR_16 (0x3 << 14)
941 #define RT5640_DAHPF_EN (0x1 << 11)
942 #define RT5640_DAHPF_EN_SFT 11
951 #define RT5640_DMIC_2_EN_MASK (0x1 << 14)
952 #define RT5640_DMIC_2_EN_SFT 14
953 #define RT5640_DMIC_2_DIS (0x0 << 14)
954 #define RT5640_DMIC_2_EN (0x1 << 14)
963 #define RT5640_DMIC_1_DP_MASK (0x1 << 11)
964 #define RT5640_DMIC_1_DP_SFT 11
965 #define RT5640_DMIC_1_DP_GPIO3 (0x0 << 11)
966 #define RT5640_DMIC_1_DP_IN1P (0x1 << 11)
983 #define RT5640_SCLK_SRC_MASK (0x3 << 14)
984 #define RT5640_SCLK_SRC_SFT 14
985 #define RT5640_SCLK_SRC_MCLK (0x0 << 14)
986 #define RT5640_SCLK_SRC_PLL1 (0x1 << 14)
987 #define RT5640_SCLK_SRC_RCCLK (0x2 << 14)
1013 #define RT5640_PLL_M_BP (0x1 << 11)
1014 #define RT5640_PLL_M_BP_SFT 11
1021 #define RT5640_M1_T_MASK (0x1 << 14)
1022 #define RT5640_M1_T_SFT 14
1023 #define RT5640_M1_T_I2S2 (0x0 << 14)
1024 #define RT5640_M1_T_I2S2_D3 (0x1 << 14)
1047 #define RT5640_MDA_R_M_MASK (0x1 << 14)
1048 #define RT5640_MDA_R_M_SFT 14
1049 #define RT5640_MDA_R_M_NOR (0x0 << 14)
1050 #define RT5640_MDA_R_M_ASYN (0x1 << 14)
1059 #define RT5640_ADC_M_MASK (0x1 << 11)
1060 #define RT5640_ADC_M_SFT 11
1061 #define RT5640_ADC_M_NOR (0x0 << 11)
1062 #define RT5640_ADC_M_ASYN (0x1 << 11)
1120 #define RT5640_CLSD_OM_MASK (0x1 << 11)
1121 #define RT5640_CLSD_OM_SFT 11
1122 #define RT5640_CLSD_OM_MONO (0x0 << 11)
1123 #define RT5640_CLSD_OM_STO (0x1 << 11)
1184 #define RT5640_BPS_MASK (0x1 << 11)
1185 #define RT5640_BPS_SFT 11
1186 #define RT5640_BPS_DIS (0x0 << 11)
1187 #define RT5640_BPS_EN (0x1 << 11)
1228 #define RT5640_OSW_L_MASK (0x1 << 11)
1229 #define RT5640_OSW_L_SFT 11
1230 #define RT5640_OSW_L_DIS (0x0 << 11)
1231 #define RT5640_OSW_L_EN (0x1 << 11)
1253 #define RT5640_SPK_AG_MASK (0x1 << 14)
1254 #define RT5640_SPK_AG_SFT 14
1255 #define RT5640_SPK_AG_DIS (0x0 << 14)
1256 #define RT5640_SPK_AG_EN (0x1 << 14)
1263 #define RT5640_MIC2_BS_MASK (0x1 << 14)
1264 #define RT5640_MIC2_BS_SFT 14
1265 #define RT5640_MIC2_BS_9AV (0x0 << 14)
1266 #define RT5640_MIC2_BS_75AV (0x1 << 14)
1275 #define RT5640_MIC1_OVCD_MASK (0x1 << 11)
1276 #define RT5640_MIC1_OVCD_SFT 11
1277 #define RT5640_MIC1_OVCD_DIS (0x0 << 11)
1278 #define RT5640_MIC1_OVCD_EN (0x1 << 11)
1307 #define RT5640_EQ_UPD (0x1 << 14)
1308 #define RT5640_EQ_UPD_BIT 14
1369 #define RT5640_DRC_AGC_MASK (0x1 << 14)
1370 #define RT5640_DRC_AGC_SFT 14
1371 #define RT5640_DRC_AGC_DIS (0x0 << 14)
1372 #define RT5640_DRC_AGC_EN (0x1 << 14)
1425 #define RT5640_ANC_MASK (0x1 << 14)
1426 #define RT5640_ANC_SFT 14
1427 #define RT5640_ANC_DIS (0x0 << 14)
1428 #define RT5640_ANC_EN (0x1 << 14)
1435 #define RT5640_ANC_SN_MASK (0x1 << 11)
1436 #define RT5640_ANC_SN_SFT 11
1437 #define RT5640_ANC_SN_DIS (0x0 << 11)
1438 #define RT5640_ANC_SN_EN (0x1 << 11)
1488 #define RT5640_JD_HP_MASK (0x1 << 11)
1489 #define RT5640_JD_HP_SFT 11
1490 #define RT5640_JD_HP_DIS (0x0 << 11)
1491 #define RT5640_JD_HP_EN (0x1 << 11)
1564 #define RT5640_IRQ_OT_MASK (0x1 << 14)
1565 #define RT5640_IRQ_OT_SFT 14
1566 #define RT5640_IRQ_OT_BP (0x0 << 14)
1567 #define RT5640_IRQ_OT_NOR (0x1 << 14)
1576 #define RT5640_JD_P_MASK (0x1 << 11)
1577 #define RT5640_JD_P_SFT 11
1578 #define RT5640_JD_P_NOR (0x0 << 11)
1579 #define RT5640_JD_P_INV (0x1 << 11)
1590 #define RT5640_IRQ_MB2_OC_MASK (0x1 << 14)
1591 #define RT5640_IRQ_MB2_OC_SFT 14
1592 #define RT5640_IRQ_MB2_OC_BP (0x0 << 14)
1593 #define RT5640_IRQ_MB2_OC_NOR (0x1 << 14)
1594 #define RT5640_MB1_OC_STKY_MASK (0x1 << 11)
1595 #define RT5640_MB1_OC_STKY_SFT 11
1596 #define RT5640_MB1_OC_STKY_DIS (0x0 << 11)
1597 #define RT5640_MB1_OC_STKY_EN (0x1 << 11)
1627 #define RT5640_GP2_PIN_MASK (0x1 << 14)
1628 #define RT5640_GP2_PIN_SFT 14
1629 #define RT5640_GP2_PIN_GPIO2 (0x0 << 14)
1630 #define RT5640_GP2_PIN_DMIC1_SCL (0x1 << 14)
1636 #define RT5640_GP4_PIN_MASK (0x1 << 11)
1637 #define RT5640_GP4_PIN_SFT 11
1638 #define RT5640_GP4_PIN_GPIO4 (0x0 << 11)
1639 #define RT5640_GP4_PIN_DMIC2_SDA (0x1 << 11)
1650 #define RT5640_GP4_PF_MASK (0x1 << 11)
1651 #define RT5640_GP4_PF_SFT 11
1652 #define RT5640_GP4_PF_IN (0x0 << 11)
1653 #define RT5640_GP4_PF_OUT (0x1 << 11)
1699 /* FM34-500 Register Control 1 (0xc4) */
1702 /* FM34-500 Register Control 2 (0xc5) */
1705 /* FM34-500 Register Control 3 (0xc6) */
1708 #define RT5640_DSP_DS_MASK (0x1 << 14)
1709 #define RT5640_DSP_DS_SFT 14
1710 #define RT5640_DSP_DS_FM3010 (0x1 << 14)
1711 #define RT5640_DSP_DS_TEMP (0x1 << 14)
1718 #define RT5640_DSP_PD_PIN_MASK (0x1 << 11)
1719 #define RT5640_DSP_PD_PIN_SFT 11
1720 #define RT5640_DSP_PD_PIN_LO (0x0 << 11)
1721 #define RT5640_DSP_PD_PIN_HI (0x1 << 11)
1740 #define RT5640_SEQ1_ST_MASK (0x1 << 11) /*RO*/
1741 #define RT5640_SEQ1_ST_SFT 11
1742 #define RT5640_SEQ1_ST_RUN (0x0 << 11)
1743 #define RT5640_SEQ1_ST_FIN (0x1 << 11)
1794 #define RT5640_SCB_MASK (0x1 << 14)
1795 #define RT5640_SCB_SFT 14
1796 #define RT5640_SCB_DIS (0x0 << 14)
1797 #define RT5640_SCB_EN (0x1 << 14)
1824 #define RT5640_M_MP3_R_MASK (0x1 << 14)
1825 #define RT5640_M_MP3_R_SFT 14
1856 #define RT5640_3D_HP_MASK (0x1 << 14)
1857 #define RT5640_3D_HP_SFT 14
1858 #define RT5640_3D_HP_DIS (0x0 << 14)
1859 #define RT5640_3D_HP_EN (0x1 << 14)
1864 #define RT5640_3D_1F_MIX_MASK (0x3 << 11)
1865 #define RT5640_3D_1F_MIX_SFT 11
1886 #define RT5640_1ST_HPF_MASK (0x1 << 11)
1887 #define RT5640_1ST_HPF_SFT 11
1888 #define RT5640_1ST_HPF_DIS (0x0 << 11)
1889 #define RT5640_1ST_HPF_EN (0x1 << 11)
1902 #define RT5640_SI_DAC_MASK (0x1 << 11)
1903 #define RT5640_SI_DAC_SFT 11
1904 #define RT5640_SI_DAC_AUTO (0x0 << 11)
1905 #define RT5640_SI_DAC_TEST (0x1 << 11)
1943 #define RT5640_SPO_SV_MASK (0x1 << 14)
1944 #define RT5640_SPO_SV_SFT 14
1945 #define RT5640_SPO_SV_DIS (0x0 << 14)
1946 #define RT5640_SPO_SV_EN (0x1 << 14)
1955 #define RT5640_ZCD_DIG_MASK (0x1 << 11)
1956 #define RT5640_ZCD_DIG_SFT 11
1957 #define RT5640_ZCD_DIG_DIS (0x0 << 11)
1958 #define RT5640_ZCD_DIG_EN (0x1 << 11)
1981 #define RT5640_EN_LOUT_DF (0x1 << 14)
1982 #define RT5640_EN_LOUT_DF_SFT 14
1987 #define RT5640_MCLK_DET (0x1 << 11)
2052 #define RT5640_WND_WIND_MASK (0x1 << 13) /* Read-Only */
2054 #define RT5640_WND_STRONG_MASK (0x1 << 12) /* Read-Only */
2063 #define RT5640_DP_ATT_MASK (0x3 << 14)
2064 #define RT5640_DP_ATT_SFT 14