Lines Matching +full:0 +full:x00000400
32 #define RT274_VENDOR_ID 0x10ec0274
49 { 0x00, 0x1004 },
50 { 0x01, 0xaaaa },
51 { 0x02, 0x88aa },
52 { 0x03, 0x0002 },
53 { 0x04, 0xaa09 },
54 { 0x05, 0x0700 },
55 { 0x06, 0x6110 },
56 { 0x07, 0x0200 },
57 { 0x08, 0xa807 },
58 { 0x09, 0x0021 },
59 { 0x0a, 0x7770 },
60 { 0x0b, 0x7770 },
61 { 0x0c, 0x002b },
62 { 0x0d, 0x2420 },
63 { 0x0e, 0x65c0 },
64 { 0x0f, 0x7770 },
65 { 0x10, 0x0420 },
66 { 0x11, 0x7418 },
67 { 0x12, 0x6bd0 },
68 { 0x13, 0x645f },
69 { 0x14, 0x0400 },
70 { 0x15, 0x8ccc },
71 { 0x16, 0x4c50 },
72 { 0x17, 0xff00 },
73 { 0x18, 0x0003 },
74 { 0x19, 0x2c11 },
75 { 0x1a, 0x830b },
76 { 0x1b, 0x4e4b },
77 { 0x1c, 0x0000 },
78 { 0x1d, 0x0000 },
79 { 0x1e, 0x0000 },
80 { 0x1f, 0x0000 },
81 { 0x20, 0x51ff },
82 { 0x21, 0x8000 },
83 { 0x22, 0x8f00 },
84 { 0x23, 0x88f4 },
85 { 0x24, 0x0000 },
86 { 0x25, 0x0000 },
87 { 0x26, 0x0000 },
88 { 0x27, 0x0000 },
89 { 0x28, 0x0000 },
90 { 0x29, 0x3000 },
91 { 0x2a, 0x0000 },
92 { 0x2b, 0x0000 },
93 { 0x2c, 0x0f00 },
94 { 0x2d, 0x100f },
95 { 0x2e, 0x2902 },
96 { 0x2f, 0xe280 },
97 { 0x30, 0x1000 },
98 { 0x31, 0x8400 },
99 { 0x32, 0x5aaa },
100 { 0x33, 0x8420 },
101 { 0x34, 0xa20c },
102 { 0x35, 0x096a },
103 { 0x36, 0x5757 },
104 { 0x37, 0xfe05 },
105 { 0x38, 0x4901 },
106 { 0x39, 0x110a },
107 { 0x3a, 0x0010 },
108 { 0x3b, 0x60d9 },
109 { 0x3c, 0xf214 },
110 { 0x3d, 0xc2ba },
111 { 0x3e, 0xa928 },
112 { 0x3f, 0x0000 },
113 { 0x40, 0x9800 },
114 { 0x41, 0x0000 },
115 { 0x42, 0x2000 },
116 { 0x43, 0x3d90 },
117 { 0x44, 0x4900 },
118 { 0x45, 0x5289 },
119 { 0x46, 0x0004 },
120 { 0x47, 0xa47a },
121 { 0x48, 0xd049 },
122 { 0x49, 0x0049 },
123 { 0x4a, 0xa83b },
124 { 0x4b, 0x0777 },
125 { 0x4c, 0x065c },
126 { 0x4d, 0x7fff },
127 { 0x4e, 0x7fff },
128 { 0x4f, 0x0000 },
129 { 0x50, 0x0000 },
130 { 0x51, 0x0000 },
131 { 0x52, 0xbf5f },
132 { 0x53, 0x3320 },
133 { 0x54, 0xcc00 },
134 { 0x55, 0x0000 },
135 { 0x56, 0x3f00 },
136 { 0x57, 0x0000 },
137 { 0x58, 0x0000 },
138 { 0x59, 0x0000 },
139 { 0x5a, 0x1300 },
140 { 0x5b, 0x005f },
141 { 0x5c, 0x0000 },
142 { 0x5d, 0x1001 },
143 { 0x5e, 0x1000 },
144 { 0x5f, 0x0000 },
145 { 0x60, 0x5554 },
146 { 0x61, 0xffc0 },
147 { 0x62, 0xa000 },
148 { 0x63, 0xd010 },
149 { 0x64, 0x0000 },
150 { 0x65, 0x3fb1 },
151 { 0x66, 0x1881 },
152 { 0x67, 0xc810 },
153 { 0x68, 0x2000 },
154 { 0x69, 0xfff0 },
155 { 0x6a, 0x0300 },
156 { 0x6b, 0x5060 },
157 { 0x6c, 0x0000 },
158 { 0x6d, 0x0000 },
159 { 0x6e, 0x0c25 },
160 { 0x6f, 0x0c0b },
161 { 0x70, 0x8000 },
162 { 0x71, 0x4008 },
163 { 0x72, 0x0000 },
164 { 0x73, 0x0800 },
165 { 0x74, 0xa28f },
166 { 0x75, 0xa050 },
167 { 0x76, 0x7fe8 },
168 { 0x77, 0xdb8c },
169 { 0x78, 0x0000 },
170 { 0x79, 0x0000 },
171 { 0x7a, 0x2a96 },
172 { 0x7b, 0x800f },
173 { 0x7c, 0x0200 },
174 { 0x7d, 0x1600 },
175 { 0x7e, 0x0000 },
176 { 0x7f, 0x0000 },
181 { 0x00170500, 0x00000400 },
182 { 0x00220000, 0x00000031 },
183 { 0x00239000, 0x00000057 },
184 { 0x0023a000, 0x00000057 },
185 { 0x00270500, 0x00000400 },
186 { 0x00370500, 0x00000400 },
187 { 0x00870500, 0x00000400 },
188 { 0x00920000, 0x00000031 },
189 { 0x00935000, 0x00000097 },
190 { 0x00936000, 0x00000097 },
191 { 0x00970500, 0x00000400 },
192 { 0x00b37000, 0x00000400 },
193 { 0x00b37200, 0x00000400 },
194 { 0x00b37300, 0x00000400 },
195 { 0x00c37000, 0x00000400 },
196 { 0x00c37100, 0x00000400 },
197 { 0x01270500, 0x00000400 },
198 { 0x01370500, 0x00000400 },
199 { 0x01371f00, 0x411111f0 },
200 { 0x01937000, 0x00000000 },
201 { 0x01970500, 0x00000400 },
202 { 0x02050000, 0x0000001b },
203 { 0x02139000, 0x00000080 },
204 { 0x0213a000, 0x00000080 },
205 { 0x02170100, 0x00000001 },
206 { 0x02170500, 0x00000400 },
207 { 0x02170700, 0x00000000 },
208 { 0x02270100, 0x00000000 },
209 { 0x02370100, 0x00000000 },
210 { 0x01970700, 0x00000020 },
211 { 0x00830000, 0x00000097 },
212 { 0x00930000, 0x00000097 },
213 { 0x01270700, 0x00000000 },
219 case 0 ... 0xff: in rt274_volatile_register()
224 case VERB_CMD(AC_VERB_GET_EAPD_BTLENABLE, RT274_MIC, 0): in rt274_volatile_register()
225 case VERB_CMD(AC_VERB_GET_EAPD_BTLENABLE, RT274_HP_OUT, 0): in rt274_volatile_register()
226 case VERB_CMD(AC_VERB_GET_STREAM_FORMAT, RT274_DAC_OUT0, 0): in rt274_volatile_register()
227 case VERB_CMD(AC_VERB_GET_STREAM_FORMAT, RT274_DAC_OUT1, 0): in rt274_volatile_register()
228 case VERB_CMD(AC_VERB_GET_STREAM_FORMAT, RT274_ADC_IN1, 0): in rt274_volatile_register()
229 case VERB_CMD(AC_VERB_GET_STREAM_FORMAT, RT274_ADC_IN2, 0): in rt274_volatile_register()
230 case VERB_CMD(AC_VERB_GET_AMP_GAIN_MUTE, RT274_DAC_OUT0, 0): in rt274_volatile_register()
231 case VERB_CMD(AC_VERB_GET_AMP_GAIN_MUTE, RT274_DAC_OUT1, 0): in rt274_volatile_register()
232 case VERB_CMD(AC_VERB_GET_AMP_GAIN_MUTE, RT274_ADC_IN1, 0): in rt274_volatile_register()
233 case VERB_CMD(AC_VERB_GET_AMP_GAIN_MUTE, RT274_ADC_IN2, 0): in rt274_volatile_register()
234 case VERB_CMD(AC_VERB_GET_AMP_GAIN_MUTE, RT274_DMIC1, 0): in rt274_volatile_register()
235 case VERB_CMD(AC_VERB_GET_AMP_GAIN_MUTE, RT274_DMIC2, 0): in rt274_volatile_register()
236 case VERB_CMD(AC_VERB_GET_AMP_GAIN_MUTE, RT274_MIC, 0): in rt274_volatile_register()
237 case VERB_CMD(AC_VERB_GET_AMP_GAIN_MUTE, RT274_LINE1, 0): in rt274_volatile_register()
238 case VERB_CMD(AC_VERB_GET_AMP_GAIN_MUTE, RT274_LINE2, 0): in rt274_volatile_register()
239 case VERB_CMD(AC_VERB_GET_AMP_GAIN_MUTE, RT274_HP_OUT, 0): in rt274_volatile_register()
240 case VERB_CMD(AC_VERB_GET_CONNECT_SEL, RT274_HP_OUT, 0): in rt274_volatile_register()
241 case VERB_CMD(AC_VERB_GET_CONNECT_SEL, RT274_MIXER_IN1, 0): in rt274_volatile_register()
242 case VERB_CMD(AC_VERB_GET_CONNECT_SEL, RT274_MIXER_IN2, 0): in rt274_volatile_register()
243 case VERB_CMD(AC_VERB_GET_PIN_WIDGET_CONTROL, RT274_DMIC1, 0): in rt274_volatile_register()
244 case VERB_CMD(AC_VERB_GET_PIN_WIDGET_CONTROL, RT274_DMIC2, 0): in rt274_volatile_register()
245 case VERB_CMD(AC_VERB_GET_PIN_WIDGET_CONTROL, RT274_MIC, 0): in rt274_volatile_register()
246 case VERB_CMD(AC_VERB_GET_PIN_WIDGET_CONTROL, RT274_LINE1, 0): in rt274_volatile_register()
247 case VERB_CMD(AC_VERB_GET_PIN_WIDGET_CONTROL, RT274_LINE2, 0): in rt274_volatile_register()
248 case VERB_CMD(AC_VERB_GET_PIN_WIDGET_CONTROL, RT274_HP_OUT, 0): in rt274_volatile_register()
249 case VERB_CMD(AC_VERB_GET_UNSOLICITED_RESPONSE, RT274_HP_OUT, 0): in rt274_volatile_register()
250 case VERB_CMD(AC_VERB_GET_UNSOLICITED_RESPONSE, RT274_MIC, 0): in rt274_volatile_register()
251 case VERB_CMD(AC_VERB_GET_UNSOLICITED_RESPONSE, RT274_INLINE_CMD, 0): in rt274_volatile_register()
263 case 0 ... 0xff: in rt274_readable_register()
303 case VERB_CMD(AC_VERB_GET_EAPD_BTLENABLE, RT274_MIC, 0): in rt274_readable_register()
304 case VERB_CMD(AC_VERB_GET_EAPD_BTLENABLE, RT274_HP_OUT, 0): in rt274_readable_register()
305 case VERB_CMD(AC_VERB_GET_STREAM_FORMAT, RT274_DAC_OUT0, 0): in rt274_readable_register()
306 case VERB_CMD(AC_VERB_GET_STREAM_FORMAT, RT274_DAC_OUT1, 0): in rt274_readable_register()
307 case VERB_CMD(AC_VERB_GET_STREAM_FORMAT, RT274_ADC_IN1, 0): in rt274_readable_register()
308 case VERB_CMD(AC_VERB_GET_STREAM_FORMAT, RT274_ADC_IN2, 0): in rt274_readable_register()
309 case VERB_CMD(AC_VERB_GET_AMP_GAIN_MUTE, RT274_DAC_OUT0, 0): in rt274_readable_register()
310 case VERB_CMD(AC_VERB_GET_AMP_GAIN_MUTE, RT274_DAC_OUT1, 0): in rt274_readable_register()
311 case VERB_CMD(AC_VERB_GET_AMP_GAIN_MUTE, RT274_ADC_IN1, 0): in rt274_readable_register()
312 case VERB_CMD(AC_VERB_GET_AMP_GAIN_MUTE, RT274_ADC_IN2, 0): in rt274_readable_register()
313 case VERB_CMD(AC_VERB_GET_AMP_GAIN_MUTE, RT274_DMIC1, 0): in rt274_readable_register()
314 case VERB_CMD(AC_VERB_GET_AMP_GAIN_MUTE, RT274_DMIC2, 0): in rt274_readable_register()
315 case VERB_CMD(AC_VERB_GET_AMP_GAIN_MUTE, RT274_MIC, 0): in rt274_readable_register()
316 case VERB_CMD(AC_VERB_GET_AMP_GAIN_MUTE, RT274_LINE1, 0): in rt274_readable_register()
317 case VERB_CMD(AC_VERB_GET_AMP_GAIN_MUTE, RT274_LINE2, 0): in rt274_readable_register()
318 case VERB_CMD(AC_VERB_GET_AMP_GAIN_MUTE, RT274_HP_OUT, 0): in rt274_readable_register()
319 case VERB_CMD(AC_VERB_GET_CONNECT_SEL, RT274_HP_OUT, 0): in rt274_readable_register()
320 case VERB_CMD(AC_VERB_GET_CONNECT_SEL, RT274_MIXER_IN1, 0): in rt274_readable_register()
321 case VERB_CMD(AC_VERB_GET_CONNECT_SEL, RT274_MIXER_IN2, 0): in rt274_readable_register()
322 case VERB_CMD(AC_VERB_GET_PIN_WIDGET_CONTROL, RT274_DMIC1, 0): in rt274_readable_register()
323 case VERB_CMD(AC_VERB_GET_PIN_WIDGET_CONTROL, RT274_DMIC2, 0): in rt274_readable_register()
324 case VERB_CMD(AC_VERB_GET_PIN_WIDGET_CONTROL, RT274_MIC, 0): in rt274_readable_register()
325 case VERB_CMD(AC_VERB_GET_PIN_WIDGET_CONTROL, RT274_LINE1, 0): in rt274_readable_register()
326 case VERB_CMD(AC_VERB_GET_PIN_WIDGET_CONTROL, RT274_LINE2, 0): in rt274_readable_register()
327 case VERB_CMD(AC_VERB_GET_PIN_WIDGET_CONTROL, RT274_HP_OUT, 0): in rt274_readable_register()
328 case VERB_CMD(AC_VERB_GET_UNSOLICITED_RESPONSE, RT274_HP_OUT, 0): in rt274_readable_register()
329 case VERB_CMD(AC_VERB_GET_UNSOLICITED_RESPONSE, RT274_MIC, 0): in rt274_readable_register()
330 case VERB_CMD(AC_VERB_GET_UNSOLICITED_RESPONSE, RT274_INLINE_CMD, 0): in rt274_readable_register()
343 for (i = 0; i < INDEX_CACHE_SIZE; i++) { in rt274_index_sync()
365 *hp = buf & 0x80000000; in rt274_jack_detect()
370 *mic = buf & 0x80000000; in rt274_jack_detect()
374 return 0; in rt274_jack_detect()
381 int status = 0; in rt274_jack_detect_work()
385 if (rt274_jack_detect(rt274, &hp, &mic) < 0) in rt274_jack_detect_work()
412 return 0; in rt274_mic_detect()
419 rt274_irq(0, rt274); in rt274_mic_detect()
421 return 0; in rt274_mic_detect()
424 static const DECLARE_TLV_DB_SCALE(out_vol_tlv, -6350, 50, 0);
425 static const DECLARE_TLV_DB_SCALE(mic_vol_tlv, 0, 1000, 0);
429 RT274_DAC0R_GAIN, 0, 0x7f, 0, out_vol_tlv),
431 RT274_DAC1R_GAIN, 0, 0x7f, 0, out_vol_tlv),
433 RT274_ADCR_GAIN, 0, 0x7f, 0, out_vol_tlv),
437 0, 0x3, 0, mic_vol_tlv),
466 SOC_DAPM_ENUM("ADC 0 source", rt274_adc0_enum);
480 0, rt274_dac_src);
487 0, rt274_dac_src);
501 SND_SOC_DAPM_PGA("DMIC1", SND_SOC_NOPM, 0, 0, NULL, 0),
502 SND_SOC_DAPM_PGA("DMIC2", SND_SOC_NOPM, 0, 0, NULL, 0),
505 SND_SOC_DAPM_ADC("ADC 0", NULL, RT274_SET_STREAMID_ADC1, 4, 0),
506 SND_SOC_DAPM_ADC("ADC 1", NULL, RT274_SET_STREAMID_ADC2, 4, 0),
509 SND_SOC_DAPM_MUX("ADC 0 Mux", SND_SOC_NOPM, 0, 0,
511 SND_SOC_DAPM_MUX("ADC 1 Mux", SND_SOC_NOPM, 0, 0,
515 SND_SOC_DAPM_AIF_IN("AIF1RXL", "AIF1 Playback", 0, SND_SOC_NOPM, 0, 0),
516 SND_SOC_DAPM_AIF_IN("AIF1RXR", "AIF1 Playback", 1, SND_SOC_NOPM, 0, 0),
517 SND_SOC_DAPM_AIF_OUT("AIF1TXL", "AIF1 Capture", 0, SND_SOC_NOPM, 0, 0),
518 SND_SOC_DAPM_AIF_OUT("AIF1TXR", "AIF1 Capture", 1, SND_SOC_NOPM, 0, 0),
519 SND_SOC_DAPM_AIF_IN("AIF2RXL", "AIF1 Playback", 2, SND_SOC_NOPM, 0, 0),
520 SND_SOC_DAPM_AIF_IN("AIF2RXR", "AIF1 Playback", 3, SND_SOC_NOPM, 0, 0),
521 SND_SOC_DAPM_AIF_OUT("AIF2TXL", "AIF1 Capture", 2, SND_SOC_NOPM, 0, 0),
522 SND_SOC_DAPM_AIF_OUT("AIF2TXR", "AIF1 Capture", 3, SND_SOC_NOPM, 0, 0),
526 SND_SOC_DAPM_DAC("DAC 0", NULL, RT274_SET_STREAMID_DAC0, 4, 0),
527 SND_SOC_DAPM_DAC("DAC 1", NULL, RT274_SET_STREAMID_DAC1, 4, 0),
530 SND_SOC_DAPM_MUX("HPO Mux", SND_SOC_NOPM, 0, 0, &rt274_hpo_mux),
531 SND_SOC_DAPM_MUX("LOUT Mux", SND_SOC_NOPM, 0, 0, &rt274_lout_mux),
534 RT274_SET_PIN_SFT, 0, NULL, 0),
536 RT274_SET_PIN_SFT, 0, NULL, 0),
539 SND_SOC_DAPM_PGA("DAC OUT0", SND_SOC_NOPM, 0, 0,
540 NULL, 0),
541 SND_SOC_DAPM_PGA("DAC OUT1", SND_SOC_NOPM, 0, 0,
542 NULL, 0),
545 SND_SOC_DAPM_SWITCH("LOUT L", SND_SOC_NOPM, 0, 0,
547 SND_SOC_DAPM_SWITCH("LOUT R", SND_SOC_NOPM, 0, 0,
549 SND_SOC_DAPM_SWITCH("HPO L", SND_SOC_NOPM, 0, 0,
551 SND_SOC_DAPM_SWITCH("HPO R", SND_SOC_NOPM, 0, 0,
564 {"ADC 0 Mux", "Mic", "MIC"},
565 {"ADC 0 Mux", "Dmic", "DMIC1"},
566 {"ADC 0 Mux", "Line1", "LINE1"},
567 {"ADC 0 Mux", "Line2", "LINE2"},
573 {"ADC 0", NULL, "ADC 0 Mux"},
576 {"AIF1TXL", NULL, "ADC 0"},
577 {"AIF1TXR", NULL, "ADC 0"},
581 {"DAC 0", NULL, "AIF1RXL"},
582 {"DAC 0", NULL, "AIF1RXR"},
586 {"DAC OUT0", NULL, "DAC 0"},
619 unsigned int val = 0; in rt274_hw_params()
620 int d_len_code = 0, c_len_code = 0; in rt274_hw_params()
623 /* bit 14 0:48K 1:44.1K */ in rt274_hw_params()
652 /* bit 3:0 Number of Channel */ in rt274_hw_params()
663 d_len_code = 0; in rt274_hw_params()
664 c_len_code = 0; in rt274_hw_params()
665 val |= (0x1 << 4); in rt274_hw_params()
670 val |= (0x4 << 4); in rt274_hw_params()
675 val |= (0x2 << 4); in rt274_hw_params()
680 val |= (0x3 << 4); in rt274_hw_params()
684 c_len_code = 0; in rt274_hw_params()
691 c_len_code = 0x3; in rt274_hw_params()
694 RT274_I2S_CTRL1, 0xc018, d_len_code << 3 | c_len_code << 14); in rt274_hw_params()
695 dev_dbg(component->dev, "format val = 0x%x\n", val); in rt274_hw_params()
697 snd_soc_component_update_bits(component, RT274_DAC_FORMAT, 0x407f, val); in rt274_hw_params()
698 snd_soc_component_update_bits(component, RT274_ADC_FORMAT, 0x407f, val); in rt274_hw_params()
700 return 0; in rt274_hw_params()
743 /* bit 15 Stream Type 0:PCM 1:Non-PCM */ in rt274_set_dai_fmt()
744 snd_soc_component_update_bits(component, RT274_DAC_FORMAT, 0x8000, 0); in rt274_set_dai_fmt()
745 snd_soc_component_update_bits(component, RT274_ADC_FORMAT, 0x8000, 0); in rt274_set_dai_fmt()
747 return 0; in rt274_set_dai_fmt()
772 (0x3 << 12), (0x3 << 12)); in rt274_set_dai_pll()
775 snd_soc_component_write(component, 0x7a, 0xaab6); in rt274_set_dai_pll()
776 snd_soc_component_write(component, 0x7b, 0x0301); in rt274_set_dai_pll()
777 snd_soc_component_write(component, 0x7c, 0x04fe); in rt274_set_dai_pll()
780 snd_soc_component_write(component, 0x7a, 0xaa96); in rt274_set_dai_pll()
781 snd_soc_component_write(component, 0x7b, 0x8003); in rt274_set_dai_pll()
782 snd_soc_component_write(component, 0x7c, 0x081e); in rt274_set_dai_pll()
785 snd_soc_component_write(component, 0x7a, 0xaa96); in rt274_set_dai_pll()
786 snd_soc_component_write(component, 0x7b, 0x8003); in rt274_set_dai_pll()
787 snd_soc_component_write(component, 0x7c, 0x080e); in rt274_set_dai_pll()
793 snd_soc_component_write(component, 0x7a, 0xaab6); in rt274_set_dai_pll()
794 snd_soc_component_write(component, 0x7b, 0x0301); in rt274_set_dai_pll()
795 snd_soc_component_write(component, 0x7c, 0x047e); in rt274_set_dai_pll()
800 return 0; in rt274_set_dai_pll()
843 RT274_I2S_CTRL2, 0x40, 0x40); in rt274_set_dai_sysclk()
851 RT274_I2S_CTRL2, 0x40, 0x0); in rt274_set_dai_sysclk()
856 RT274_MCLK_CTRL, 0x1fcf, 0x0008); in rt274_set_dai_sysclk()
861 RT274_MCLK_CTRL, 0x1fcf, 0x1543); in rt274_set_dai_sysclk()
871 return 0; in rt274_set_dai_sysclk()
881 if ((ratio / 50) == 0) in rt274_set_bclk_ratio()
883 RT274_I2S_CTRL1, 0x1000, 0x1000); in rt274_set_bclk_ratio()
886 RT274_I2S_CTRL1, 0x1000, 0x0); in rt274_set_bclk_ratio()
889 return 0; in rt274_set_bclk_ratio()
904 return 0; in rt274_set_tdm_slot()
922 return 0; in rt274_set_tdm_slot()
946 return 0; in rt274_set_bias_level()
954 int ret, status = 0; in rt274_irq()
962 if (ret == 0) { in rt274_irq()
988 return 0; in rt274_probe()
1007 return 0; in rt274_suspend()
1018 return 0; in rt274_resume()
1081 .max_register = 0x05bfffff,
1107 { "10EC0274", 0 },
1108 { "INT34C2", 0 },
1155 regmap_write(rt274->regmap, RT274_RESET, 0); in rt274_i2c_probe()
1156 regmap_update_bits(rt274->regmap, 0x1a, 0x4000, 0x4000); in rt274_i2c_probe()
1159 regmap_update_bits(rt274->regmap, RT274_PAD_CTRL12, 0x3, 0x0); in rt274_i2c_probe()
1160 regmap_write(rt274->regmap, RT274_COEF5b_INDEX, 0x01); in rt274_i2c_probe()
1161 regmap_write(rt274->regmap, RT274_COEF5b_COEF, 0x8540); in rt274_i2c_probe()
1162 regmap_update_bits(rt274->regmap, 0x6f, 0x0100, 0x0100); in rt274_i2c_probe()
1164 regmap_write(rt274->regmap, 0x4a, 0x201b); in rt274_i2c_probe()
1166 regmap_update_bits(rt274->regmap, 0x6f, 0x3000, 0x2000); in rt274_i2c_probe()
1168 regmap_update_bits(rt274->regmap, 0x6f, 0xf, 0x0); in rt274_i2c_probe()
1170 regmap_write(rt274->regmap, RT274_COEF58_INDEX, 0x00); in rt274_i2c_probe()
1171 regmap_write(rt274->regmap, RT274_COEF58_COEF, 0xb888); in rt274_i2c_probe()
1173 regmap_update_bits(rt274->regmap, 0x6f, 0xf, 0xb); in rt274_i2c_probe()
1174 regmap_write(rt274->regmap, RT274_COEF58_INDEX, 0x00); in rt274_i2c_probe()
1175 regmap_write(rt274->regmap, RT274_COEF58_COEF, 0x3888); in rt274_i2c_probe()
1177 regmap_write(rt274->regmap, RT274_SET_PIN_HPO, 0x40); in rt274_i2c_probe()
1178 regmap_write(rt274->regmap, RT274_SET_PIN_LOUT3, 0x40); in rt274_i2c_probe()
1179 regmap_write(rt274->regmap, RT274_SET_MIC, 0x20); in rt274_i2c_probe()
1180 regmap_write(rt274->regmap, RT274_SET_PIN_DMIC1, 0x20); in rt274_i2c_probe()
1182 regmap_update_bits(rt274->regmap, RT274_I2S_CTRL2, 0xc004, 0x4004); in rt274_i2c_probe()
1187 regmap_write(rt274->regmap, RT274_UNSOLICITED_HP_OUT, 0x81); in rt274_i2c_probe()
1188 regmap_write(rt274->regmap, RT274_UNSOLICITED_MIC, 0x82); in rt274_i2c_probe()
1193 if (ret != 0) { in rt274_i2c_probe()