Lines Matching +full:ignore +full:- +full:suspend +full:- +full:widgets
1 // SPDX-License-Identifier: GPL-2.0
3 // rt1308.c -- RT1308 ALSA SoC amplifier component driver
23 #include <sound/soc-dapm.h>
199 return regmap_multi_reg_write(rt1308->regmap, init_list, in rt1308_reg_init()
300 snd_soc_dapm_to_component(w->dapm); in rt1308_classd_event()
351 /* Supply Widgets */
441 return -EINVAL; in rt1308_get_clk_info()
448 return -EINVAL; in rt1308_get_clk_info()
454 struct snd_soc_component *component = dai->component; in rt1308_hw_params()
459 rt1308->lrck = params_rate(params); in rt1308_hw_params()
460 pre_div = rt1308_get_clk_info(rt1308->sysclk, rt1308->lrck); in rt1308_hw_params()
462 dev_err(component->dev, in rt1308_hw_params()
463 "Unsupported clock setting %d\n", rt1308->lrck); in rt1308_hw_params()
464 return -EINVAL; in rt1308_hw_params()
469 dev_err(component->dev, "Unsupported frame size: %d\n", in rt1308_hw_params()
471 return -EINVAL; in rt1308_hw_params()
475 rt1308->bclk = rt1308->lrck * (32 << bclk_ms); in rt1308_hw_params()
477 dev_dbg(component->dev, "bclk_ms is %d and pre_div is %d for iis %d\n", in rt1308_hw_params()
478 bclk_ms, pre_div, dai->id); in rt1308_hw_params()
480 dev_dbg(component->dev, "lrck is %dHz and pre_div is %d for iis %d\n", in rt1308_hw_params()
481 rt1308->lrck, pre_div, dai->id); in rt1308_hw_params()
497 return -EINVAL; in rt1308_hw_params()
500 switch (dai->id) { in rt1308_hw_params()
509 dev_err(component->dev, "Invalid dai->id: %d\n", dai->id); in rt1308_hw_params()
510 return -EINVAL; in rt1308_hw_params()
521 struct snd_soc_component *component = dai->component; in rt1308_set_dai_fmt()
527 rt1308->master = 0; in rt1308_set_dai_fmt()
530 return -EINVAL; in rt1308_set_dai_fmt()
546 return -EINVAL; in rt1308_set_dai_fmt()
556 return -EINVAL; in rt1308_set_dai_fmt()
559 switch (dai->id) { in rt1308_set_dai_fmt()
569 dev_err(component->dev, "Invalid dai->id: %d\n", dai->id); in rt1308_set_dai_fmt()
570 return -EINVAL; in rt1308_set_dai_fmt()
581 if (freq == rt1308->sysclk && clk_id == rt1308->sysclk_src) in rt1308_set_component_sysclk()
601 dev_err(component->dev, "Invalid clock id (%d)\n", clk_id); in rt1308_set_component_sysclk()
602 return -EINVAL; in rt1308_set_component_sysclk()
606 rt1308->sysclk = freq; in rt1308_set_component_sysclk()
607 rt1308->sysclk_src = clk_id; in rt1308_set_component_sysclk()
609 dev_dbg(component->dev, "Sysclk is %dHz and clock id is %d\n", in rt1308_set_component_sysclk()
623 if (source == rt1308->pll_src && freq_in == rt1308->pll_in && in rt1308_set_component_pll()
624 freq_out == rt1308->pll_out) in rt1308_set_component_pll()
628 dev_dbg(component->dev, "PLL disabled\n"); in rt1308_set_component_pll()
630 rt1308->pll_in = 0; in rt1308_set_component_pll()
631 rt1308->pll_out = 0; in rt1308_set_component_pll()
659 dev_err(component->dev, "Unknown PLL Source %d\n", source); in rt1308_set_component_pll()
660 return -EINVAL; in rt1308_set_component_pll()
665 dev_err(component->dev, "Unsupported input clock %d\n", freq_in); in rt1308_set_component_pll()
669 dev_dbg(component->dev, "bypass=%d m=%d n=%d k=%d\n", in rt1308_set_component_pll()
679 rt1308->pll_in = freq_in; in rt1308_set_component_pll()
680 rt1308->pll_out = freq_out; in rt1308_set_component_pll()
681 rt1308->pll_src = source; in rt1308_set_component_pll()
690 rt1308->component = component; in rt1308_probe()
699 regmap_write(rt1308->regmap, RT1308_RESET, 0); in rt1308_remove()
707 regcache_cache_only(rt1308->regmap, true); in rt1308_suspend()
708 regcache_mark_dirty(rt1308->regmap); in rt1308_suspend()
717 regcache_cache_only(rt1308->regmap, false); in rt1308_resume()
718 regcache_sync(rt1308->regmap); in rt1308_resume()
739 .name = "rt1308-aif",
754 .suspend = rt1308_suspend,
805 regmap_write(rt1308->regmap, RT1308_RESET, 0); in rt1308_efuse()
807 regmap_write(rt1308->regmap, RT1308_POWER_STATUS, 0x01800000); in rt1308_efuse()
809 regmap_write(rt1308->regmap, RT1308_EFUSE_1, 0x44fe0f00); in rt1308_efuse()
811 regmap_write(rt1308->regmap, RT1308_PVDD_OFFSET_CTL, 0x10000000); in rt1308_efuse()
820 rt1308 = devm_kzalloc(&i2c->dev, sizeof(struct rt1308_priv), in rt1308_i2c_probe()
823 return -ENOMEM; in rt1308_i2c_probe()
827 rt1308->regmap = devm_regmap_init_i2c(i2c, &rt1308_regmap); in rt1308_i2c_probe()
828 if (IS_ERR(rt1308->regmap)) { in rt1308_i2c_probe()
829 ret = PTR_ERR(rt1308->regmap); in rt1308_i2c_probe()
830 dev_err(&i2c->dev, "Failed to allocate register map: %d\n", in rt1308_i2c_probe()
835 regmap_read(rt1308->regmap, RT1308_VEN_DEV_ID, &val); in rt1308_i2c_probe()
836 /* ignore last byte difference */ in rt1308_i2c_probe()
838 dev_err(&i2c->dev, in rt1308_i2c_probe()
840 return -ENODEV; in rt1308_i2c_probe()
845 return devm_snd_soc_register_component(&i2c->dev, in rt1308_i2c_probe()
854 regmap_write(rt1308->regmap, RT1308_RESET, 0); in rt1308_i2c_shutdown()