soc/codecs/rt1305.c

337 	case RT1305_POWER_CTRL_1:  in rt1305_readable_register()
442 		snd_soc_component_update_bits(component, RT1305_POWER_CTRL_1,  in rt1305_classd_event()
446 		snd_soc_component_update_bits(component, RT1305_POWER_CTRL_1,  in rt1305_classd_event()
467 	SND_SOC_DAPM_SUPPLY("PLL0", RT1305_POWER_CTRL_1,
469 	SND_SOC_DAPM_SUPPLY("PLL1", RT1305_POWER_CTRL_1,
471 	SND_SOC_DAPM_SUPPLY("MBIAS", RT1305_POWER_CTRL_1,
473 	SND_SOC_DAPM_SUPPLY("BG MBIAS", RT1305_POWER_CTRL_1,
475 	SND_SOC_DAPM_SUPPLY("LDO2", RT1305_POWER_CTRL_1,
477 	SND_SOC_DAPM_SUPPLY("BG2", RT1305_POWER_CTRL_1,
479 	SND_SOC_DAPM_SUPPLY("LDO2 IB2", RT1305_POWER_CTRL_1,
481 	SND_SOC_DAPM_SUPPLY("VREF", RT1305_POWER_CTRL_1,
483 	SND_SOC_DAPM_SUPPLY("VREF1", RT1305_POWER_CTRL_1,
485 	SND_SOC_DAPM_SUPPLY("VREF2", RT1305_POWER_CTRL_1,
1007 	regmap_write(rt1305->regmap, RT1305_POWER_CTRL_1, 0x0dfe);  in rt1305_calibrate()
1046 	regmap_write(rt1305->regmap, RT1305_POWER_CTRL_1, 0x1dfe);  in rt1305_calibrate()
1104 	regmap_write(rt1305->regmap, RT1305_POWER_CTRL_1, 0x0dfe);  in rt1305_calibrate()
1109 	regmap_write(rt1305->regmap, RT1305_POWER_CTRL_1, 0x0000);  in rt1305_calibrate()