1 // SPDX-License-Identifier: GPL-2.0
3 // peb2466.c  --  Infineon PEB2466 ALSA SoC driver
43 	u8 spi_tx_buf[2 + 8]; /* Cannot use stack area for SPI (dma-safe memory) */
44 	u8 spi_rx_buf[2 + 8]; /* Cannot use stack area for SPI (dma-safe memory) */
87 #define   PEB2466_CR0_AR		(1 << 2)
137 		.tx_buf = &peb2466->spi_tx_buf,  in peb2466_write_byte()
138 		.len = 2,  in peb2466_write_byte()
141 	peb2466->spi_tx_buf[0] = cmd | PEB2466_CMD_W;  in peb2466_write_byte()
142 	peb2466->spi_tx_buf[1] = val;  in peb2466_write_byte()
144 	dev_dbg(&peb2466->spi->dev, "write byte (cmd %02x) %02x\n",  in peb2466_write_byte()
145 		peb2466->spi_tx_buf[0], peb2466->spi_tx_buf[1]);  in peb2466_write_byte()
147 	return spi_sync_transfer(peb2466->spi, &xfer, 1);  in peb2466_write_byte()
153 		.tx_buf = &peb2466->spi_tx_buf,  in peb2466_read_byte()
154 		.rx_buf = &peb2466->spi_rx_buf,  in peb2466_read_byte()
159 	peb2466->spi_tx_buf[0] = cmd | PEB2466_CMD_R;  in peb2466_read_byte()
161 	ret = spi_sync_transfer(peb2466->spi, &xfer, 1);  in peb2466_read_byte()
165 	if (peb2466->spi_rx_buf[1] != 0x81) {  in peb2466_read_byte()
166 		dev_err(&peb2466->spi->dev,  in peb2466_read_byte()
168 			peb2466->spi_tx_buf[0], peb2466->spi_rx_buf[1]);  in peb2466_read_byte()
169 		return -EILSEQ;  in peb2466_read_byte()
172 	*val = peb2466->spi_rx_buf[2];  in peb2466_read_byte()
174 	dev_dbg(&peb2466->spi->dev, "read byte (cmd %02x) %02x\n",  in peb2466_read_byte()
175 		peb2466->spi_tx_buf[0], *val);  in peb2466_read_byte()
183 		.tx_buf = &peb2466->spi_tx_buf,  in peb2466_write_buf()
188 		return -EINVAL;  in peb2466_write_buf()
190 	peb2466->spi_tx_buf[0] = cmd | PEB2466_CMD_W;  in peb2466_write_buf()
191 	memcpy(&peb2466->spi_tx_buf[1], buf, len);  in peb2466_write_buf()
193 	dev_dbg(&peb2466->spi->dev, "write buf (cmd %02x, %u) %*ph\n",  in peb2466_write_buf()
194 		peb2466->spi_tx_buf[0], len, len, &peb2466->spi_tx_buf[1]);  in peb2466_write_buf()
196 	return spi_sync_transfer(peb2466->spi, &xfer, 1);  in peb2466_write_buf()
214 		dev_err(&peb2466->spi->dev, "Not a XOP or SOP command\n");  in peb2466_reg_write()
215 		ret = -EINVAL;  in peb2466_reg_write()
236 		dev_err(&peb2466->spi->dev, "Not a XOP or SOP command\n");  in peb2466_reg_read()
237 		ret = -EINVAL;  in peb2466_reg_read()
256 		(struct peb2466_lkup_ctrl *)kcontrol->private_value;  in peb2466_lkup_ctrl_info()
258 	uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;  in peb2466_lkup_ctrl_info()
259 	uinfo->count = 1;  in peb2466_lkup_ctrl_info()
260 	uinfo->value.integer.min = 0;  in peb2466_lkup_ctrl_info()
261 	uinfo->value.integer.max = lkup_ctrl->lookup->count - 1;  in peb2466_lkup_ctrl_info()
269 		(struct peb2466_lkup_ctrl *)kcontrol->private_value;  in peb2466_lkup_ctrl_get()
271 	ucontrol->value.integer.value[0] = lkup_ctrl->index;  in peb2466_lkup_ctrl_get()
279 		(struct peb2466_lkup_ctrl *)kcontrol->private_value;  in peb2466_lkup_ctrl_put()
285 	index = ucontrol->value.integer.value[0];  in peb2466_lkup_ctrl_put()
286 	if (index >= lkup_ctrl->lookup->count)  in peb2466_lkup_ctrl_put()
287 		return -EINVAL;  in peb2466_lkup_ctrl_put()
289 	if (index == lkup_ctrl->index)  in peb2466_lkup_ctrl_put()
292 	ret = peb2466_write_buf(peb2466, lkup_ctrl->reg,  in peb2466_lkup_ctrl_put()
293 				lkup_ctrl->lookup->table[index], 4);  in peb2466_lkup_ctrl_put()
297 	lkup_ctrl->index = index;  in peb2466_lkup_ctrl_put()
308 	BUILD_BUG_ON(sizeof(lkup_ctrl->tlv_array) < sizeof(tlv_array));  in peb2466_add_lkup_ctrl()
309 	memcpy(lkup_ctrl->tlv_array, tlv_array, sizeof(tlv_array));  in peb2466_add_lkup_ctrl()
315 	control.tlv.p = lkup_ctrl->tlv_array;  in peb2466_add_lkup_ctrl()
351 static const struct soc_enum peb2466_tg_freq[][2] = {
364 	[2] = {
365 		SOC_ENUM_SINGLE(PEB2466_TG1(2), 0, ARRAY_SIZE(peb2466_tone_freq_txt),
367 		SOC_ENUM_SINGLE(PEB2466_TG2(2), 0, ARRAY_SIZE(peb2466_tone_freq_txt),
383 	struct soc_enum *e = (struct soc_enum *)kcontrol->private_value;  in peb2466_tg_freq_get()
385 	switch (e->reg) {  in peb2466_tg_freq_get()
387 		ucontrol->value.enumerated.item[0] = peb2466->ch[0].tg1_freq_item;  in peb2466_tg_freq_get()
390 		ucontrol->value.enumerated.item[0] = peb2466->ch[0].tg2_freq_item;  in peb2466_tg_freq_get()
393 		ucontrol->value.enumerated.item[0] = peb2466->ch[1].tg1_freq_item;  in peb2466_tg_freq_get()
396 		ucontrol->value.enumerated.item[0] = peb2466->ch[1].tg2_freq_item;  in peb2466_tg_freq_get()
398 	case PEB2466_TG1(2):  in peb2466_tg_freq_get()
399 		ucontrol->value.enumerated.item[0] = peb2466->ch[2].tg1_freq_item;  in peb2466_tg_freq_get()
401 	case PEB2466_TG2(2):  in peb2466_tg_freq_get()
402 		ucontrol->value.enumerated.item[0] = peb2466->ch[2].tg2_freq_item;  in peb2466_tg_freq_get()
405 		ucontrol->value.enumerated.item[0] = peb2466->ch[3].tg1_freq_item;  in peb2466_tg_freq_get()
408 		ucontrol->value.enumerated.item[0] = peb2466->ch[3].tg2_freq_item;  in peb2466_tg_freq_get()
411 		return -EINVAL;  in peb2466_tg_freq_get()
421 	struct soc_enum *e = (struct soc_enum *)kcontrol->private_value;  in peb2466_tg_freq_put()
427 	index = ucontrol->value.enumerated.item[0];  in peb2466_tg_freq_put()
430 		return -EINVAL;  in peb2466_tg_freq_put()
432 	switch (e->reg) {  in peb2466_tg_freq_put()
434 		tg_freq_item = &peb2466->ch[0].tg1_freq_item;  in peb2466_tg_freq_put()
439 		tg_freq_item = &peb2466->ch[0].tg2_freq_item;  in peb2466_tg_freq_put()
444 		tg_freq_item = &peb2466->ch[1].tg1_freq_item;  in peb2466_tg_freq_put()
449 		tg_freq_item = &peb2466->ch[1].tg2_freq_item;  in peb2466_tg_freq_put()
453 	case PEB2466_TG1(2):  in peb2466_tg_freq_put()
454 		tg_freq_item = &peb2466->ch[2].tg1_freq_item;  in peb2466_tg_freq_put()
455 		cr1_reg = PEB2466_CR1(2);  in peb2466_tg_freq_put()
458 	case PEB2466_TG2(2):  in peb2466_tg_freq_put()
459 		tg_freq_item = &peb2466->ch[2].tg2_freq_item;  in peb2466_tg_freq_put()
460 		cr1_reg = PEB2466_CR1(2);  in peb2466_tg_freq_put()
464 		tg_freq_item = &peb2466->ch[3].tg1_freq_item;  in peb2466_tg_freq_put()
469 		tg_freq_item = &peb2466->ch[3].tg2_freq_item;  in peb2466_tg_freq_put()
474 		return -EINVAL;  in peb2466_tg_freq_put()
481 		ret = regmap_update_bits(peb2466->regmap, cr1_reg, cr1_mask, 0);  in peb2466_tg_freq_put()
485 		ret = peb2466_write_buf(peb2466, e->reg, peb2466_tone_lookup[index], 4);  in peb2466_tg_freq_put()
488 		ret = regmap_update_bits(peb2466->regmap, cr1_reg, cr1_mask, cr1_mask);  in peb2466_tg_freq_put()
510 	SOC_DAPM_SINGLE("TG1 Switch", PEB2466_CR1(2), 6, 1, 0),
511 	SOC_DAPM_SINGLE("TG2 Switch", PEB2466_CR1(2), 7, 1, 0),
512 	SOC_DAPM_SINGLE("Voice Switch", PEB2466_CR2(2), 0, 1, 0)
523 	SOC_SINGLE("DAC0 -6dB Playback Switch", PEB2466_CR3(0), 2, 1, 0),
524 	SOC_SINGLE("DAC1 -6dB Playback Switch", PEB2466_CR3(1), 2, 1, 0),
525 	SOC_SINGLE("DAC2 -6dB Playback Switch", PEB2466_CR3(2), 2, 1, 0),
526 	SOC_SINGLE("DAC3 -6dB Playback Switch", PEB2466_CR3(3), 2, 1, 0),
531 	SOC_SINGLE("ADC2 +6dB Capture Switch", PEB2466_CR3(2), 3, 1, 0),
539 	SOC_ENUM_EXT("DAC2 TG1 Freq", peb2466_tg_freq[2][0],
548 	SOC_ENUM_EXT("DAC2 TG2 Freq", peb2466_tg_freq[2][1],
555 	SND_SOC_DAPM_SUPPLY("CH0 PWR", PEB2466_CR1(0), 0, 0, NULL, 0),
557 	SND_SOC_DAPM_SUPPLY("CH2 PWR", PEB2466_CR1(2), 0, 0, NULL, 0),
560 	SND_SOC_DAPM_DAC("CH0 DIN", "Playback", SND_SOC_NOPM, 0, 0),
565 	SND_SOC_DAPM_SIGGEN("CH0 TG1"),
570 	SND_SOC_DAPM_SIGGEN("CH0 TG2"),
610 	{ "CH0 DIN", NULL, "CH0 PWR" },
615 	{ "CH0 TG1", NULL, "CH0 PWR" },
620 	{ "CH0 TG2", NULL, "CH0 PWR" },
625 	{ "DAC0 Mixer", "TG1 Switch", "CH0 TG1" },
626 	{ "DAC0 Mixer", "TG2 Switch", "CH0 TG2" },
627 	{ "DAC0 Mixer", "Voice Switch", "CH0 DIN" },
628 	{ "DAC0 Mixer", NULL, "CH0 DIN" },
660 	{ "ADC0", NULL, "CH0 PWR" },
669 	struct peb2466 *peb2466 = snd_soc_component_get_drvdata(dai->component);  in peb2466_dai_set_tdm_slot()
677 		/* Not set -> default 8 */  in peb2466_dai_set_tdm_slot()
681 		dev_err(dai->dev, "tdm slot width %d not supported\n", width);  in peb2466_dai_set_tdm_slot()
682 		return -EINVAL;  in peb2466_dai_set_tdm_slot()
690 			ret = regmap_write(peb2466->regmap, PEB2466_CR5(chan), slot);  in peb2466_dai_set_tdm_slot()
692 				dev_err(dai->dev, "chan %d set tx tdm slot failed (%d)\n",  in peb2466_dai_set_tdm_slot()
702 		dev_err(dai->dev, "too much tx slots defined (mask = 0x%x) support max %d\n",  in peb2466_dai_set_tdm_slot()
704 		return -EINVAL;  in peb2466_dai_set_tdm_slot()
706 	peb2466->max_chan_playback = chan;  in peb2466_dai_set_tdm_slot()
713 			ret = regmap_write(peb2466->regmap, PEB2466_CR4(chan), slot);  in peb2466_dai_set_tdm_slot()
715 				dev_err(dai->dev, "chan %d set rx tdm slot failed (%d)\n",  in peb2466_dai_set_tdm_slot()
725 		dev_err(dai->dev, "too much rx slots defined (mask = 0x%x) support max %d\n",  in peb2466_dai_set_tdm_slot()
727 		return -EINVAL;  in peb2466_dai_set_tdm_slot()
729 	peb2466->max_chan_capture = chan;  in peb2466_dai_set_tdm_slot()
736 	struct peb2466 *peb2466 = snd_soc_component_get_drvdata(dai->component);  in peb2466_dai_set_fmt()
747 		dev_err(dai->dev, "Unsupported format 0x%x\n",  in peb2466_dai_set_fmt()
749 		return -EINVAL;  in peb2466_dai_set_fmt()
751 	return regmap_write(peb2466->regmap, PEB2466_XR6, xr6);  in peb2466_dai_set_fmt()
758 	struct peb2466 *peb2466 = snd_soc_component_get_drvdata(dai->component);  in peb2466_dai_hw_params()
771 		dev_err(&peb2466->spi->dev, "Unsupported format 0x%x\n",  in peb2466_dai_hw_params()
773 		return -EINVAL;  in peb2466_dai_hw_params()
777 		ret = regmap_update_bits(peb2466->regmap, PEB2466_CR1(ch),  in peb2466_dai_hw_params()
796 	struct peb2466 *peb2466 = snd_soc_component_get_drvdata(dai->component);  in peb2466_dai_startup()
800 	max_ch = (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) ?  in peb2466_dai_startup()
801 		peb2466->max_chan_playback : peb2466->max_chan_capture;  in peb2466_dai_startup()
807 	ret = snd_pcm_hw_constraint_minmax(substream->runtime,  in peb2466_dai_startup()
813 	return snd_pcm_hw_constraint_list(substream->runtime, 0,  in peb2466_dai_startup()
870 		{  .reg = PEB2466_CR5(2), .def = 0x00 },  in peb2466_reset_audio()
871 		{  .reg = PEB2466_CR4(2), .def = 0x00 },  in peb2466_reset_audio()
872 		{  .reg = PEB2466_CR3(2), .def = 0x00 },  in peb2466_reset_audio()
873 		{  .reg = PEB2466_CR2(2), .def = 0x00 },  in peb2466_reset_audio()
874 		{  .reg = PEB2466_CR1(2), .def = 0x00 },  in peb2466_reset_audio()
875 		{  .reg = PEB2466_CR0(2), .def = PEB2466_CR0_IMR1 },  in peb2466_reset_audio()
890 	for (i = 0; i < ARRAY_SIZE(peb2466->ch); i++) {  in peb2466_reset_audio()
891 		peb2466->ch[i].tg1_freq_item = PEB2466_TONE_1000HZ;  in peb2466_reset_audio()
892 		peb2466->ch[i].tg2_freq_item = PEB2466_TONE_1000HZ;  in peb2466_reset_audio()
932 	return regmap_multi_reg_write(peb2466->regmap, reg_reset, ARRAY_SIZE(reg_reset));  in peb2466_reset_audio()
943 	dev_info(component->dev, "fw TH filter: mask %x, %*phN\n", *data,  in peb2466_fw_parse_thfilter()
944 		 lng - 1, data + 1);  in peb2466_fw_parse_thfilter()
948 	 *   - @0  1 byte:  Chan mask (bit set means related channel is concerned)  in peb2466_fw_parse_thfilter()
949 	 *   - @1  8 bytes: TH-Filter coefficients part1  in peb2466_fw_parse_thfilter()
950 	 *   - @9  8 bytes: TH-Filter coefficients part2  in peb2466_fw_parse_thfilter()
951 	 *   - @17 8 bytes: TH-Filter coefficients part3  in peb2466_fw_parse_thfilter()
954 	for (i = 0; i < ARRAY_SIZE(peb2466->ch); i++) {  in peb2466_fw_parse_thfilter()
958 		ret = regmap_update_bits(peb2466->regmap, PEB2466_CR0(i),  in peb2466_fw_parse_thfilter()
975 		ret = regmap_update_bits(peb2466->regmap, PEB2466_CR0(i),  in peb2466_fw_parse_thfilter()
992 	dev_info(component->dev, "fw IM/R1 filter: mask %x, %*phN\n", *data,  in peb2466_fw_parse_imr1filter()
993 		 lng - 1, data + 1);  in peb2466_fw_parse_imr1filter()
997 	 *   - @0 1 byte:  Chan mask (bit set means related channel is concerned)  in peb2466_fw_parse_imr1filter()
998 	 *   - @1 8 bytes: IM/R1-Filter coefficients part1  in peb2466_fw_parse_imr1filter()
999 	 *   - @9 8 bytes: IM/R1-Filter coefficients part2  in peb2466_fw_parse_imr1filter()
1002 	for (i = 0; i < ARRAY_SIZE(peb2466->ch); i++) {  in peb2466_fw_parse_imr1filter()
1006 		ret = regmap_update_bits(peb2466->regmap, PEB2466_CR0(i),  in peb2466_fw_parse_imr1filter()
1019 		ret = regmap_update_bits(peb2466->regmap, PEB2466_CR0(i),  in peb2466_fw_parse_imr1filter()
1035 	dev_info(component->dev, "fw FRX filter: mask %x, %*phN\n", *data,  in peb2466_fw_parse_frxfilter()
1036 		 lng - 1, data + 1);  in peb2466_fw_parse_frxfilter()
1040 	 *   - @0 1 byte:  Chan mask (bit set means related channel is concerned)  in peb2466_fw_parse_frxfilter()
1041 	 *   - @1 8 bytes: FRX-Filter coefficients  in peb2466_fw_parse_frxfilter()
1044 	for (i = 0; i < ARRAY_SIZE(peb2466->ch); i++) {  in peb2466_fw_parse_frxfilter()
1048 		ret = regmap_update_bits(peb2466->regmap, PEB2466_CR0(i),  in peb2466_fw_parse_frxfilter()
1057 		ret = regmap_update_bits(peb2466->regmap, PEB2466_CR0(i),  in peb2466_fw_parse_frxfilter()
1073 	dev_info(component->dev, "fw FRR filter: mask %x, %*phN\n", *data,  in peb2466_fw_parse_frrfilter()
1074 		 lng - 1, data + 1);  in peb2466_fw_parse_frrfilter()
1078 	 *   - @0 1 byte:  Chan mask (bit set means related channel is concerned)  in peb2466_fw_parse_frrfilter()
1079 	 *   - @1 8 bytes: FRR-Filter coefficients  in peb2466_fw_parse_frrfilter()
1082 	for (i = 0; i < ARRAY_SIZE(peb2466->ch); i++) {  in peb2466_fw_parse_frrfilter()
1086 		ret = regmap_update_bits(peb2466->regmap, PEB2466_CR0(i),  in peb2466_fw_parse_frrfilter()
1095 		ret = regmap_update_bits(peb2466->regmap, PEB2466_CR0(i),  in peb2466_fw_parse_frrfilter()
1111 	dev_info(component->dev, "fw AX filter: mask %x, %*phN\n", *data,  in peb2466_fw_parse_axfilter()
1112 		 lng - 1, data + 1);  in peb2466_fw_parse_axfilter()
1116 	 *   - @0 1 byte:  Chan mask (bit set means related channel is concerned)  in peb2466_fw_parse_axfilter()
1117 	 *   - @1 4 bytes: AX-Filter coefficients  in peb2466_fw_parse_axfilter()
1120 	for (i = 0; i < ARRAY_SIZE(peb2466->ch); i++) {  in peb2466_fw_parse_axfilter()
1124 		ret = regmap_update_bits(peb2466->regmap, PEB2466_CR0(i),  in peb2466_fw_parse_axfilter()
1133 		ret = regmap_update_bits(peb2466->regmap, PEB2466_CR0(i),  in peb2466_fw_parse_axfilter()
1149 	dev_info(component->dev, "fw AR filter: mask %x, %*phN\n", *data,  in peb2466_fw_parse_arfilter()
1150 		 lng - 1, data + 1);  in peb2466_fw_parse_arfilter()
1154 	 *   - @0 1 byte:  Chan mask (bit set means related channel is concerned)  in peb2466_fw_parse_arfilter()
1155 	 *   - @1 4 bytes: AR-Filter coefficients  in peb2466_fw_parse_arfilter()
1158 	for (i = 0; i < ARRAY_SIZE(peb2466->ch); i++) {  in peb2466_fw_parse_arfilter()
1162 		ret = regmap_update_bits(peb2466->regmap, PEB2466_CR0(i),  in peb2466_fw_parse_arfilter()
1171 		ret = regmap_update_bits(peb2466->regmap, PEB2466_CR0(i),  in peb2466_fw_parse_arfilter()
1203 	 *   - @0 1 byte:  Chan mask (bit set means related channel is concerned)  in peb2466_fw_parse_axtable()
1204 	 *   - @1 32bits signed: Min table value in centi dB (MinVal)  in peb2466_fw_parse_axtable()
1205 	 *                       ie -300 means -3.0 dB  in peb2466_fw_parse_axtable()
1206 	 *   - @5 32bits signed: Step from on item to other item in centi dB (Step)  in peb2466_fw_parse_axtable()
1208 	 *   - @9 32bits unsigned: Item index in the table to use for the initial  in peb2466_fw_parse_axtable()
1210 	 *   - @13 N*4 bytes: Table composed of 4 bytes items.  in peb2466_fw_parse_axtable()
1214 	 * dB is: Raw value at index i <-> (MinVal + i * Step) in centi dB.  in peb2466_fw_parse_axtable()
1218 	if (lng < 13 || ((lng - 13) % 4)) {  in peb2466_fw_parse_axtable()
1219 		dev_err(component->dev, "fw AX table lng %u invalid\n", lng);  in peb2466_fw_parse_axtable()
1220 		return -EINVAL;  in peb2466_fw_parse_axtable()
1222 	table_size = lng - 13;  in peb2466_fw_parse_axtable()
1228 		dev_err(component->dev, "fw AX table index %u out of table[%u]\n",  in peb2466_fw_parse_axtable()
1230 		return -EINVAL;  in peb2466_fw_parse_axtable()
1233 	dev_info(component->dev,  in peb2466_fw_parse_axtable()
1239 	table = devm_kzalloc(&peb2466->spi->dev, table_size, GFP_KERNEL);  in peb2466_fw_parse_axtable()
1241 		return -ENOMEM;  in peb2466_fw_parse_axtable()
1245 	BUILD_BUG_ON(ARRAY_SIZE(peb2466_ax_ctrl_names) != ARRAY_SIZE(peb2466->ch));  in peb2466_fw_parse_axtable()
1246 	for (i = 0; i < ARRAY_SIZE(peb2466->ch); i++) {  in peb2466_fw_parse_axtable()
1250 		lookup = &peb2466->ch[i].ax_lookup;  in peb2466_fw_parse_axtable()
1251 		lookup->table = table;  in peb2466_fw_parse_axtable()
1252 		lookup->count = table_size / 4;  in peb2466_fw_parse_axtable()
1254 		ret = regmap_update_bits(peb2466->regmap, PEB2466_CR0(i),  in peb2466_fw_parse_axtable()
1260 					lookup->table[init_index], 4);  in peb2466_fw_parse_axtable()
1264 		ret = regmap_update_bits(peb2466->regmap, PEB2466_CR0(i),  in peb2466_fw_parse_axtable()
1269 		lkup_ctrl = &peb2466->ch[i].ax_lkup_ctrl;  in peb2466_fw_parse_axtable()
1270 		lkup_ctrl->lookup = lookup;  in peb2466_fw_parse_axtable()
1271 		lkup_ctrl->reg = PEB2466_AX_FILTER(i);  in peb2466_fw_parse_axtable()
1272 		lkup_ctrl->index = init_index;  in peb2466_fw_parse_axtable()
1307 	 *   - @0 1 byte:  Chan mask (bit set means related channel is concerned)  in peb2466_fw_parse_artable()
1308 	 *   - @1 32bits signed: Min table value in centi dB (MinVal)  in peb2466_fw_parse_artable()
1309 	 *                       ie -300 means -3.0 dB  in peb2466_fw_parse_artable()
1310 	 *   - @5 32bits signed: Step from on item to other item in centi dB (Step)  in peb2466_fw_parse_artable()
1312 	 *   - @9 32bits unsigned: Item index in the table to use for the initial  in peb2466_fw_parse_artable()
1314 	 *   - @13 N*4 bytes: Table composed of 4 bytes items.  in peb2466_fw_parse_artable()
1318 	 * dB is: Raw value at index i <-> (MinVal + i * Step) in centi dB.  in peb2466_fw_parse_artable()
1322 	if (lng < 13 || ((lng - 13) % 4)) {  in peb2466_fw_parse_artable()
1323 		dev_err(component->dev, "fw AR table lng %u invalid\n", lng);  in peb2466_fw_parse_artable()
1324 		return -EINVAL;  in peb2466_fw_parse_artable()
1326 	table_size = lng - 13;  in peb2466_fw_parse_artable()
1332 		dev_err(component->dev, "fw AR table index %u out of table[%u]\n",  in peb2466_fw_parse_artable()
1334 		return -EINVAL;  in peb2466_fw_parse_artable()
1337 	dev_info(component->dev,  in peb2466_fw_parse_artable()
1343 	table = devm_kzalloc(&peb2466->spi->dev, table_size, GFP_KERNEL);  in peb2466_fw_parse_artable()
1345 		return -ENOMEM;  in peb2466_fw_parse_artable()
1349 	BUILD_BUG_ON(ARRAY_SIZE(peb2466_ar_ctrl_names) != ARRAY_SIZE(peb2466->ch));  in peb2466_fw_parse_artable()
1350 	for (i = 0; i < ARRAY_SIZE(peb2466->ch); i++) {  in peb2466_fw_parse_artable()
1354 		lookup = &peb2466->ch[i].ar_lookup;  in peb2466_fw_parse_artable()
1355 		lookup->table = table;  in peb2466_fw_parse_artable()
1356 		lookup->count = table_size / 4;  in peb2466_fw_parse_artable()
1358 		ret = regmap_update_bits(peb2466->regmap, PEB2466_CR0(i),  in peb2466_fw_parse_artable()
1364 					lookup->table[init_index], 4);  in peb2466_fw_parse_artable()
1368 		ret = regmap_update_bits(peb2466->regmap, PEB2466_CR0(i),  in peb2466_fw_parse_artable()
1373 		lkup_ctrl = &peb2466->ch[i].ar_lkup_ctrl;  in peb2466_fw_parse_artable()
1374 		lkup_ctrl->lookup = lookup;  in peb2466_fw_parse_artable()
1375 		lkup_ctrl->reg = PEB2466_AR_FILTER(i);  in peb2466_fw_parse_artable()
1376 		lkup_ctrl->index = init_index;  in peb2466_fw_parse_artable()
1413 	PEB2466_TAG_DEF_LNG_EQ(0x0002, 1 + 2 * 8, peb2466_fw_parse_imr1filter),
1452 	 * big-endian values).  in peb2466_fw_parse()
1455 	 * @2, 16bits: Version (0x0100 for version 1.0)  in peb2466_fw_parse()
1456 	 * @4, 2+4+N bytes: TLV block  in peb2466_fw_parse()
1457 	 * @4+(2+4+N) bytes: Next TLV block  in peb2466_fw_parse()
1462 	 *   @2, 32bits: Lng  in peb2466_fw_parse()
1473 		dev_err(component->dev, "fw size %zu, exp at least 4\n", left);  in peb2466_fw_parse()
1474 		return -EINVAL;  in peb2466_fw_parse()
1480 		dev_err(component->dev, "fw magic 0x%04x exp 0x2466\n", val16);  in peb2466_fw_parse()
1481 		return -EINVAL;  in peb2466_fw_parse()
1483 	buf += 2;  in peb2466_fw_parse()
1484 	left -= 2;  in peb2466_fw_parse()
1489 		dev_err(component->dev, "fw magic 0x%04x exp 0x0100\n", val16);  in peb2466_fw_parse()
1490 		return -EINVAL;  in peb2466_fw_parse()
1492 	buf += 2;  in peb2466_fw_parse()
1493 	left -= 2;  in peb2466_fw_parse()
1497 			dev_err(component->dev, "fw %td/%zu left %zu, exp at least 6\n",  in peb2466_fw_parse()
1498 				buf - data, size, left);  in peb2466_fw_parse()
1499 			return -EINVAL;  in peb2466_fw_parse()
1503 		lng = get_unaligned_be32(buf + 2);  in peb2466_fw_parse()
1506 			dev_err(component->dev, "fw %td/%zu tag 0x%04x unknown\n",  in peb2466_fw_parse()
1507 				buf - data, size, tag);  in peb2466_fw_parse()
1508 			return -EINVAL;  in peb2466_fw_parse()
1510 		if (lng < tag_def->lng_min || lng > tag_def->lng_max) {  in peb2466_fw_parse()
1511 			dev_err(component->dev, "fw %td/%zu tag 0x%04x lng %u, exp [%u;%u]\n",  in peb2466_fw_parse()
1512 				buf - data, size, tag, lng, tag_def->lng_min, tag_def->lng_max);  in peb2466_fw_parse()
1513 			return -EINVAL;  in peb2466_fw_parse()
1516 		left -= 6;  in peb2466_fw_parse()
1518 			dev_err(component->dev, "fw %td/%zu tag 0x%04x lng %u, left %zu\n",  in peb2466_fw_parse()
1519 				buf - data, size, tag, lng, left);  in peb2466_fw_parse()
1520 			return -EINVAL;  in peb2466_fw_parse()
1523 		/* TLV block is valid -> parse the data part */  in peb2466_fw_parse()
1524 		ret = tag_def->parse(component, tag, lng, buf);  in peb2466_fw_parse()
1526 			dev_err(component->dev, "fw %td/%zu tag 0x%04x lng %u parse failed\n",  in peb2466_fw_parse()
1527 				buf - data, size, tag, lng);  in peb2466_fw_parse()
1532 		left -= lng;  in peb2466_fw_parse()
1542 	ret = request_firmware(&fw, fw_name, component->dev);  in peb2466_load_coeffs()
1546 	ret = peb2466_fw_parse(component, fw->data, fw->size);  in peb2466_load_coeffs()
1563 	ret = of_property_read_string(peb2466->spi->dev.of_node,  in peb2466_component_probe()
1564 				      "firmware-name", &firmware_name);  in peb2466_component_probe()
1566 		return (ret == -EINVAL) ? 0 : ret;  in peb2466_component_probe()
1589  *      2     SI2_0
1634 		*mask = (1 << (offset - 16));  in peb2466_chip_gpio_offset_to_data_regmask()
1640 		*mask = (1 << (offset - 24 + 4));  in peb2466_chip_gpio_offset_to_data_regmask()
1643 	return -EINVAL;  in peb2466_chip_gpio_offset_to_data_regmask()
1652 		return -EINVAL;  in peb2466_chip_gpio_offset_to_dir_regmask()
1656 		*mask = (1 << (offset - 16));  in peb2466_chip_gpio_offset_to_dir_regmask()
1661 		*mask = (1 << (offset - 24));  in peb2466_chip_gpio_offset_to_dir_regmask()
1664 	return -EINVAL;  in peb2466_chip_gpio_offset_to_dir_regmask()
1674 		cache = &peb2466->gpio.cache.xr0;  in peb2466_chip_gpio_get_cache()
1677 		cache = &peb2466->gpio.cache.xr1;  in peb2466_chip_gpio_get_cache()
1680 		cache = &peb2466->gpio.cache.xr2;  in peb2466_chip_gpio_get_cache()
1683 		cache = &peb2466->gpio.cache.xr3;  in peb2466_chip_gpio_get_cache()
1706 	mutex_lock(&peb2466->gpio.lock);  in peb2466_chip_gpio_update_bits()
1710 		ret = -EINVAL;  in peb2466_chip_gpio_update_bits()
1718 	ret = regmap_write(peb2466->regmap, xr_reg, tmp);  in peb2466_chip_gpio_update_bits()
1726 	mutex_unlock(&peb2466->gpio.lock);  in peb2466_chip_gpio_update_bits()
1742 		dev_warn(&peb2466->spi->dev, "cannot set gpio %d (read-only)\n",  in peb2466_chip_gpio_set()
1749 		dev_err(&peb2466->spi->dev, "cannot set gpio %d (%d)\n",  in peb2466_chip_gpio_set()
1756 		dev_err(&peb2466->spi->dev, "set gpio %d (0x%x, 0x%x) failed (%d)\n",  in peb2466_chip_gpio_set()
1782 		dev_err(&peb2466->spi->dev, "cannot get gpio %d (%d)\n",  in peb2466_chip_gpio_get()
1784 		return -EINVAL;  in peb2466_chip_gpio_get()
1790 			return -EINVAL;  in peb2466_chip_gpio_get()
1793 		ret = regmap_read(peb2466->regmap, xr_reg, &val);  in peb2466_chip_gpio_get()
1795 			dev_err(&peb2466->spi->dev, "get gpio %d (0x%x, 0x%x) failed (%d)\n",  in peb2466_chip_gpio_get()
1823 		dev_err(&peb2466->spi->dev, "cannot get gpio %d direction (%d)\n",  in peb2466_chip_get_direction()
1828 	ret = regmap_read(peb2466->regmap, xr_reg, &val);  in peb2466_chip_get_direction()
1830 		dev_err(&peb2466->spi->dev, "get dir gpio %d (0x%x, 0x%x) failed (%d)\n",  in peb2466_chip_get_direction()
1851 		return -EINVAL;  in peb2466_chip_direction_input()
1856 		dev_err(&peb2466->spi->dev, "cannot set gpio %d direction (%d)\n",  in peb2466_chip_direction_input()
1863 		dev_err(&peb2466->spi->dev, "Set dir in gpio %d (0x%x, 0x%x) failed (%d)\n",  in peb2466_chip_direction_input()
1880 		return -EINVAL;  in peb2466_chip_direction_output()
1892 		dev_err(&peb2466->spi->dev, "cannot set gpio %d direction (%d)\n",  in peb2466_chip_direction_output()
1899 		dev_err(&peb2466->spi->dev, "Set dir in gpio %d (0x%x, 0x%x) failed (%d)\n",  in peb2466_chip_direction_output()
1917 	peb2466->gpio.cache.xr0 = 0;  in peb2466_reset_gpio()
1918 	peb2466->gpio.cache.xr1 = 0;  in peb2466_reset_gpio()
1919 	peb2466->gpio.cache.xr2 = 0;  in peb2466_reset_gpio()
1920 	peb2466->gpio.cache.xr3 = 0;  in peb2466_reset_gpio()
1922 	return regmap_multi_reg_write(peb2466->regmap, reg_reset, ARRAY_SIZE(reg_reset));  in peb2466_reset_gpio()
1929 	mutex_init(&peb2466->gpio.lock);  in peb2466_gpio_init()
1935 	peb2466->gpio.gpio_chip.owner = THIS_MODULE;  in peb2466_gpio_init()
1936 	peb2466->gpio.gpio_chip.label = dev_name(&peb2466->spi->dev);  in peb2466_gpio_init()
1937 	peb2466->gpio.gpio_chip.parent = &peb2466->spi->dev;  in peb2466_gpio_init()
1938 	peb2466->gpio.gpio_chip.base = -1;  in peb2466_gpio_init()
1939 	peb2466->gpio.gpio_chip.ngpio = 28;  in peb2466_gpio_init()
1940 	peb2466->gpio.gpio_chip.get_direction = peb2466_chip_get_direction;  in peb2466_gpio_init()
1941 	peb2466->gpio.gpio_chip.direction_input = peb2466_chip_direction_input;  in peb2466_gpio_init()
1942 	peb2466->gpio.gpio_chip.direction_output = peb2466_chip_direction_output;  in peb2466_gpio_init()
1943 	peb2466->gpio.gpio_chip.get = peb2466_chip_gpio_get;  in peb2466_gpio_init()
1944 	peb2466->gpio.gpio_chip.set = peb2466_chip_gpio_set;  in peb2466_gpio_init()
1945 	peb2466->gpio.gpio_chip.can_sleep = true;  in peb2466_gpio_init()
1947 	return devm_gpiochip_add_data(&peb2466->spi->dev, &peb2466->gpio.gpio_chip,  in peb2466_gpio_init()
1958 	spi->bits_per_word = 8;  in peb2466_spi_probe()
1963 	peb2466 = devm_kzalloc(&spi->dev, sizeof(*peb2466), GFP_KERNEL);  in peb2466_spi_probe()
1965 		return -ENOMEM;  in peb2466_spi_probe()
1967 	peb2466->spi = spi;  in peb2466_spi_probe()
1969 	peb2466->regmap = devm_regmap_init(&peb2466->spi->dev, NULL, peb2466,  in peb2466_spi_probe()
1971 	if (IS_ERR(peb2466->regmap))  in peb2466_spi_probe()
1972 		return PTR_ERR(peb2466->regmap);  in peb2466_spi_probe()
1974 	peb2466->reset_gpio = devm_gpiod_get_optional(&peb2466->spi->dev,  in peb2466_spi_probe()
1976 	if (IS_ERR(peb2466->reset_gpio))  in peb2466_spi_probe()
1977 		return PTR_ERR(peb2466->reset_gpio);  in peb2466_spi_probe()
1979 	peb2466->mclk = devm_clk_get_enabled(&peb2466->spi->dev, "mclk");  in peb2466_spi_probe()
1980 	if (IS_ERR(peb2466->mclk))  in peb2466_spi_probe()
1981 		return PTR_ERR(peb2466->mclk);  in peb2466_spi_probe()
1983 	if (peb2466->reset_gpio) {  in peb2466_spi_probe()
1984 		gpiod_set_value_cansleep(peb2466->reset_gpio, 1);  in peb2466_spi_probe()
1986 		gpiod_set_value_cansleep(peb2466->reset_gpio, 0);  in peb2466_spi_probe()
1992 	mclk_rate = clk_get_rate(peb2466->mclk);  in peb2466_spi_probe()
2007 		dev_err(&peb2466->spi->dev, "Unsupported clock rate %lu\n",  in peb2466_spi_probe()
2009 		ret = -EINVAL;  in peb2466_spi_probe()
2012 	ret = regmap_write(peb2466->regmap, PEB2466_XR5, xr5);  in peb2466_spi_probe()
2014 		dev_err(&peb2466->spi->dev, "Setting MCLK failed (%d)\n", ret);  in peb2466_spi_probe()
2018 	ret = devm_snd_soc_register_component(&spi->dev, &peb2466_component_driver,  in peb2466_spi_probe()