Lines Matching refs:regmap
83 struct regmap *regmap; member
115 regmap_update_bits(priv->regmap, MT6358_GPIO_MODE2_CLR, in playback_gpio_set()
117 regmap_update_bits(priv->regmap, MT6358_GPIO_MODE2_SET, in playback_gpio_set()
119 regmap_update_bits(priv->regmap, MT6358_GPIO_MODE2, in playback_gpio_set()
130 regmap_update_bits(priv->regmap, MT6358_GPIO_MODE2_CLR, in playback_gpio_reset()
132 regmap_update_bits(priv->regmap, MT6358_GPIO_MODE2, in playback_gpio_reset()
134 regmap_update_bits(priv->regmap, MT6358_GPIO_DIR0, in playback_gpio_reset()
141 regmap_update_bits(priv->regmap, MT6358_GPIO_MODE3_CLR, in capture_gpio_set()
143 regmap_update_bits(priv->regmap, MT6358_GPIO_MODE3_SET, in capture_gpio_set()
145 regmap_update_bits(priv->regmap, MT6358_GPIO_MODE3, in capture_gpio_set()
157 regmap_update_bits(priv->regmap, MT6358_GPIO_MODE3_CLR, in capture_gpio_reset()
159 regmap_update_bits(priv->regmap, MT6358_GPIO_MODE3, in capture_gpio_reset()
161 regmap_update_bits(priv->regmap, MT6358_GPIO_DIR0, in capture_gpio_reset()
168 regmap_update_bits(priv->regmap, MT6358_DCXO_CW14, in mt6358_set_dcxo()
178 regmap_update_bits(priv->regmap, MT6358_AUDENC_ANA_CON6, in mt6358_set_clksq()
183 regmap_update_bits(priv->regmap, MT6358_AUDENC_ANA_CON6, in mt6358_set_clksq()
192 regmap_update_bits(priv->regmap, MT6358_AUDDEC_ANA_CON13, in mt6358_set_aud_global_bias()
201 regmap_update_bits(priv->regmap, MT6358_AUD_TOP_CKPDN_CON0, in mt6358_set_topck()
211 regmap_update_bits(priv->regmap, in mt6358_mtkaif_tx_enable()
215 regmap_update_bits(priv->regmap, in mt6358_mtkaif_tx_enable()
218 regmap_update_bits(priv->regmap, in mt6358_mtkaif_tx_enable()
224 regmap_update_bits(priv->regmap, in mt6358_mtkaif_tx_enable()
228 regmap_update_bits(priv->regmap, in mt6358_mtkaif_tx_enable()
235 regmap_update_bits(priv->regmap, in mt6358_mtkaif_tx_enable()
239 regmap_update_bits(priv->regmap, in mt6358_mtkaif_tx_enable()
250 regmap_update_bits(priv->regmap, MT6358_AFE_AUD_PAD_TOP, in mt6358_mtkaif_tx_disable()
269 regmap_update_bits(priv->regmap, MT6358_AUDIO_DIG_CFG, in mt6358_mtkaif_calibration_enable()
272 regmap_update_bits(priv->regmap, MT6358_AUDIO_DIG_CFG, in mt6358_mtkaif_calibration_enable()
284 regmap_update_bits(priv->regmap, MT6358_AUDIO_DIG_CFG, in mt6358_mtkaif_calibration_disable()
287 regmap_update_bits(priv->regmap, MT6358_AUDIO_DIG_CFG, in mt6358_mtkaif_calibration_disable()
308 regmap_update_bits(priv->regmap, MT6358_AUDIO_DIG_CFG, in mt6358_set_mtkaif_calibration_phase()
311 regmap_update_bits(priv->regmap, MT6358_AUDIO_DIG_CFG, in mt6358_set_mtkaif_calibration_phase()
333 regmap_write(priv->regmap, MT6358_ZCD_CON0, 0x0000); in hp_zcd_disable()
344 regmap_update_bits(priv->regmap, MT6358_AUDDEC_ANA_CON1, in hp_main_output_ramp()
346 regmap_update_bits(priv->regmap, MT6358_AUDDEC_ANA_CON1, in hp_main_output_ramp()
359 regmap_update_bits(priv->regmap, MT6358_AUDDEC_ANA_CON9, in hp_aux_feedback_loop_gain_ramp()
371 regmap_update_bits(priv->regmap, MT6358_AUDDEC_ANA_CON4, in hp_pull_down()
377 regmap_update_bits(priv->regmap, MT6358_AUDDEC_ANA_CON4, in hp_pull_down()
413 regmap_update_bits(priv->regmap, in headset_volume_ramp()
441 regmap_read(priv->regmap, MT6358_ZCD_CON2, ®); in mt6358_put_volsw()
448 regmap_read(priv->regmap, MT6358_ZCD_CON1, ®); in mt6358_put_volsw()
455 regmap_read(priv->regmap, MT6358_ZCD_CON3, ®); in mt6358_put_volsw()
463 regmap_read(priv->regmap, MT6358_AUDENC_ANA_CON0, ®); in mt6358_put_volsw()
466 regmap_read(priv->regmap, MT6358_AUDENC_ANA_CON1, ®); in mt6358_put_volsw()
480 regmap_update_bits(priv->regmap, MT6358_AUDDEC_ANA_CON13, in mt6358_enable_wov_phase2()
482 regmap_update_bits(priv->regmap, MT6358_DCXO_CW14, 0xffff, 0xa2b5); in mt6358_enable_wov_phase2()
483 regmap_update_bits(priv->regmap, MT6358_AUDENC_ANA_CON1, in mt6358_enable_wov_phase2()
487 regmap_update_bits(priv->regmap, MT6358_DCXO_CW13, 0xffff, 0x9929); in mt6358_enable_wov_phase2()
488 regmap_update_bits(priv->regmap, MT6358_AUDENC_ANA_CON9, in mt6358_enable_wov_phase2()
490 regmap_update_bits(priv->regmap, MT6358_AUDENC_ANA_CON8, in mt6358_enable_wov_phase2()
494 regmap_update_bits(priv->regmap, MT6358_AUD_TOP_CKPDN_CON0, in mt6358_enable_wov_phase2()
496 regmap_update_bits(priv->regmap, MT6358_GPIO_MODE3, 0xffff, 0x0120); in mt6358_enable_wov_phase2()
497 regmap_update_bits(priv->regmap, MT6358_AFE_VOW_CFG0, 0xffff, 0xffff); in mt6358_enable_wov_phase2()
498 regmap_update_bits(priv->regmap, MT6358_AFE_VOW_CFG1, 0xffff, 0x0200); in mt6358_enable_wov_phase2()
499 regmap_update_bits(priv->regmap, MT6358_AFE_VOW_CFG2, 0xffff, 0x2424); in mt6358_enable_wov_phase2()
500 regmap_update_bits(priv->regmap, MT6358_AFE_VOW_CFG3, 0xffff, 0xdbac); in mt6358_enable_wov_phase2()
501 regmap_update_bits(priv->regmap, MT6358_AFE_VOW_CFG4, 0xffff, 0x029e); in mt6358_enable_wov_phase2()
502 regmap_update_bits(priv->regmap, MT6358_AFE_VOW_CFG5, 0xffff, 0x0000); in mt6358_enable_wov_phase2()
503 regmap_update_bits(priv->regmap, MT6358_AFE_VOW_POSDIV_CFG0, in mt6358_enable_wov_phase2()
505 regmap_update_bits(priv->regmap, MT6358_AFE_VOW_HPF_CFG0, in mt6358_enable_wov_phase2()
507 regmap_update_bits(priv->regmap, MT6358_AFE_VOW_TOP, 0xffff, 0x68d1); in mt6358_enable_wov_phase2()
515 regmap_update_bits(priv->regmap, MT6358_AFE_VOW_TOP, 0xffff, 0xc000); in mt6358_disable_wov_phase2()
516 regmap_update_bits(priv->regmap, MT6358_AFE_VOW_HPF_CFG0, in mt6358_disable_wov_phase2()
518 regmap_update_bits(priv->regmap, MT6358_AFE_VOW_POSDIV_CFG0, in mt6358_disable_wov_phase2()
520 regmap_update_bits(priv->regmap, MT6358_AFE_VOW_CFG5, 0xffff, 0x0100); in mt6358_disable_wov_phase2()
521 regmap_update_bits(priv->regmap, MT6358_AFE_VOW_CFG4, 0xffff, 0x006c); in mt6358_disable_wov_phase2()
522 regmap_update_bits(priv->regmap, MT6358_AFE_VOW_CFG3, 0xffff, 0xa879); in mt6358_disable_wov_phase2()
523 regmap_update_bits(priv->regmap, MT6358_AFE_VOW_CFG2, 0xffff, 0x2323); in mt6358_disable_wov_phase2()
524 regmap_update_bits(priv->regmap, MT6358_AFE_VOW_CFG1, 0xffff, 0x0400); in mt6358_disable_wov_phase2()
525 regmap_update_bits(priv->regmap, MT6358_AFE_VOW_CFG0, 0xffff, 0x0000); in mt6358_disable_wov_phase2()
526 regmap_update_bits(priv->regmap, MT6358_GPIO_MODE3, 0xffff, 0x02d8); in mt6358_disable_wov_phase2()
527 regmap_update_bits(priv->regmap, MT6358_AUD_TOP_CKPDN_CON0, in mt6358_disable_wov_phase2()
531 regmap_update_bits(priv->regmap, MT6358_AUDENC_ANA_CON8, in mt6358_disable_wov_phase2()
533 regmap_update_bits(priv->regmap, MT6358_AUDENC_ANA_CON9, in mt6358_disable_wov_phase2()
535 regmap_update_bits(priv->regmap, MT6358_DCXO_CW13, 0xffff, 0x9829); in mt6358_disable_wov_phase2()
536 regmap_update_bits(priv->regmap, MT6358_AUDENC_ANA_CON1, in mt6358_disable_wov_phase2()
539 regmap_update_bits(priv->regmap, MT6358_DCXO_CW14, 0xffff, 0xa2b5); in mt6358_disable_wov_phase2()
540 regmap_update_bits(priv->regmap, MT6358_AUDDEC_ANA_CON13, in mt6358_disable_wov_phase2()
907 regmap_update_bits(priv->regmap, MT6358_AUDENC_ANA_CON6, in mt_clksq_event()
930 regmap_write(priv->regmap, MT6358_AFUNC_AUD_CON2, 0x0006); in mt_sgen_event()
932 regmap_write(priv->regmap, MT6358_AFUNC_AUD_CON0, 0xCBA1); in mt_sgen_event()
934 regmap_write(priv->regmap, MT6358_AFUNC_AUD_CON2, 0x0003); in mt_sgen_event()
936 regmap_write(priv->regmap, MT6358_AFUNC_AUD_CON2, 0x000B); in mt_sgen_event()
938 regmap_update_bits(priv->regmap, MT6358_AFE_SGEN_CFG0, in mt_sgen_event()
941 regmap_update_bits(priv->regmap, MT6358_AFE_SGEN_CFG1, in mt_sgen_event()
947 regmap_write(priv->regmap, MT6358_AFUNC_AUD_CON2, 0x0000); in mt_sgen_event()
948 regmap_write(priv->regmap, MT6358_AFUNC_AUD_CON0, 0xcba0); in mt_sgen_event()
972 regmap_write(priv->regmap, MT6358_AFUNC_AUD_CON2, 0x0006); in mt_aif_in_event()
974 regmap_write(priv->regmap, MT6358_AFUNC_AUD_CON0, 0xCBA1); in mt_aif_in_event()
976 regmap_write(priv->regmap, MT6358_AFUNC_AUD_CON2, 0x0003); in mt_aif_in_event()
978 regmap_write(priv->regmap, MT6358_AFUNC_AUD_CON2, 0x000B); in mt_aif_in_event()
982 regmap_write(priv->regmap, MT6358_AFUNC_AUD_CON2, 0x0000); in mt_aif_in_event()
983 regmap_write(priv->regmap, MT6358_AFUNC_AUD_CON0, 0xcba0); in mt_aif_in_event()
999 regmap_update_bits(priv->regmap, MT6358_AUDDEC_ANA_CON4, in mtk_hp_enable()
1003 regmap_write(priv->regmap, MT6358_AUDDEC_ANA_CON2, 0x4000); in mtk_hp_enable()
1006 regmap_write(priv->regmap, MT6358_ZCD_CON2, DL_GAIN_N_40DB_REG); in mtk_hp_enable()
1009 regmap_write(priv->regmap, MT6358_AUDNCP_CLKDIV_CON1, 0x0001); in mtk_hp_enable()
1011 regmap_write(priv->regmap, MT6358_AUDNCP_CLKDIV_CON2, 0x002c); in mtk_hp_enable()
1013 regmap_write(priv->regmap, MT6358_AUDNCP_CLKDIV_CON0, 0x0001); in mtk_hp_enable()
1015 regmap_write(priv->regmap, MT6358_AUDNCP_CLKDIV_CON4, 0x0003); in mtk_hp_enable()
1017 regmap_write(priv->regmap, MT6358_AUDNCP_CLKDIV_CON3, 0x0000); in mtk_hp_enable()
1021 regmap_update_bits(priv->regmap, MT6358_AUDDEC_ANA_CON14, in mtk_hp_enable()
1024 regmap_write(priv->regmap, MT6358_AUDDEC_ANA_CON15, 0x0001); in mtk_hp_enable()
1031 regmap_write(priv->regmap, MT6358_AUDDEC_ANA_CON0, 0x3000); in mtk_hp_enable()
1034 regmap_write(priv->regmap, MT6358_AUDDEC_ANA_CON12, 0x0055); in mtk_hp_enable()
1037 regmap_write(priv->regmap, MT6358_AUDDEC_ANA_CON11, 0x4900); in mtk_hp_enable()
1040 regmap_write(priv->regmap, MT6358_AUDDEC_ANA_CON12, 0x0055); in mtk_hp_enable()
1042 regmap_write(priv->regmap, MT6358_AUDDEC_ANA_CON2, 0x4033); in mtk_hp_enable()
1045 regmap_write(priv->regmap, MT6358_AUDDEC_ANA_CON1, 0x000c); in mtk_hp_enable()
1047 regmap_write(priv->regmap, MT6358_AUDDEC_ANA_CON1, 0x003c); in mtk_hp_enable()
1049 regmap_write(priv->regmap, MT6358_AUDDEC_ANA_CON9, 0x0c00); in mtk_hp_enable()
1051 regmap_write(priv->regmap, MT6358_AUDDEC_ANA_CON0, 0x30c0); in mtk_hp_enable()
1053 regmap_write(priv->regmap, MT6358_AUDDEC_ANA_CON0, 0x30f0); in mtk_hp_enable()
1055 regmap_write(priv->regmap, MT6358_AUDDEC_ANA_CON1, 0x00fc); in mtk_hp_enable()
1058 regmap_write(priv->regmap, MT6358_AUDDEC_ANA_CON9, 0x0e00); in mtk_hp_enable()
1060 regmap_write(priv->regmap, MT6358_AUDDEC_ANA_CON9, 0x0200); in mtk_hp_enable()
1064 regmap_write(priv->regmap, MT6358_AUDDEC_ANA_CON10, 0x0000); in mtk_hp_enable()
1067 regmap_write(priv->regmap, MT6358_AUDDEC_ANA_CON1, 0x00ff); in mtk_hp_enable()
1074 regmap_write(priv->regmap, MT6358_AUDDEC_ANA_CON1, 0x3fcf); in mtk_hp_enable()
1082 regmap_write(priv->regmap, MT6358_AUDDEC_ANA_CON1, 0x3fc3); in mtk_hp_enable()
1084 regmap_write(priv->regmap, MT6358_AUDDEC_ANA_CON1, 0x3f03); in mtk_hp_enable()
1088 regmap_update_bits(priv->regmap, MT6358_AUDDEC_ANA_CON13, 0x1, 0x1); in mtk_hp_enable()
1090 regmap_write(priv->regmap, MT6358_AUDDEC_ANA_CON0, 0x30ff); in mtk_hp_enable()
1092 regmap_write(priv->regmap, MT6358_AUDDEC_ANA_CON9, 0xf201); in mtk_hp_enable()
1096 regmap_write(priv->regmap, MT6358_AUDDEC_ANA_CON0, 0x32ff); in mtk_hp_enable()
1098 regmap_write(priv->regmap, MT6358_AUDDEC_ANA_CON0, 0x3aff); in mtk_hp_enable()
1112 regmap_update_bits(priv->regmap, MT6358_AUDDEC_ANA_CON0, in mtk_hp_disable()
1116 regmap_update_bits(priv->regmap, MT6358_AUDDEC_ANA_CON9, in mtk_hp_disable()
1120 regmap_update_bits(priv->regmap, MT6358_AUDDEC_ANA_CON0, in mtk_hp_disable()
1124 regmap_update_bits(priv->regmap, MT6358_AUDDEC_ANA_CON13, 0x1, 0x0); in mtk_hp_disable()
1127 regmap_write(priv->regmap, MT6358_AUDDEC_ANA_CON1, 0x3fc3); in mtk_hp_disable()
1129 regmap_write(priv->regmap, MT6358_AUDDEC_ANA_CON1, 0x3fcf); in mtk_hp_disable()
1137 regmap_write(priv->regmap, MT6358_AUDDEC_ANA_CON1, 0x3fff); in mtk_hp_disable()
1146 regmap_update_bits(priv->regmap, MT6358_AUDDEC_ANA_CON1, 0x3, 0x0); in mtk_hp_disable()
1149 regmap_write(priv->regmap, MT6358_AUDDEC_ANA_CON9, 0x0e00); in mtk_hp_disable()
1152 regmap_write(priv->regmap, MT6358_AUDDEC_ANA_CON9, 0x0c00); in mtk_hp_disable()
1155 regmap_update_bits(priv->regmap, MT6358_AUDDEC_ANA_CON1, in mtk_hp_disable()
1159 regmap_update_bits(priv->regmap, MT6358_AUDDEC_ANA_CON0, in mtk_hp_disable()
1163 regmap_update_bits(priv->regmap, MT6358_AUDDEC_ANA_CON0, in mtk_hp_disable()
1167 regmap_write(priv->regmap, MT6358_AUDDEC_ANA_CON9, 0x0000); in mtk_hp_disable()
1170 regmap_update_bits(priv->regmap, MT6358_AUDDEC_ANA_CON1, in mtk_hp_disable()
1174 regmap_update_bits(priv->regmap, MT6358_AUDDEC_ANA_CON1, in mtk_hp_disable()
1178 regmap_update_bits(priv->regmap, MT6358_AUDDEC_ANA_CON12, in mtk_hp_disable()
1182 regmap_update_bits(priv->regmap, MT6358_AUDDEC_ANA_CON15, 0x1, 0x0); in mtk_hp_disable()
1184 regmap_update_bits(priv->regmap, MT6358_AUDDEC_ANA_CON14, in mtk_hp_disable()
1187 regmap_update_bits(priv->regmap, MT6358_AUDNCP_CLKDIV_CON3, in mtk_hp_disable()
1191 regmap_update_bits(priv->regmap, MT6358_AUDDEC_ANA_CON2, in mtk_hp_disable()
1195 regmap_update_bits(priv->regmap, MT6358_AUDDEC_ANA_CON4, in mtk_hp_disable()
1208 regmap_update_bits(priv->regmap, MT6358_AUDDEC_ANA_CON4, in mtk_hp_spk_enable()
1212 regmap_write(priv->regmap, MT6358_AUDDEC_ANA_CON2, 0x4000); in mtk_hp_spk_enable()
1215 regmap_write(priv->regmap, MT6358_ZCD_CON2, DL_GAIN_N_10DB_REG); in mtk_hp_spk_enable()
1218 regmap_write(priv->regmap, MT6358_AUDNCP_CLKDIV_CON1, 0x0001); in mtk_hp_spk_enable()
1220 regmap_write(priv->regmap, MT6358_AUDNCP_CLKDIV_CON2, 0x002c); in mtk_hp_spk_enable()
1222 regmap_write(priv->regmap, MT6358_AUDNCP_CLKDIV_CON0, 0x0001); in mtk_hp_spk_enable()
1224 regmap_write(priv->regmap, MT6358_AUDNCP_CLKDIV_CON4, 0x0003); in mtk_hp_spk_enable()
1226 regmap_write(priv->regmap, MT6358_AUDNCP_CLKDIV_CON3, 0x0000); in mtk_hp_spk_enable()
1230 regmap_update_bits(priv->regmap, MT6358_AUDDEC_ANA_CON14, in mtk_hp_spk_enable()
1233 regmap_write(priv->regmap, MT6358_AUDDEC_ANA_CON15, 0x0001); in mtk_hp_spk_enable()
1240 regmap_write(priv->regmap, MT6358_AUDDEC_ANA_CON0, 0x3000); in mtk_hp_spk_enable()
1243 regmap_write(priv->regmap, MT6358_AUDDEC_ANA_CON12, 0x0055); in mtk_hp_spk_enable()
1246 regmap_write(priv->regmap, MT6358_AUDDEC_ANA_CON11, 0x4900); in mtk_hp_spk_enable()
1249 regmap_write(priv->regmap, MT6358_AUDDEC_ANA_CON12, 0x0055); in mtk_hp_spk_enable()
1251 regmap_write(priv->regmap, MT6358_AUDDEC_ANA_CON2, 0x4033); in mtk_hp_spk_enable()
1257 regmap_write(priv->regmap, MT6358_AUDDEC_ANA_CON0, 0x30c0); in mtk_hp_spk_enable()
1259 regmap_write(priv->regmap, MT6358_AUDDEC_ANA_CON0, 0x30f0); in mtk_hp_spk_enable()
1261 regmap_write(priv->regmap, MT6358_AUDDEC_ANA_CON9, 0x0200); in mtk_hp_spk_enable()
1265 regmap_write(priv->regmap, MT6358_AUDDEC_ANA_CON10, 0x0000); in mtk_hp_spk_enable()
1268 regmap_write(priv->regmap, MT6358_AUDDEC_ANA_CON1, 0x0003); in mtk_hp_spk_enable()
1273 regmap_write(priv->regmap, MT6358_ZCD_CON1, DL_GAIN_N_40DB_REG); in mtk_hp_spk_enable()
1280 regmap_write(priv->regmap, MT6358_AUDDEC_ANA_CON7, 0x0110); in mtk_hp_spk_enable()
1282 regmap_write(priv->regmap, MT6358_AUDDEC_ANA_CON7, 0x0112); in mtk_hp_spk_enable()
1284 regmap_write(priv->regmap, MT6358_AUDDEC_ANA_CON7, 0x0113); in mtk_hp_spk_enable()
1287 regmap_update_bits(priv->regmap, MT6358_ZCD_CON1, in mtk_hp_spk_enable()
1291 regmap_update_bits(priv->regmap, MT6358_ZCD_CON1, in mtk_hp_spk_enable()
1297 regmap_update_bits(priv->regmap, MT6358_AUDDEC_ANA_CON13, 0x1, 0x1); in mtk_hp_spk_enable()
1299 regmap_write(priv->regmap, MT6358_AUDDEC_ANA_CON0, 0x30f9); in mtk_hp_spk_enable()
1301 regmap_write(priv->regmap, MT6358_AUDDEC_ANA_CON9, 0x0201); in mtk_hp_spk_enable()
1303 regmap_write(priv->regmap, MT6358_AUDDEC_ANA_CON7, 0x011b); in mtk_hp_spk_enable()
1305 regmap_write(priv->regmap, MT6358_AUDDEC_ANA_CON0, 0x35f9); in mtk_hp_spk_enable()
1313 regmap_update_bits(priv->regmap, MT6358_AUDDEC_ANA_CON0, in mtk_hp_spk_disable()
1316 regmap_update_bits(priv->regmap, MT6358_AUDDEC_ANA_CON7, in mtk_hp_spk_disable()
1320 regmap_update_bits(priv->regmap, MT6358_AUDDEC_ANA_CON0, in mtk_hp_spk_disable()
1324 regmap_update_bits(priv->regmap, MT6358_AUDDEC_ANA_CON13, 0x1, 0x0); in mtk_hp_spk_disable()
1332 regmap_update_bits(priv->regmap, MT6358_ZCD_CON1, in mtk_hp_spk_disable()
1339 regmap_update_bits(priv->regmap, MT6358_AUDDEC_ANA_CON1, 0x3, 0x0); in mtk_hp_spk_disable()
1342 regmap_write(priv->regmap, MT6358_AUDDEC_ANA_CON1, 0x3fc3); in mtk_hp_spk_disable()
1344 regmap_write(priv->regmap, MT6358_AUDDEC_ANA_CON1, 0x3fcf); in mtk_hp_spk_disable()
1347 regmap_write(priv->regmap, MT6358_AUDDEC_ANA_CON1, 0x3fff); in mtk_hp_spk_disable()
1353 regmap_update_bits(priv->regmap, MT6358_AUDDEC_ANA_CON0, in mtk_hp_spk_disable()
1356 regmap_update_bits(priv->regmap, MT6358_AUDDEC_ANA_CON7, in mtk_hp_spk_disable()
1360 regmap_update_bits(priv->regmap, MT6358_AUDDEC_ANA_CON0, in mtk_hp_spk_disable()
1363 regmap_update_bits(priv->regmap, MT6358_AUDDEC_ANA_CON7, in mtk_hp_spk_disable()
1367 regmap_update_bits(priv->regmap, MT6358_AUDDEC_ANA_CON9, in mtk_hp_spk_disable()
1371 regmap_update_bits(priv->regmap, MT6358_AUDDEC_ANA_CON12, in mtk_hp_spk_disable()
1374 regmap_update_bits(priv->regmap, MT6358_AUDDEC_ANA_CON15, 0x1, 0x0); in mtk_hp_spk_disable()
1376 regmap_update_bits(priv->regmap, MT6358_AUDDEC_ANA_CON14, 0x1055, 0x0); in mtk_hp_spk_disable()
1378 regmap_update_bits(priv->regmap, MT6358_AUDNCP_CLKDIV_CON3, 0x1, 0x1); in mtk_hp_spk_disable()
1381 regmap_update_bits(priv->regmap, MT6358_AUDDEC_ANA_CON4, in mtk_hp_spk_disable()
1462 regmap_write(priv->regmap, MT6358_AUDDEC_ANA_CON2, 0x4000); in mt_rcv_event()
1465 regmap_write(priv->regmap, MT6358_AUDNCP_CLKDIV_CON1, 0x0001); in mt_rcv_event()
1467 regmap_write(priv->regmap, MT6358_AUDNCP_CLKDIV_CON2, 0x002c); in mt_rcv_event()
1469 regmap_write(priv->regmap, MT6358_AUDNCP_CLKDIV_CON0, 0x0001); in mt_rcv_event()
1471 regmap_write(priv->regmap, MT6358_AUDNCP_CLKDIV_CON4, 0x0003); in mt_rcv_event()
1473 regmap_write(priv->regmap, MT6358_AUDNCP_CLKDIV_CON3, 0x0000); in mt_rcv_event()
1477 regmap_update_bits(priv->regmap, MT6358_AUDDEC_ANA_CON14, in mt_rcv_event()
1480 regmap_write(priv->regmap, MT6358_AUDDEC_ANA_CON15, 0x0001); in mt_rcv_event()
1487 regmap_write(priv->regmap, MT6358_AUDDEC_ANA_CON6, 0x0010); in mt_rcv_event()
1490 regmap_write(priv->regmap, MT6358_AUDDEC_ANA_CON12, 0x0055); in mt_rcv_event()
1492 regmap_write(priv->regmap, MT6358_AUDDEC_ANA_CON11, 0x4900); in mt_rcv_event()
1495 regmap_write(priv->regmap, MT6358_AUDDEC_ANA_CON12, 0x0055); in mt_rcv_event()
1497 regmap_write(priv->regmap, MT6358_AUDDEC_ANA_CON6, 0x0090); in mt_rcv_event()
1500 regmap_write(priv->regmap, MT6358_AUDDEC_ANA_CON9, 0x0000); in mt_rcv_event()
1503 regmap_write(priv->regmap, MT6358_AUDDEC_ANA_CON10, 0x0000); in mt_rcv_event()
1506 regmap_write(priv->regmap, MT6358_AUDDEC_ANA_CON6, 0x0092); in mt_rcv_event()
1508 regmap_write(priv->regmap, MT6358_AUDDEC_ANA_CON6, 0x0093); in mt_rcv_event()
1511 regmap_update_bits(priv->regmap, MT6358_AUDDEC_ANA_CON13, in mt_rcv_event()
1515 regmap_write(priv->regmap, MT6358_AUDDEC_ANA_CON0, 0x0009); in mt_rcv_event()
1517 regmap_write(priv->regmap, MT6358_AUDDEC_ANA_CON9, 0x0001); in mt_rcv_event()
1519 regmap_write(priv->regmap, MT6358_AUDDEC_ANA_CON6, 0x009b); in mt_rcv_event()
1523 regmap_update_bits(priv->regmap, MT6358_AUDDEC_ANA_CON6, in mt_rcv_event()
1528 regmap_update_bits(priv->regmap, MT6358_AUDDEC_ANA_CON0, in mt_rcv_event()
1532 regmap_update_bits(priv->regmap, MT6358_AUDDEC_ANA_CON13, in mt_rcv_event()
1536 regmap_write(priv->regmap, MT6358_ZCD_CON3, DL_GAIN_N_40DB); in mt_rcv_event()
1539 regmap_update_bits(priv->regmap, MT6358_AUDDEC_ANA_CON6, in mt_rcv_event()
1543 regmap_update_bits(priv->regmap, MT6358_AUDDEC_ANA_CON6, in mt_rcv_event()
1547 regmap_update_bits(priv->regmap, MT6358_AUDDEC_ANA_CON9, in mt_rcv_event()
1551 regmap_update_bits(priv->regmap, MT6358_AUDDEC_ANA_CON9, in mt_rcv_event()
1555 regmap_update_bits(priv->regmap, MT6358_AUDDEC_ANA_CON12, in mt_rcv_event()
1559 regmap_update_bits(priv->regmap, MT6358_AUDDEC_ANA_CON15, in mt_rcv_event()
1562 regmap_update_bits(priv->regmap, MT6358_AUDDEC_ANA_CON14, in mt_rcv_event()
1565 regmap_update_bits(priv->regmap, MT6358_AUDNCP_CLKDIV_CON3, in mt_rcv_event()
1612 regmap_update_bits(priv->regmap, MT6358_AUDDEC_ANA_CON13, in mt_adc_supply_event()
1615 regmap_write(priv->regmap, MT6358_AUDENC_ANA_CON3, in mt_adc_supply_event()
1618 regmap_update_bits(priv->regmap, MT6358_AUDDEC_ANA_CON14, in mt_adc_supply_event()
1621 regmap_update_bits(priv->regmap, MT6358_AUDDEC_ANA_CON14, in mt_adc_supply_event()
1626 regmap_update_bits(priv->regmap, MT6358_AUDDEC_ANA_CON14, in mt_adc_supply_event()
1629 regmap_update_bits(priv->regmap, MT6358_AUDDEC_ANA_CON14, in mt_adc_supply_event()
1633 regmap_write(priv->regmap, MT6358_AUDENC_ANA_CON3, 0x0000); in mt_adc_supply_event()
1635 regmap_update_bits(priv->regmap, MT6358_AUDDEC_ANA_CON13, in mt_adc_supply_event()
1656 regmap_write(priv->regmap, MT6358_AFE_DCCLK_CFG0, 0x2062); in mt6358_amic_enable()
1657 regmap_write(priv->regmap, MT6358_AFE_DCCLK_CFG0, 0x2062); in mt6358_amic_enable()
1658 regmap_write(priv->regmap, MT6358_AFE_DCCLK_CFG0, 0x2060); in mt6358_amic_enable()
1659 regmap_write(priv->regmap, MT6358_AFE_DCCLK_CFG0, 0x2061); in mt6358_amic_enable()
1660 regmap_write(priv->regmap, MT6358_AFE_DCCLK_CFG1, 0x0100); in mt6358_amic_enable()
1668 regmap_update_bits(priv->regmap, MT6358_AUDENC_ANA_CON9, in mt6358_amic_enable()
1672 regmap_update_bits(priv->regmap, MT6358_AUDENC_ANA_CON9, in mt6358_amic_enable()
1676 regmap_update_bits(priv->regmap, MT6358_AUDENC_ANA_CON9, in mt6358_amic_enable()
1681 regmap_update_bits(priv->regmap, MT6358_AUDENC_ANA_CON9, in mt6358_amic_enable()
1689 regmap_write(priv->regmap, in mt6358_amic_enable()
1692 regmap_write(priv->regmap, in mt6358_amic_enable()
1698 regmap_update_bits(priv->regmap, MT6358_AUDENC_ANA_CON0, in mt6358_amic_enable()
1700 regmap_update_bits(priv->regmap, MT6358_AUDENC_ANA_CON1, in mt6358_amic_enable()
1704 regmap_update_bits(priv->regmap, MT6358_AUDENC_ANA_CON0, in mt6358_amic_enable()
1706 regmap_update_bits(priv->regmap, MT6358_AUDENC_ANA_CON1, in mt6358_amic_enable()
1712 regmap_update_bits(priv->regmap, MT6358_AUDENC_ANA_CON0, in mt6358_amic_enable()
1717 regmap_update_bits(priv->regmap, MT6358_AUDENC_ANA_CON0, in mt6358_amic_enable()
1723 regmap_update_bits(priv->regmap, MT6358_AUDENC_ANA_CON0, in mt6358_amic_enable()
1729 regmap_update_bits(priv->regmap, MT6358_AUDENC_ANA_CON0, in mt6358_amic_enable()
1733 regmap_update_bits(priv->regmap, MT6358_AUDENC_ANA_CON0, in mt6358_amic_enable()
1740 regmap_update_bits(priv->regmap, MT6358_AUDENC_ANA_CON1, in mt6358_amic_enable()
1745 regmap_update_bits(priv->regmap, MT6358_AUDENC_ANA_CON1, in mt6358_amic_enable()
1751 regmap_update_bits(priv->regmap, MT6358_AUDENC_ANA_CON1, in mt6358_amic_enable()
1757 regmap_update_bits(priv->regmap, MT6358_AUDENC_ANA_CON1, in mt6358_amic_enable()
1761 regmap_update_bits(priv->regmap, MT6358_AUDENC_ANA_CON1, in mt6358_amic_enable()
1769 regmap_update_bits(priv->regmap, MT6358_AUDENC_ANA_CON0, in mt6358_amic_enable()
1772 regmap_update_bits(priv->regmap, MT6358_AUDENC_ANA_CON1, in mt6358_amic_enable()
1776 regmap_update_bits(priv->regmap, MT6358_AUDENC_ANA_CON3, in mt6358_amic_enable()
1784 regmap_write(priv->regmap, MT6358_AFE_UL_SRC_CON0_H, 0x0000); in mt6358_amic_enable()
1787 regmap_write(priv->regmap, MT6358_AFE_UL_SRC_CON0_L, 0x0001); in mt6358_amic_enable()
1802 regmap_update_bits(priv->regmap, MT6358_AFE_UL_SRC_CON0_L, in mt6358_amic_disable()
1809 regmap_update_bits(priv->regmap, MT6358_AUDENC_ANA_CON0, in mt6358_amic_disable()
1812 regmap_update_bits(priv->regmap, MT6358_AUDENC_ANA_CON0, in mt6358_amic_disable()
1815 regmap_update_bits(priv->regmap, MT6358_AUDENC_ANA_CON0, in mt6358_amic_disable()
1819 regmap_update_bits(priv->regmap, MT6358_AUDENC_ANA_CON0, in mt6358_amic_disable()
1823 regmap_update_bits(priv->regmap, MT6358_AUDENC_ANA_CON1, in mt6358_amic_disable()
1826 regmap_update_bits(priv->regmap, MT6358_AUDENC_ANA_CON1, in mt6358_amic_disable()
1829 regmap_update_bits(priv->regmap, MT6358_AUDENC_ANA_CON1, in mt6358_amic_disable()
1833 regmap_update_bits(priv->regmap, MT6358_AUDENC_ANA_CON1, in mt6358_amic_disable()
1838 regmap_write(priv->regmap, MT6358_AUDENC_ANA_CON9, 0x0000); in mt6358_amic_disable()
1841 regmap_update_bits(priv->regmap, MT6358_AUDENC_ANA_CON10, in mt6358_amic_disable()
1846 regmap_write(priv->regmap, MT6358_AFE_DCCLK_CFG0, 0x2060); in mt6358_amic_disable()
1848 regmap_write(priv->regmap, MT6358_AFE_DCCLK_CFG0, 0x2062); in mt6358_amic_disable()
1850 regmap_write(priv->regmap, MT6358_AFE_DCCLK_CFG0, 0x2062); in mt6358_amic_disable()
1852 regmap_write(priv->regmap, MT6358_AFE_DCCLK_CFG0, 0x2062); in mt6358_amic_disable()
1862 regmap_write(priv->regmap, MT6358_AUDENC_ANA_CON9, 0x0021); in mt6358_dmic_enable()
1865 regmap_update_bits(priv->regmap, MT6358_AUDENC_ANA_CON10, in mt6358_dmic_enable()
1869 regmap_write(priv->regmap, MT6358_AUDENC_ANA_CON8, 0x0005); in mt6358_dmic_enable()
1876 regmap_write(priv->regmap, MT6358_AFE_UL_SRC_CON0_H, 0x0400); in mt6358_dmic_enable()
1878 regmap_write(priv->regmap, MT6358_AFE_UL_SRC_CON0_H, 0x0080); in mt6358_dmic_enable()
1881 regmap_write(priv->regmap, MT6358_AFE_UL_SRC_CON0_L, 0x0003); in mt6358_dmic_enable()
1894 regmap_update_bits(priv->regmap, MT6358_AFE_UL_SRC_CON0_L, in mt6358_dmic_disable()
1901 regmap_write(priv->regmap, MT6358_AUDENC_ANA_CON8, 0x0000); in mt6358_dmic_disable()
1905 regmap_write(priv->regmap, MT6358_AUDENC_ANA_CON9, 0x0001); in mt6358_dmic_disable()
1908 regmap_update_bits(priv->regmap, MT6358_AUDENC_ANA_CON10, in mt6358_dmic_disable()
1912 regmap_write(priv->regmap, MT6358_AUDENC_ANA_CON9, 0x0000); in mt6358_dmic_disable()
1922 regmap_update_bits(priv->regmap, MT6358_AUDENC_ANA_CON0, in mt6358_restore_pga()
1925 regmap_update_bits(priv->regmap, MT6358_AUDENC_ANA_CON1, in mt6358_restore_pga()
2411 regmap_update_bits(priv->regmap, MT6358_AUDDEC_ANA_CON0, in mt6358_codec_init_reg()
2414 regmap_update_bits(priv->regmap, MT6358_AUDDEC_ANA_CON0, in mt6358_codec_init_reg()
2418 regmap_update_bits(priv->regmap, MT6358_AUDDEC_ANA_CON6, in mt6358_codec_init_reg()
2422 regmap_update_bits(priv->regmap, MT6358_AUDDEC_ANA_CON7, in mt6358_codec_init_reg()
2427 regmap_update_bits(priv->regmap, MT6358_ACCDET_CON13, in mt6358_codec_init_reg()
2431 regmap_write(priv->regmap, MT6358_DRV_CON3, 0x8888); in mt6358_codec_init_reg()
2443 snd_soc_component_init_regmap(cmpnt, priv->regmap); in mt6358_codec_probe()
2500 priv->regmap = mt6397->regmap; in mt6358_platform_driver_probe()
2501 if (IS_ERR(priv->regmap)) in mt6358_platform_driver_probe()
2502 return PTR_ERR(priv->regmap); in mt6358_platform_driver_probe()