Lines Matching full:rx2
681 "ZERO", "RX0", "RX1", "RX2", "RX3", "RX4", "RX5"
685 "ZERO", "DEC0", "DEC1", "IIR0", "IIR1", "RX0", "RX1", "RX2",
695 "RX0", "RX1", "RX2", "RX3", "RX4", "RX5"
1862 * CDC_DMA_RX_1 port drives RX2/RX3 -- ch_mask 0x1/0x2/0x3 in rx_macro_get_channel_map()
3163 SND_SOC_DAPM_MUX("RX_MACRO RX2 MUX", SND_SOC_NOPM, RX_MACRO_RX2, 0,
3300 {"RX_MACRO RX2 MUX", "AIF1_PB", "RX AIF1 PB"},
3307 {"RX_MACRO RX2 MUX", "AIF2_PB", "RX AIF2 PB"},
3314 {"RX_MACRO RX2 MUX", "AIF3_PB", "RX AIF3 PB"},
3321 {"RX_MACRO RX2 MUX", "AIF4_PB", "RX AIF4 PB"},
3328 {"RX_RX2", NULL, "RX_MACRO RX2 MUX"},
3335 {"RX INT0_1 MIX1 INP0", "RX2", "RX_RX2"},
3345 {"RX INT0_1 MIX1 INP1", "RX2", "RX_RX2"},
3355 {"RX INT0_1 MIX1 INP2", "RX2", "RX_RX2"},
3366 {"RX INT1_1 MIX1 INP0", "RX2", "RX_RX2"},
3376 {"RX INT1_1 MIX1 INP1", "RX2", "RX_RX2"},
3386 {"RX INT1_1 MIX1 INP2", "RX2", "RX_RX2"},
3397 {"RX INT2_1 MIX1 INP0", "RX2", "RX_RX2"},
3407 {"RX INT2_1 MIX1 INP1", "RX2", "RX_RX2"},
3417 {"RX INT2_1 MIX1 INP2", "RX2", "RX_RX2"},
3453 {"RX INT0_2 MUX", "RX2", "RX_RX2"},
3463 {"RX INT1_2 MUX", "RX2", "RX_RX2"},
3473 {"RX INT2_2 MUX", "RX2", "RX_RX2"},
3512 {"IIR0 INP0 MUX", "RX2", "RX_RX2"},
3523 {"IIR0 INP1 MUX", "RX2", "RX_RX2"},
3534 {"IIR0 INP2 MUX", "RX2", "RX_RX2"},
3545 {"IIR0 INP3 MUX", "RX2", "RX_RX2"},
3558 {"IIR1 INP0 MUX", "RX2", "RX_RX2"},
3569 {"IIR1 INP1 MUX", "RX2", "RX_RX2"},
3580 {"IIR1 INP2 MUX", "RX2", "RX_RX2"},
3591 {"IIR1 INP3 MUX", "RX2", "RX_RX2"},